Eric Lee / smarc-uboot

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Commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f

Authored by Rafal Jaworowski
1 parent 83b4cfa3d6
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

[ppc] Fix build breakage for all non-4xx PowerPC variants. 

- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup

Showing 23 changed files with 34 additions and 26 deletions Side-by-side Diff

cpu/74xx_7xx/start.S
Diff comments   View file @ 02032e8
... ... @@ -125,7 +125,7 @@
125 125 /* Alignment exception. */
126 126 . = 0x600
127 127 Alignment:
128   - EXCEPTION_PROLOG
  128 + EXCEPTION_PROLOG(SRR0, SRR1)
129 129 mfspr r4,DAR
130 130 stw r4,_DAR(r21)
131 131 mfspr r5,DSISR
... ... @@ -143,7 +143,7 @@
143 143 /* Program check exception */
144 144 . = 0x700
145 145 ProgramCheck:
146   - EXCEPTION_PROLOG
  146 + EXCEPTION_PROLOG(SRR0, SRR1)
147 147 addi r3,r1,STACK_FRAME_OVERHEAD
148 148 li r20,MSR_KERNEL
149 149 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -210,7 +210,7 @@
210 210 /* Alignment exception. */
211 211 . = 0x600
212 212 Alignment:
213   - EXCEPTION_PROLOG
  213 + EXCEPTION_PROLOG(SRR0, SRR1)
214 214 mfspr r4,DAR
215 215 stw r4,_DAR(r21)
216 216 mfspr r5,DSISR
... ... @@ -228,7 +228,7 @@
228 228 /* Program check exception */
229 229 . = 0x700
230 230 ProgramCheck:
231   - EXCEPTION_PROLOG
  231 + EXCEPTION_PROLOG(SRR0, SRR1)
232 232 addi r3,r1,STACK_FRAME_OVERHEAD
233 233 li r20,MSR_KERNEL
234 234 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -208,7 +208,7 @@
208 208 /* Alignment exception. */
209 209 . = 0x600
210 210 Alignment:
211   - EXCEPTION_PROLOG
  211 + EXCEPTION_PROLOG(SRR0, SRR1)
212 212 mfspr r4,DAR
213 213 stw r4,_DAR(r21)
214 214 mfspr r5,DSISR
... ... @@ -227,7 +227,7 @@
227 227 /* Program check exception */
228 228 . = 0x700
229 229 ProgramCheck:
230   - EXCEPTION_PROLOG
  230 + EXCEPTION_PROLOG(SRR0, SRR1)
231 231 addi r3,r1,STACK_FRAME_OVERHEAD
232 232 li r20,MSR_KERNEL
233 233 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -169,7 +169,7 @@
169 169 /* Alignment exception. */
170 170 . = 0x600
171 171 Alignment:
172   - EXCEPTION_PROLOG
  172 + EXCEPTION_PROLOG(SRR0, SRR1)
173 173 mfspr r4,DAR
174 174 stw r4,_DAR(r21)
175 175 mfspr r5,DSISR
... ... @@ -188,7 +188,7 @@
188 188 /* Program check exception */
189 189 . = 0x700
190 190 ProgramCheck:
191   - EXCEPTION_PROLOG
  191 + EXCEPTION_PROLOG(SRR0, SRR1)
192 192 addi r3,r1,STACK_FRAME_OVERHEAD
193 193 li r20,MSR_KERNEL
194 194 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -220,7 +220,7 @@
220 220 /* Alignment exception. */
221 221 . = EXC_OFF_ALIGN
222 222 Alignment:
223   - EXCEPTION_PROLOG
  223 + EXCEPTION_PROLOG(SRR0, SRR1)
224 224 mfspr r4,DAR
225 225 stw r4,_DAR(r21)
226 226 mfspr r5,DSISR
... ... @@ -238,7 +238,7 @@
238 238 /* Program check exception */
239 239 . = EXC_OFF_PROGRAM
240 240 ProgramCheck:
241   - EXCEPTION_PROLOG
  241 + EXCEPTION_PROLOG(SRR0, SRR1)
242 242 addi r3,r1,STACK_FRAME_OVERHEAD
243 243 li r20,MSR_KERNEL
244 244 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -279,7 +279,7 @@
279 279 /* Alignment exception. */
280 280 . = 0x600
281 281 Alignment:
282   - EXCEPTION_PROLOG
  282 + EXCEPTION_PROLOG(SRR0, SRR1)
283 283 mfspr r4,DAR
284 284 stw r4,_DAR(r21)
285 285 mfspr r5,DSISR
... ... @@ -298,7 +298,7 @@
298 298 /* Program check exception */
299 299 . = 0x700
300 300 ProgramCheck:
301   - EXCEPTION_PROLOG
  301 + EXCEPTION_PROLOG(SRR0, SRR1)
302 302 addi r3,r1,STACK_FRAME_OVERHEAD
303 303 li r20,MSR_KERNEL
304 304 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -263,7 +263,7 @@
263 263 /* Alignment exception. */
264 264 . = 0x600
265 265 Alignment:
266   - EXCEPTION_PROLOG
  266 + EXCEPTION_PROLOG(SRR0, SRR1)
267 267 mfspr r4,DAR
268 268 stw r4,_DAR(r21)
269 269 mfspr r5,DSISR
... ... @@ -282,7 +282,7 @@
282 282 /* Program check exception */
283 283 . = 0x700
284 284 ProgramCheck:
285   - EXCEPTION_PROLOG
  285 + EXCEPTION_PROLOG(SRR0, SRR1)
286 286 addi r3,r1,STACK_FRAME_OVERHEAD
287 287 li r20,MSR_KERNEL
288 288 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -457,7 +457,7 @@
457 457 /* Alignment exception. */
458 458 . = 0x0600
459 459 Alignment:
460   - EXCEPTION_PROLOG
  460 + EXCEPTION_PROLOG(SRR0, SRR1)
461 461 mfspr r4,DAR
462 462 stw r4,_DAR(r21)
463 463 mfspr r5,DSISR
... ... @@ -475,7 +475,7 @@
475 475 /* Program check exception */
476 476 . = 0x0700
477 477 ProgramCheck:
478   - EXCEPTION_PROLOG
  478 + EXCEPTION_PROLOG(SRR0, SRR1)
479 479 addi r3,r1,STACK_FRAME_OVERHEAD
480 480 li r20,MSR_KERNEL
481 481 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -116,7 +116,7 @@
116 116 /* Alignment exception. */
117 117 . = 0x600
118 118 Alignment:
119   - EXCEPTION_PROLOG
  119 + EXCEPTION_PROLOG(SRR0, SRR1)
120 120 mfspr r4,DAR
121 121 stw r4,_DAR(r21)
122 122 mfspr r5,DSISR
... ... @@ -134,7 +134,7 @@
134 134 /* Program check exception */
135 135 . = 0x700
136 136 ProgramCheck:
137   - EXCEPTION_PROLOG
  137 + EXCEPTION_PROLOG(SRR0, SRR1)
138 138 addi r3,r1,STACK_FRAME_OVERHEAD
139 139 li r20,MSR_KERNEL
140 140 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -224,7 +224,7 @@
224 224 /* Alignment exception. */
225 225 . = 0x600
226 226 Alignment:
227   - EXCEPTION_PROLOG
  227 + EXCEPTION_PROLOG(SRR0, SRR1)
228 228 mfspr r4,DAR
229 229 stw r4,_DAR(r21)
230 230 mfspr r5,DSISR
... ... @@ -242,7 +242,7 @@
242 242 /* Program check exception */
243 243 . = 0x700
244 244 ProgramCheck:
245   - EXCEPTION_PROLOG
  245 + EXCEPTION_PROLOG(SRR0, SRR1)
246 246 addi r3,r1,STACK_FRAME_OVERHEAD
247 247 li r20,MSR_KERNEL
248 248 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
... ... @@ -60,7 +60,6 @@
60 60 * address and (s)dram will be positioned at address 0
61 61 */
62 62 #include <config.h>
63   -#include <mpc8xx.h>
64 63 #include <ppc4xx.h>
65 64 #include <version.h>
66 65  
... ... @@ -34,6 +34,7 @@
34 34 * Exception offsets (PowerPC standard)
35 35 */
36 36 #define EXC_OFF_SYS_RESET 0x0100 /* default system reset offset */
  37 +#define _START_OFFSET EXC_OFF_SYS_RESET
37 38  
38 39 /*----------------------------------------------------------------
39 40 * l2cr values
... ... @@ -36,6 +36,7 @@
36 36 * Exception offsets (PowerPC standard)
37 37 */
38 38 #define EXC_OFF_SYS_RESET 0x0100 /* System reset */
  39 +#define _START_OFFSET EXC_OFF_SYS_RESET
39 40  
40 41 /*-----------------------------------------------------------------------
41 42 * ISB bit in IMMR to set internal memory map
... ... @@ -39,6 +39,7 @@
39 39  
40 40 /* Exception offsets (PowerPC standard) */
41 41 #define EXC_OFF_SYS_RESET 0x0100
  42 +#define _START_OFFSET EXC_OFF_SYS_RESET
42 43  
43 44 /* useful macros for manipulating CSx_START/STOP */
44 45 #if defined(CONFIG_MGT5100)
... ... @@ -35,6 +35,7 @@
35 35  
36 36 /* Exception offsets (PowerPC standard) */
37 37 #define EXC_OFF_SYS_RESET 0x0100
  38 +#define _START_OFFSET EXC_OFF_SYS_RESET
38 39  
39 40 /* Internal memory map */
40 41 /* MPC8220 Internal Register MMAP */
... ... @@ -142,6 +142,8 @@
142 142 #define EXC_OFF_JMDDI 0x1600 /* Java Mode denorm detect Interr -- WTF??*/
143 143 #define EXC_OFF_RMTE 0x2000 /* Run Mode or Trace Exception */
144 144  
  145 +#define _START_OFFSET EXC_OFF_SYS_RESET
  146 +
145 147 #define MAP_A_CONFIG_ADDR_HIGH 0x8000 /* Upper half of CONFIG_ADDR for Map A */
146 148 #define MAP_A_CONFIG_ADDR_LOW 0x0CF8 /* Lower half of CONFIG_ADDR for Map A */
147 149 #define MAP_A_CONFIG_DATA_HIGH 0x8000 /* Upper half of CONFIG_DAT for Map A */
... ... @@ -53,7 +53,7 @@
53 53 * Exception offsets (PowerPC standard)
54 54 */
55 55 #define EXC_OFF_SYS_RESET 0x0100 /* System reset */
56   -
  56 +#define _START_OFFSET EXC_OFF_SYS_RESET
57 57  
58 58 /*-----------------------------------------------------------------------
59 59 * BCR - Bus Configuration Register 4-25
... ... @@ -25,6 +25,7 @@
25 25 /* System reset offset (PowerPC standard)
26 26 */
27 27 #define EXC_OFF_SYS_RESET 0x0100
  28 +#define _START_OFFSET EXC_OFF_SYS_RESET
28 29  
29 30 /* IMMRBAR - Internal Memory Register Base Address
30 31 */
... ... @@ -8,6 +8,7 @@
8 8 #define __MPC85xx_H__
9 9  
10 10 #define EXC_OFF_SYS_RESET 0x0100 /* System reset */
  11 +#define _START_OFFSET EXC_OFF_SYS_RESET
11 12  
12 13 #if defined(CONFIG_E500)
13 14 #include <e500.h>
... ... @@ -8,7 +8,7 @@
8 8 #define __MPC86xx_H__
9 9  
10 10 #define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */
11   -
  11 +#define _START_OFFSET EXC_OFF_SYS_RESET
12 12  
13 13 /*
14 14 * platform register addresses
... ... @@ -35,7 +35,7 @@
35 35 * Exception offsets (PowerPC standard)
36 36 */
37 37 #define EXC_OFF_SYS_RESET 0x0100 /* System reset */
38   -
  38 +#define _START_OFFSET EXC_OFF_SYS_RESET
39 39  
40 40 /*-----------------------------------------------------------------------
41 41 * SYPCR - System Protection Control Register 11-9
... ... @@ -22,7 +22,8 @@
22 22 #ifndef __PPC4XX_H__
23 23 #define __PPC4XX_H__
24 24  
25   -#define _START_OFFSET 0x2100
  25 +#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
  26 +#define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000)
26 27  
27 28 #if defined(CONFIG_440)
28 29 #include <ppc440.h>
include/ppc_asm.tmpl
Diff comments   View file @ 02032e8
... ... @@ -274,7 +274,7 @@
274 274 #define CRIT_EXCEPTION(n, label, hdlr) \
275 275 . = n; \
276 276 label: \
277   - EXCEPTION_PROLOG(csrr0, csrr1); \
  277 + EXCEPTION_PROLOG(CSRR0, CSRR1); \
278 278 lwz r3,GOT(transfer_to_handler); \
279 279 mtlr r3; \
280 280 addi r3,r1,STACK_FRAME_OVERHEAD; \