Commit 03db7649c0f8c7a292160e2d5d8981e6c3b84ee3
Committed by
Ye Li
1 parent
6ef30b4858
Exists in
smarc_8mq_lf_v2020.04
and in
4 other branches
MLK-20373-4 imx8: update mem map table
Update mem map table for xen uboot. xen console and some magic pages needs to be mappe as normal memory. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Flynn xu <flynn.xu@nxp.com> (cherry picked from commit c96a9844cd3342f6e31627ccc4f3e63544ffd78e) (cherry picked from commit 30b2d9f4a7c0cfc9b3f999f1c3a1a8c466d66a68)
Showing 1 changed file with 20 additions and 9 deletions Side-by-side Diff
arch/arm/mach-imx/imx8/cpu.c
| ... | ... | @@ -753,18 +753,29 @@ |
| 753 | 753 | if (IS_ENABLED(CONFIG_XEN)) { |
| 754 | 754 | imx8_mem_map[0].virt = 0x00000000UL; |
| 755 | 755 | imx8_mem_map[0].phys = 0x00000000UL; |
| 756 | - imx8_mem_map[0].size = 0x80000000UL; | |
| 756 | + imx8_mem_map[0].size = 0x39000000UL; | |
| 757 | 757 | imx8_mem_map[0].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 758 | 758 | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN; |
| 759 | - imx8_mem_map[1].virt = 0x80000000UL; | |
| 760 | - imx8_mem_map[1].phys = 0x80000000UL; | |
| 761 | - imx8_mem_map[1].size = 0x80000000UL; | |
| 762 | - imx8_mem_map[1].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE); | |
| 759 | + imx8_mem_map[1].virt = 0x39000000UL; | |
| 760 | + imx8_mem_map[1].phys = 0x39000000UL; | |
| 761 | + imx8_mem_map[1].size = 0x01000000UL; | |
| 762 | + imx8_mem_map[1].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE); | |
| 763 | 763 | |
| 764 | - imx8_mem_map[2].virt = 0x100000000UL; | |
| 765 | - imx8_mem_map[2].phys = 0x100000000UL; | |
| 766 | - imx8_mem_map[2].size = 0x100000000UL; | |
| 764 | + imx8_mem_map[2].virt = 0x40000000UL; | |
| 765 | + imx8_mem_map[2].phys = 0x40000000UL; | |
| 766 | + imx8_mem_map[2].size = 0x40000000UL; | |
| 767 | 767 | imx8_mem_map[2].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 768 | + PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN; | |
| 769 | + | |
| 770 | + imx8_mem_map[3].virt = 0x80000000UL; | |
| 771 | + imx8_mem_map[3].phys = 0x80000000UL; | |
| 772 | + imx8_mem_map[3].size = 0x80000000UL; | |
| 773 | + imx8_mem_map[3].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE); | |
| 774 | + | |
| 775 | + imx8_mem_map[4].virt = 0x100000000UL; | |
| 776 | + imx8_mem_map[4].phys = 0x100000000UL; | |
| 777 | + imx8_mem_map[4].size = 0x100000000UL; | |
| 778 | + imx8_mem_map[4].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | | |
| 768 | 779 | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN; |
| 769 | 780 | |
| 770 | 781 | icache_enable(); |