Eric Lee / smarc-uboot

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Commit d0691357db6745c7a19304a99dda55265cedd644

Authored by Peng Fan
Committed by Ye Li
1 parent fe897bdc89
Exists in emb_lf_v2023.04

MLK-20373-4 imx8: update mem map table 

Update mem map table for xen uboot.
xen console and some magic pages needs to be mappe as normal memory.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
(cherry picked from commit c96a9844cd3342f6e31627ccc4f3e63544ffd78e)
(cherry picked from commit 30b2d9f4a7c0cfc9b3f999f1c3a1a8c466d66a68)
(cherry picked from commit 03db7649c0f8c7a292160e2d5d8981e6c3b84ee3)
(cherry picked from commit 4ce0b30c0fb047ff2d0c58ae3ae6bd92737ea611)
(cherry picked from commit 1483f13672f065c8ce80ed2750cd6019e5b16e0e)

Showing 1 changed file with 20 additions and 9 deletions Side-by-side Diff

arch/arm/mach-imx/imx8/cpu.c
Diff comments   View file @ d069135
... ... @@ -760,18 +760,29 @@
760 760 if (IS_ENABLED(CONFIG_XEN)) {
761 761 imx8_mem_map[0].virt = 0x00000000UL;
762 762 imx8_mem_map[0].phys = 0x00000000UL;
763   - imx8_mem_map[0].size = 0x80000000UL;
  763 + imx8_mem_map[0].size = 0x39000000UL;
764 764 imx8_mem_map[0].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
765 765 PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN;
766   - imx8_mem_map[1].virt = 0x80000000UL;
767   - imx8_mem_map[1].phys = 0x80000000UL;
768   - imx8_mem_map[1].size = 0x80000000UL;
769   - imx8_mem_map[1].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE);
  766 + imx8_mem_map[1].virt = 0x39000000UL;
  767 + imx8_mem_map[1].phys = 0x39000000UL;
  768 + imx8_mem_map[1].size = 0x01000000UL;
  769 + imx8_mem_map[1].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE);
770 770  
771   - imx8_mem_map[2].virt = 0x100000000UL;
772   - imx8_mem_map[2].phys = 0x100000000UL;
773   - imx8_mem_map[2].size = 0x100000000UL;
  771 + imx8_mem_map[2].virt = 0x40000000UL;
  772 + imx8_mem_map[2].phys = 0x40000000UL;
  773 + imx8_mem_map[2].size = 0x40000000UL;
774 774 imx8_mem_map[2].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  775 + PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN;
  776 +
  777 + imx8_mem_map[3].virt = 0x80000000UL;
  778 + imx8_mem_map[3].phys = 0x80000000UL;
  779 + imx8_mem_map[3].size = 0x80000000UL;
  780 + imx8_mem_map[3].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE);
  781 +
  782 + imx8_mem_map[4].virt = 0x100000000UL;
  783 + imx8_mem_map[4].phys = 0x100000000UL;
  784 + imx8_mem_map[4].size = 0x100000000UL;
  785 + imx8_mem_map[4].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
775 786 PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN;
776 787  
777 788 icache_enable();