Eric Lee / smarc-uboot

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Commit 10697704ca579850b0edc0e772671c32586d76ee

Authored by Tom Rini
2 parents 482cbd553d b2d387bceb
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

Merge branch 'master' of git://git.denx.de/u-boot-atmel

Showing 41 changed files Side-by-side Diff

arch/arm/mach-at91/Kconfig
Diff comments   View file @ 1069770
... ... @@ -66,6 +66,7 @@
66 66 config TARGET_AT91SAM9M10G45EK
67 67 bool "Atmel AT91SAM9M10G45-EK board"
68 68 select CPU_ARM926EJS
  69 + select SUPPORT_SPL
69 70  
70 71 config TARGET_PM9G45
71 72 bool "Ronetix pm9g45 board"
... ... @@ -74,6 +75,7 @@
74 75 config TARGET_AT91SAM9N12EK
75 76 bool "Atmel AT91SAM9N12-EK board"
76 77 select CPU_ARM926EJS
  78 + select SUPPORT_SPL
77 79  
78 80 config TARGET_AT91SAM9RLEK
79 81 bool "Atmel at91sam9rl reference board"
... ... @@ -82,6 +84,7 @@
82 84 config TARGET_AT91SAM9X5EK
83 85 bool "Atmel AT91SAM9X5-EK board"
84 86 select CPU_ARM926EJS
  87 + select SUPPORT_SPL
85 88  
86 89 config TARGET_SAMA5D3_XPLAINED
87 90 bool "SAMA5D3 Xplained board"
arch/arm/mach-at91/Makefile
Diff comments   View file @ 1069770
... ... @@ -2,6 +2,8 @@
2 2 ifneq ($(CONFIG_SPL_BUILD),)
3 3 obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
4 4 obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
  5 +obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
  6 +obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
5 7 obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
6 8 obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
7 9 obj-y += spl.o
arch/arm/mach-at91/arm926ejs/clock.c
Diff comments   View file @ 1069770
... ... @@ -195,50 +195,52 @@
195 195 void at91_plla_init(u32 pllar)
196 196 {
197 197 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
198   - int timeout = AT91_PLL_LOCK_TIMEOUT;
199 198  
200 199 writel(pllar, &pmc->pllar);
201   - while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
202   - timeout--;
203   - if (timeout == 0)
204   - break;
205   - }
  200 + while (!(readl(&pmc->sr) & AT91_PMC_LOCKA))
  201 + ;
206 202 }
207 203 void at91_pllb_init(u32 pllbr)
208 204 {
209 205 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
210   - int timeout = AT91_PLL_LOCK_TIMEOUT;
211 206  
212 207 writel(pllbr, &pmc->pllbr);
213   - while (!(readl(&pmc->sr) & (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
214   - timeout--;
215   - if (timeout == 0)
216   - break;
217   - }
  208 + while (!(readl(&pmc->sr) & AT91_PMC_LOCKB))
  209 + ;
218 210 }
219 211  
220 212 void at91_mck_init(u32 mckr)
221 213 {
222 214 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
223   - int timeout = AT91_PLL_LOCK_TIMEOUT;
224 215 u32 tmp;
225 216  
226 217 tmp = readl(&pmc->mckr);
227   - tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
228   - AT91_PMC_MCKR_MDIV_MASK |
229   - AT91_PMC_MCKR_PLLADIV_MASK |
230   - AT91_PMC_MCKR_CSS_MASK);
231   - tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
232   - AT91_PMC_MCKR_MDIV_MASK |
233   - AT91_PMC_MCKR_PLLADIV_MASK |
234   - AT91_PMC_MCKR_CSS_MASK);
  218 + tmp &= ~AT91_PMC_MCKR_PRES_MASK;
  219 + tmp |= mckr & AT91_PMC_MCKR_PRES_MASK;
235 220 writel(tmp, &pmc->mckr);
  221 + while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  222 + ;
236 223  
237   - while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) {
238   - timeout--;
239   - if (timeout == 0)
240   - break;
241   - }
  224 + tmp = readl(&pmc->mckr);
  225 + tmp &= ~AT91_PMC_MCKR_MDIV_MASK;
  226 + tmp |= mckr & AT91_PMC_MCKR_MDIV_MASK;
  227 + writel(tmp, &pmc->mckr);
  228 + while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  229 + ;
  230 +
  231 + tmp = readl(&pmc->mckr);
  232 + tmp &= ~AT91_PMC_MCKR_PLLADIV_MASK;
  233 + tmp |= mckr & AT91_PMC_MCKR_PLLADIV_MASK;
  234 + writel(tmp, &pmc->mckr);
  235 + while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  236 + ;
  237 +
  238 + tmp = readl(&pmc->mckr);
  239 + tmp &= ~AT91_PMC_MCKR_CSS_MASK;
  240 + tmp |= mckr & AT91_PMC_MCKR_CSS_MASK;
  241 + writel(tmp, &pmc->mckr);
  242 + while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  243 + ;
242 244 }
243 245  
244 246 void at91_periph_clk_enable(int id)
arch/arm/mach-at91/arm926ejs/timer.c
Diff comments   View file @ 1069770
... ... @@ -33,22 +33,6 @@
33 33  
34 34 #define TIMER_LOAD_VAL 0xfffff
35 35  
36   -static inline unsigned long long tick_to_time(unsigned long long tick)
37   -{
38   - tick *= CONFIG_SYS_HZ;
39   - do_div(tick, gd->arch.timer_rate_hz);
40   -
41   - return tick;
42   -}
43   -
44   -static inline unsigned long long usec_to_tick(unsigned long long usec)
45   -{
46   - usec *= gd->arch.timer_rate_hz;
47   - do_div(usec, 1000000);
48   -
49   - return usec;
50   -}
51   -
52 36 /*
53 37 * Use the PITC in full 32 bit incrementing mode
54 38 */
55 39  
... ... @@ -64,51 +48,8 @@
64 48 writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
65 49  
66 50 gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
67   - gd->arch.tbu = gd->arch.tbl = 0;
68 51  
69 52 return 0;
70   -}
71   -
72   -/*
73   - * Get the current 64 bit timer tick count
74   - */
75   -unsigned long long get_ticks(void)
76   -{
77   - at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
78   -
79   - ulong now = readl(&pit->piir);
80   -
81   - /* increment tbu if tbl has rolled over */
82   - if (now < gd->arch.tbl)
83   - gd->arch.tbu++;
84   - gd->arch.tbl = now;
85   - return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
86   -}
87   -
88   -void __udelay(unsigned long usec)
89   -{
90   - unsigned long long start;
91   - ulong tmo;
92   -
93   - start = get_ticks(); /* get current timestamp */
94   - tmo = usec_to_tick(usec); /* convert usecs to ticks */
95   - while ((get_ticks() - start) < tmo)
96   - ; /* loop till time has passed */
97   -}
98   -
99   -/*
100   - * get_timer(base) can be used to check for timeouts or
101   - * to measure elasped time relative to an event:
102   - *
103   - * ulong start_time = get_timer(0) sets start_time to the current
104   - * time value.
105   - * get_timer(start_time) returns the time elapsed since then.
106   - *
107   - * The time is used in CONFIG_SYS_HZ units!
108   - */
109   -ulong get_timer(ulong base)
110   -{
111   - return tick_to_time(get_ticks()) - base;
112 53 }
113 54  
114 55 /*
arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Diff comments   View file @ 1069770
  1 +/*
  2 + * Copyright (C) 2015 Atmel Corporation
  3 + * Bo Shen <voice.shen@atmel.com>
  4 + *
  5 + * SPDX-License-Identifier: GPL-2.0+
  6 + */
  7 +
  8 +MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
  9 + LENGTH = CONFIG_SPL_MAX_SIZE }
  10 +MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
  11 + LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
  12 +
  13 +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
  14 +OUTPUT_ARCH(arm)
  15 +ENTRY(_start)
  16 +SECTIONS
  17 +{
  18 + .text :
  19 + {
  20 + __start = .;
  21 + *(.vectors)
  22 + arch/arm/cpu/arm926ejs/start.o (.text*)
  23 + *(.text*)
  24 + } >.sram
  25 +
  26 + . = ALIGN(4);
  27 + .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
  28 +
  29 + . = ALIGN(4);
  30 + .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
  31 +
  32 + . = ALIGN(4);
  33 + __image_copy_end = .;
  34 +
  35 + .end :
  36 + {
  37 + *(.__end)
  38 + } >.sram
  39 +
  40 + .bss :
  41 + {
  42 + . = ALIGN(4);
  43 + __bss_start = .;
  44 + *(.bss*)
  45 + . = ALIGN(4);
  46 + __bss_end = .;
  47 + } >.sdram
  48 +}
arch/arm/mach-at91/armv7/timer.c
Diff comments   View file @ 1069770
... ... @@ -36,22 +36,6 @@
36 36  
37 37 #define TIMER_LOAD_VAL 0xfffff
38 38  
39   -static inline unsigned long long tick_to_time(unsigned long long tick)
40   -{
41   - tick *= CONFIG_SYS_HZ;
42   - do_div(tick, gd->arch.timer_rate_hz);
43   -
44   - return tick;
45   -}
46   -
47   -static inline unsigned long long usec_to_tick(unsigned long long usec)
48   -{
49   - usec *= gd->arch.timer_rate_hz;
50   - do_div(usec, 1000000);
51   -
52   - return usec;
53   -}
54   -
55 39 /*
56 40 * Use the PITC in full 32 bit incrementing mode
57 41 */
58 42  
... ... @@ -67,52 +51,7 @@
67 51  
68 52 gd->arch.timer_rate_hz = get_pit_clk_rate() / 16;
69 53  
70   - gd->arch.tbu = 0;
71   - gd->arch.tbl = 0;
72   -
73 54 return 0;
74   -}
75   -
76   -/*
77   - * Get the current 64 bit timer tick count
78   - */
79   -unsigned long long get_ticks(void)
80   -{
81   - at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
82   -
83   - ulong now = readl(&pit->piir);
84   -
85   - /* increment tbu if tbl has rolled over */
86   - if (now < gd->arch.tbl)
87   - gd->arch.tbu++;
88   - gd->arch.tbl = now;
89   - return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
90   -}
91   -
92   -void __udelay(unsigned long usec)
93   -{
94   - unsigned long long start;
95   - ulong tmo;
96   -
97   - start = get_ticks(); /* get current timestamp */
98   - tmo = usec_to_tick(usec); /* convert usecs to ticks */
99   - while ((get_ticks() - start) < tmo)
100   - ; /* loop till time has passed */
101   -}
102   -
103   -/*
104   - * get_timer(base) can be used to check for timeouts or
105   - * to measure elasped time relative to an event:
106   - *
107   - * ulong start_time = get_timer(0) sets start_time to the current
108   - * time value.
109   - * get_timer(start_time) returns the time elapsed since then.
110   - *
111   - * The time is used in CONFIG_SYS_HZ units!
112   - */
113   -ulong get_timer(ulong base)
114   -{
115   - return tick_to_time(get_ticks()) - base;
116 55 }
117 56  
118 57 /*
arch/arm/mach-at91/include/mach/at91_pmc.h
Diff comments   View file @ 1069770
... ... @@ -97,7 +97,8 @@
97 97 #define AT91_PMC_MCKR_CSS_PLLB 0x00000003
98 98 #define AT91_PMC_MCKR_CSS_MASK 0x00000003
99 99  
100   -#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
  100 +#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
  101 + defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
101 102 #define AT91_PMC_MCKR_PRES_1 0x00000000
102 103 #define AT91_PMC_MCKR_PRES_2 0x00000010
103 104 #define AT91_PMC_MCKR_PRES_4 0x00000020
... ... @@ -126,7 +127,8 @@
126 127 #else
127 128 #define AT91_PMC_MCKR_MDIV_1 0x00000000
128 129 #define AT91_PMC_MCKR_MDIV_2 0x00000100
129   -#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
  130 +#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
  131 + defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
130 132 #define AT91_PMC_MCKR_MDIV_3 0x00000300
131 133 #endif
132 134 #define AT91_PMC_MCKR_MDIV_4 0x00000200
arch/arm/mach-at91/include/mach/at91sam9260.h
Diff comments   View file @ 1069770
... ... @@ -133,6 +133,9 @@
133 133 #define ATMEL_BASE_CS6 0x70000000
134 134 #define ATMEL_BASE_CS7 0x80000000
135 135  
  136 +/* Timer */
  137 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
  138 +
136 139 /*
137 140 * Other misc defines
138 141 */
arch/arm/mach-at91/include/mach/at91sam9261.h
Diff comments   View file @ 1069770
... ... @@ -117,6 +117,9 @@
117 117 #define ATMEL_BASE_CS6 0x70000000
118 118 #define ATMEL_BASE_CS7 0x80000000
119 119  
  120 +/* Timer */
  121 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
  122 +
120 123 /*
121 124 * Other misc defines
122 125 */
arch/arm/mach-at91/include/mach/at91sam9263.h
Diff comments   View file @ 1069770
... ... @@ -132,6 +132,9 @@
132 132 #define ATMEL_BASE_CS6 0x70000000
133 133 #define ATMEL_BASE_CS7 0x80000000
134 134  
  135 +/* Timer */
  136 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
  137 +
135 138 /*
136 139 * Other misc defines
137 140 */
arch/arm/mach-at91/include/mach/at91sam9g45.h
Diff comments   View file @ 1069770
... ... @@ -136,6 +136,9 @@
136 136 #define ATMEL_BASE_CS6 0x70000000
137 137 #define ATMEL_BASE_CS7 0x80000000
138 138  
  139 +/* Timer */
  140 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
  141 +
139 142 /*
140 143 * Other misc defines
141 144 */
arch/arm/mach-at91/include/mach/at91sam9rl.h
Diff comments   View file @ 1069770
... ... @@ -116,6 +116,9 @@
116 116 #define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */
117 117 #define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */
118 118  
  119 +/* Timer */
  120 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c
  121 +
119 122 /*
120 123 * Other misc defines
121 124 */
arch/arm/mach-at91/include/mach/at91sam9x5.h
Diff comments   View file @ 1069770
... ... @@ -124,6 +124,16 @@
124 124 #define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */
125 125 #endif
126 126  
  127 +/*
  128 + * External memory
  129 + */
  130 +#define ATMEL_BASE_CS0 0x10000000
  131 +#define ATMEL_BASE_CS1 0x20000000
  132 +#define ATMEL_BASE_CS2 0x30000000
  133 +#define ATMEL_BASE_CS3 0x40000000
  134 +#define ATMEL_BASE_CS4 0x50000000
  135 +#define ATMEL_BASE_CS5 0x60000000
  136 +
127 137 /* 9x5 series chip id definitions */
128 138 #define ARCH_ID_AT91SAM9X5 0x819a05a0
129 139 #define ARCH_ID_VERSION_MASK 0x1f
... ... @@ -153,6 +163,9 @@
153 163 #else /* AT91SAM9X5 */
154 164 #define ATMEL_CPU_NAME get_cpu_name()
155 165 #endif
  166 +
  167 +/* Timer */
  168 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
156 169  
157 170 /*
158 171 * Other misc defines
arch/arm/mach-at91/include/mach/sama5d3.h
Diff comments   View file @ 1069770
... ... @@ -189,6 +189,9 @@
189 189 #define PIO_SCDR_DIV 0x3fff
190 190 #define CPU_HAS_PCR
191 191  
  192 +/* Timer */
  193 +#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
  194 +
192 195 /*
193 196 * PMECC table in ROM
194 197 */
arch/arm/mach-at91/include/mach/sama5d4.h
Diff comments   View file @ 1069770
... ... @@ -193,6 +193,9 @@
193 193 #define cpu_is_sama5d44() (cpu_is_sama5d4() && \
194 194 (get_extension_chip_id() == ARCH_EXID_SAMA5D44))
195 195  
  196 +/* Timer */
  197 +#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
  198 +
196 199 /*
197 200 * No PMECC Galois table in ROM
198 201 */
arch/arm/mach-at91/mpddrc.c
Diff comments   View file @ 1069770
... ... @@ -19,7 +19,8 @@
19 19  
20 20 static int ddr2_decodtype_is_seq(u32 cr)
21 21 {
22   -#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
  22 +#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
  23 + defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
23 24 if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
24 25 return 0;
25 26 #endif
arch/arm/mach-at91/spl.c
Diff comments   View file @ 1069770
... ... @@ -29,7 +29,7 @@
29 29 return BOOT_DEVICE_MMC1;
30 30 #elif CONFIG_SYS_USE_NANDFLASH
31 31 return BOOT_DEVICE_NAND;
32   -#elif CONFIG_SYS_USE_SERIALFLASH
  32 +#elif CONFIG_SYS_USE_SERIALFLASH || CONFIG_SYS_USE_SPIFLASH
33 33 return BOOT_DEVICE_SPI;
34 34 #endif
35 35 return BOOT_DEVICE_NONE;
arch/arm/mach-at91/spl_at91.c
Diff comments   View file @ 1069770
... ... @@ -71,8 +71,12 @@
71 71 {
72 72 }
73 73  
74   -void spl_board_init(void)
  74 +void __weak spl_board_init(void)
75 75 {
  76 +}
  77 +
  78 +void board_init_f(ulong dummy)
  79 +{
76 80 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
77 81  
78 82 lowlevel_clock_init();
79 83  
... ... @@ -111,9 +115,14 @@
111 115 timer_init();
112 116  
113 117 /* enable clocks for all PIOs */
  118 +#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
  119 + at91_periph_clk_enable(ATMEL_ID_PIOAB);
  120 + at91_periph_clk_enable(ATMEL_ID_PIOCD);
  121 +#else
114 122 at91_periph_clk_enable(ATMEL_ID_PIOA);
115 123 at91_periph_clk_enable(ATMEL_ID_PIOB);
116 124 at91_periph_clk_enable(ATMEL_ID_PIOC);
  125 +#endif
117 126 /* init console */
118 127 at91_seriald_hw_init();
119 128 preloader_console_init();
arch/arm/mach-at91/spl_atmel.c
Diff comments   View file @ 1069770
... ... @@ -70,8 +70,13 @@
70 70 /* This only be used for sama5d4 soc now */
71 71 }
72 72  
  73 +/* empty stub to satisfy current lowlevel_init, can be removed any time */
73 74 void s_init(void)
74 75 {
  76 +}
  77 +
  78 +void board_init_f(ulong dummy)
  79 +{
75 80 switch_to_main_crystal_osc();
76 81  
77 82 /* disable watchdog */
... ... @@ -93,5 +98,10 @@
93 98 preloader_console_init();
94 99  
95 100 mem_init();
  101 +
  102 + /* Clear the BSS. */
  103 + memset(__bss_start, 0, __bss_end - __bss_start);
  104 +
  105 + board_init_r(NULL, 0);
96 106 }
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
Diff comments   View file @ 1069770
... ... @@ -8,6 +8,7 @@
8 8  
9 9 #include <common.h>
10 10 #include <asm/io.h>
  11 +#include <asm/arch/clk.h>
11 12 #include <asm/arch/at91sam9g45_matrix.h>
12 13 #include <asm/arch/at91sam9_smc.h>
13 14 #include <asm/arch/at91_common.h>
... ... @@ -15,6 +16,7 @@
15 16 #include <asm/arch/gpio.h>
16 17 #include <asm/arch/clk.h>
17 18 #include <lcd.h>
  19 +#include <linux/mtd/nand.h>
18 20 #include <atmel_lcdc.h>
19 21 #include <atmel_mci.h>
20 22 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
... ... @@ -68,6 +70,84 @@
68 70  
69 71 /* Enable NandFlash */
70 72 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  73 +}
  74 +#endif
  75 +
  76 +#if defined(CONFIG_SPL_BUILD)
  77 +#include <spl.h>
  78 +#include <nand.h>
  79 +
  80 +void at91_spl_board_init(void)
  81 +{
  82 + /*
  83 + * On the at91sam9m10g45ek board, the chip wm9711 stays in the
  84 + * test mode, so it needs do some action to exit test mode.
  85 + */
  86 + at91_periph_clk_enable(ATMEL_ID_PIODE);
  87 + at91_set_gpio_output(AT91_PIN_PD7, 0);
  88 + at91_set_gpio_output(AT91_PIN_PD8, 0);
  89 + at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1);
  90 + at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1);
  91 +
  92 +#ifdef CONFIG_SYS_USE_MMC
  93 + at91_mci_hw_init();
  94 +#elif CONFIG_SYS_USE_NANDFLASH
  95 + at91sam9m10g45ek_nand_hw_init();
  96 +#endif
  97 +}
  98 +
  99 +#include <asm/arch/atmel_mpddrc.h>
  100 +static void ddr2_conf(struct atmel_mpddr *ddr2)
  101 +{
  102 + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
  103 +
  104 + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
  105 + ATMEL_MPDDRC_CR_NR_ROW_14 |
  106 + ATMEL_MPDDRC_CR_DQMS_SHARED |
  107 + ATMEL_MPDDRC_CR_CAS_DDR_CAS3);
  108 +
  109 + ddr2->rtr = 0x24b;
  110 +
  111 + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */
  112 + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */
  113 + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */
  114 + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 60 ns */
  115 + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */
  116 + 1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/
  117 + 1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */
  118 + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */
  119 +
  120 + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */
  121 + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
  122 + 16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
  123 + 14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
  124 +
  125 + ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
  126 + 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
  127 + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
  128 + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
  129 +}
  130 +
  131 +void mem_init(void)
  132 +{
  133 + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  134 + struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  135 + struct atmel_mpddr ddr2;
  136 + unsigned long csa;
  137 +
  138 + ddr2_conf(&ddr2);
  139 +
  140 + /* enable DDR2 clock */
  141 + writel(0x4, &pmc->scer);
  142 +
  143 + /* Chip select 1 is for DDR2/SDRAM */
  144 + csa = readl(&mat->ebicsa);
  145 + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
  146 + csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
  147 + writel(csa, &mat->ebicsa);
  148 +
  149 + /* DDRAM2 Controller initialize */
  150 + ddr2_init(ATMEL_BASE_CS6, &ddr2);
71 151 }
72 152 #endif
73 153  
board/atmel/at91sam9n12ek/at91sam9n12ek.c
Diff comments   View file @ 1069770
... ... @@ -257,4 +257,77 @@
257 257 CONFIG_SYS_SDRAM_SIZE);
258 258 return 0;
259 259 }
  260 +
  261 +#if defined(CONFIG_SPL_BUILD)
  262 +#include <spl.h>
  263 +#include <nand.h>
  264 +
  265 +void at91_spl_board_init(void)
  266 +{
  267 +#ifdef CONFIG_SYS_USE_MMC
  268 + at91_mci_hw_init();
  269 +#elif CONFIG_SYS_USE_NANDFLASH
  270 + at91sam9n12ek_nand_hw_init();
  271 +#elif CONFIG_SYS_USE_SPIFLASH
  272 + at91_spi0_hw_init(1 << 4);
  273 +#endif
  274 +}
  275 +
  276 +#include <asm/arch/atmel_mpddrc.h>
  277 +static void ddr2_conf(struct atmel_mpddr *ddr2)
  278 +{
  279 + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
  280 +
  281 + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
  282 + ATMEL_MPDDRC_CR_NR_ROW_13 |
  283 + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
  284 + ATMEL_MPDDRC_CR_NB_8BANKS |
  285 + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
  286 +
  287 + ddr2->rtr = 0x411;
  288 +
  289 + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
  290 + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
  291 + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
  292 + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
  293 + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
  294 + 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
  295 + 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
  296 + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
  297 +
  298 + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
  299 + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
  300 + 19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
  301 + 18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
  302 +
  303 + ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
  304 + 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
  305 + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
  306 + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
  307 +}
  308 +
  309 +void mem_init(void)
  310 +{
  311 + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  312 + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  313 + struct atmel_mpddr ddr2;
  314 + unsigned long csa;
  315 +
  316 + ddr2_conf(&ddr2);
  317 +
  318 + /* enable DDR2 clock */
  319 + writel(0x4, &pmc->scer);
  320 +
  321 + /* Chip select 1 is for DDR2/SDRAM */
  322 + csa = readl(&matrix->ebicsa);
  323 + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
  324 + csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
  325 + csa |= AT91_MATRIX_EBI_DBPD_OFF;
  326 + csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
  327 + writel(csa, &matrix->ebicsa);
  328 +
  329 + /* DDRAM2 Controller initialize */
  330 + ddr2_init(ATMEL_BASE_CS1, &ddr2);
  331 +}
  332 +#endif
board/atmel/at91sam9x5ek/at91sam9x5ek.c
Diff comments   View file @ 1069770
... ... @@ -293,4 +293,78 @@
293 293 CONFIG_SYS_SDRAM_SIZE);
294 294 return 0;
295 295 }
  296 +
  297 +#if defined(CONFIG_SPL_BUILD)
  298 +#include <spl.h>
  299 +#include <nand.h>
  300 +
  301 +void at91_spl_board_init(void)
  302 +{
  303 +#ifdef CONFIG_SYS_USE_MMC
  304 + at91_mci_hw_init();
  305 +#elif CONFIG_SYS_USE_NANDFLASH
  306 + at91sam9x5ek_nand_hw_init();
  307 +#elif CONFIG_SYS_USE_SPIFLASH
  308 + at91_spi0_hw_init(1 << 4);
  309 +#endif
  310 +}
  311 +
  312 +#include <asm/arch/atmel_mpddrc.h>
  313 +static void ddr2_conf(struct atmel_mpddr *ddr2)
  314 +{
  315 + ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
  316 +
  317 + ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
  318 + ATMEL_MPDDRC_CR_NR_ROW_13 |
  319 + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
  320 + ATMEL_MPDDRC_CR_NB_8BANKS |
  321 + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
  322 +
  323 + ddr2->rtr = 0x411;
  324 +
  325 + ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
  326 + 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
  327 + 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
  328 + 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
  329 + 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
  330 + 2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
  331 + 2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
  332 + 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
  333 +
  334 + ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
  335 + 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
  336 + 19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
  337 + 18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
  338 +
  339 + ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET |
  340 + 2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
  341 + 3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
  342 + 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
  343 + 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
  344 +}
  345 +
  346 +void mem_init(void)
  347 +{
  348 + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  349 + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  350 + struct atmel_mpddr ddr2;
  351 + unsigned long csa;
  352 +
  353 + ddr2_conf(&ddr2);
  354 +
  355 + /* enable DDR2 clock */
  356 + writel(0x4, &pmc->scer);
  357 +
  358 + /* Chip select 1 is for DDR2/SDRAM */
  359 + csa = readl(&matrix->ebicsa);
  360 + csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
  361 + csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
  362 + csa |= AT91_MATRIX_EBI_DBPD_OFF;
  363 + csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
  364 + writel(csa, &matrix->ebicsa);
  365 +
  366 + /* DDRAM2 Controller initialize */
  367 + ddr2_init(ATMEL_BASE_CS1, &ddr2);
  368 +}
  369 +#endif
board/atmel/sama5d4_xplained/sama5d4_xplained.c
Diff comments   View file @ 1069770
... ... @@ -24,6 +24,7 @@
24 24 #include <netdev.h>
25 25 #include <nand.h>
26 26 #include <spi.h>
  27 +#include <version.h>
27 28  
28 29 DECLARE_GLOBAL_DATA_PTR;
29 30  
... ... @@ -179,6 +180,7 @@
179 180 int i;
180 181 char temp[32];
181 182  
  183 + lcd_printf("%s\n", U_BOOT_VERSION);
182 184 lcd_printf("2014 ATMEL Corp\n");
183 185 lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
184 186 strmhz(temp, get_cpu_clk_rate()));
board/atmel/sama5d4ek/sama5d4ek.c
Diff comments   View file @ 1069770
... ... @@ -24,6 +24,7 @@
24 24 #include <netdev.h>
25 25 #include <nand.h>
26 26 #include <spi.h>
  27 +#include <version.h>
27 28  
28 29 DECLARE_GLOBAL_DATA_PTR;
29 30  
... ... @@ -174,6 +175,7 @@
174 175 int i;
175 176 char temp[32];
176 177  
  178 + lcd_printf("%s\n", U_BOOT_VERSION);
177 179 lcd_printf("2014 ATMEL Corp\n");
178 180 lcd_printf("at91@atmel.com\n");
179 181 lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
configs/at91sam9m10g45ek_mmc_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/at91sam9m10g45ek_nandflash_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/at91sam9n12ek_nandflash_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/at91sam9n12ek_spiflash_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/at91sam9x5ek_nandflash_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/at91sam9x5ek_spiflash_defconfig
Diff comments   View file @ 1069770
  1 +CONFIG_SPL=y
1 2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
2 3 CONFIG_ARM=y
3 4 CONFIG_ARCH_AT91=y
configs/corvus_defconfig
Diff comments   View file @ 1069770
1 1 CONFIG_SPL=y
2   -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
  2 +CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
3 3 CONFIG_ARM=y
4 4 CONFIG_ARCH_AT91=y
5 5 CONFIG_TARGET_CORVUS=y
drivers/mtd/nand/atmel_nand.c
Diff comments   View file @ 1069770
... ... @@ -1456,6 +1456,9 @@
1456 1456 nand->dev_ready = at91_nand_wait_ready;
1457 1457 #endif
1458 1458 nand->chip_delay = 20;
  1459 +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
  1460 + nand->bbt_options |= NAND_BBT_USE_FLASH;
  1461 +#endif
1459 1462  
1460 1463 #ifdef CONFIG_ATMEL_NAND_HWECC
1461 1464 #ifdef CONFIG_ATMEL_NAND_HW_PMECC
... ... @@ -1522,6 +1525,9 @@
1522 1525 nand->dev_ready = at91_nand_ready;
1523 1526 #endif
1524 1527 nand->chip_delay = 75;
  1528 +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
  1529 + nand->bbt_options |= NAND_BBT_USE_FLASH;
  1530 +#endif
1525 1531  
1526 1532 ret = nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL);
1527 1533 if (ret)
include/configs/at91-sama5_common.h
Diff comments   View file @ 1069770
  1 +/*
  2 + * Common part of configuration settings for the AT91 SAMA5 board.
  3 + *
  4 + * Copyright (C) 2015 Atmel Corporation
  5 + * Josh Wu <josh.wu@atmel.com>
  6 + *
  7 + * SPDX-License-Identifier: GPL-2.0+
  8 + */
  9 +
  10 +#ifndef __AT91_SAMA5_COMMON_H
  11 +#define __AT91_SAMA5_COMMON_H
  12 +
  13 +#include <asm/hardware.h>
  14 +
  15 +#define CONFIG_SYS_TEXT_BASE 0x26f00000
  16 +
  17 +/* ARM asynchronous clock */
  18 +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
  19 +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
  20 +
  21 +#define CONFIG_ARCH_CPU_INIT
  22 +
  23 +#ifndef CONFIG_SPL_BUILD
  24 +#define CONFIG_SKIP_LOWLEVEL_INIT
  25 +#endif
  26 +
  27 +#define CONFIG_BOARD_EARLY_INIT_F
  28 +#define CONFIG_DISPLAY_CPUINFO
  29 +
  30 +#define CONFIG_CMD_BOOTZ
  31 +#define CONFIG_OF_LIBFDT /* Device Tree support */
  32 +
  33 +#define CONFIG_SYS_GENERIC_BOARD
  34 +
  35 +/* general purpose I/O */
  36 +#define CONFIG_AT91_GPIO
  37 +
  38 +#define CONFIG_BOOTDELAY 3
  39 +
  40 +/*
  41 + * BOOTP options
  42 + */
  43 +#define CONFIG_BOOTP_BOOTFILESIZE
  44 +#define CONFIG_BOOTP_BOOTPATH
  45 +#define CONFIG_BOOTP_GATEWAY
  46 +#define CONFIG_BOOTP_HOSTNAME
  47 +
  48 +/*
  49 + * Command line configuration.
  50 + */
  51 +#include <config_cmd_default.h>
  52 +#undef CONFIG_CMD_FPGA
  53 +#undef CONFIG_CMD_IMI
  54 +#undef CONFIG_CMD_LOADS
  55 +#define CONFIG_CMD_PING
  56 +#define CONFIG_CMD_DHCP
  57 +#define CONFIG_CMD_SETEXPR
  58 +
  59 +#ifdef CONFIG_SYS_USE_MMC
  60 +#define CONFIG_BOOTARGS \
  61 + "console=ttyS0,115200 earlyprintk " \
  62 + "root=/dev/mmcblk0p2 rw rootwait"
  63 +#else
  64 +#define CONFIG_BOOTARGS \
  65 + "console=ttyS0,115200 earlyprintk " \
  66 + "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
  67 + "256K(env),256k(evn_redundent),256k(spare)," \
  68 + "512k(dtb),6M(kernel)ro,-(rootfs) " \
  69 + "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
  70 +#endif
  71 +
  72 +#define CONFIG_BAUDRATE 115200
  73 +
  74 +#define CONFIG_SYS_PROMPT "U-Boot> "
  75 +#define CONFIG_SYS_CBSIZE 256
  76 +#define CONFIG_SYS_MAXARGS 16
  77 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  78 + sizeof(CONFIG_SYS_PROMPT) + 16)
  79 +#define CONFIG_SYS_LONGHELP
  80 +#define CONFIG_CMDLINE_EDITING
  81 +#define CONFIG_AUTO_COMPLETE
  82 +#define CONFIG_SYS_HUSH_PARSER
  83 +
  84 +/* Size of malloc() pool */
  85 +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
  86 +
  87 +#endif
include/configs/at91sam9m10g45ek.h
Diff comments   View file @ 1069770
... ... @@ -203,5 +203,63 @@
203 203 */
204 204 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
205 205  
  206 +/* Defines for SPL */
  207 +#define CONFIG_SPL_FRAMEWORK
  208 +#define CONFIG_SPL_TEXT_BASE 0x300000
  209 +#define CONFIG_SPL_MAX_SIZE 0x010000
  210 +#define CONFIG_SPL_STACK 0x310000
  211 +
  212 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  213 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  214 +#define CONFIG_SPL_SERIAL_SUPPORT
  215 +#define CONFIG_SPL_GPIO_SUPPORT
  216 +
  217 +#define CONFIG_SYS_MONITOR_LEN 0x80000
  218 +
  219 +#ifdef CONFIG_SYS_USE_MMC
  220 +
  221 +#define CONFIG_SPL_BSS_START_ADDR 0x70000000
  222 +#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
  223 +#define CONFIG_SYS_SPL_MALLOC_START 0x70080000
  224 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
  225 +
  226 +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
  227 +#define CONFIG_SPL_MMC_SUPPORT
  228 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
  229 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
  230 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  231 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  232 +#define CONFIG_SPL_FAT_SUPPORT
  233 +#define CONFIG_SPL_LIBDISK_SUPPORT
  234 +
  235 +#elif CONFIG_SYS_USE_NANDFLASH
  236 +#define CONFIG_SPL_NAND_SUPPORT
  237 +#define CONFIG_SPL_NAND_DRIVERS
  238 +#define CONFIG_SPL_NAND_BASE
  239 +#define CONFIG_SPL_NAND_ECC
  240 +#define CONFIG_SPL_NAND_SOFTECC
  241 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
  242 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
  243 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE
  244 +
  245 +#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  246 +#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  247 +#define CONFIG_SYS_NAND_PAGE_COUNT 64
  248 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  249 +#define CONFIG_SYS_NAND_ECCSIZE 256
  250 +#define CONFIG_SYS_NAND_ECCBYTES 3
  251 +#define CONFIG_SYS_NAND_OOBSIZE 64
  252 +#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  253 + 48, 49, 50, 51, 52, 53, 54, 55, \
  254 + 56, 57, 58, 59, 60, 61, 62, 63, }
  255 +#endif
  256 +
  257 +#define CONFIG_SPL_ATMEL_SIZE
  258 +#define CONFIG_SYS_MASTER_CLOCK 132096000
  259 +#define CONFIG_SYS_AT91_PLLA 0x20c73f03
  260 +#define CONFIG_SYS_MCKR 0x1301
  261 +#define CONFIG_SYS_MCKR_CSS 0x1302
  262 +
  263 +#define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC0
206 264 #endif
include/configs/at91sam9n12ek.h
Diff comments   View file @ 1069770
... ... @@ -201,11 +201,22 @@
201 201 #else /* CONFIG_SYS_USE_MMC */
202 202  
203 203 /* bootstrap + u-boot + env + linux in mmc */
204   -#define CONFIG_ENV_IS_IN_MMC
205   -/* For FAT system, most cases it should be in the reserved sector */
  204 +
  205 +#ifdef CONFIG_ENV_IS_IN_MMC
  206 +/* Use raw reserved sectors to save environment */
206 207 #define CONFIG_ENV_OFFSET 0x2000
207 208 #define CONFIG_ENV_SIZE 0x1000
208 209 #define CONFIG_SYS_MMC_ENV_DEV 0
  210 +#else
  211 +/* Use file in FAT file to save environment */
  212 +#define CONFIG_ENV_IS_IN_FAT
  213 +#define CONFIG_FAT_WRITE
  214 +#define FAT_ENV_INTERFACE "mmc"
  215 +#define FAT_ENV_FILE "uboot.env"
  216 +#define FAT_ENV_DEVICE_AND_PART "0"
  217 +#define CONFIG_ENV_SIZE 0x4000
  218 +#endif
  219 +
209 220 #define CONFIG_BOOTCOMMAND \
210 221 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
211 222 "fatload mmc 0:1 0x21000000 dtb;" \
... ... @@ -228,7 +239,63 @@
228 239 * Size of malloc() pool
229 240 */
230 241 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
231   -#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
  242 +
  243 +/* SPL */
  244 +#define CONFIG_SPL_FRAMEWORK
  245 +#define CONFIG_SPL_TEXT_BASE 0x300000
  246 +#define CONFIG_SPL_MAX_SIZE 0x6000
  247 +#define CONFIG_SPL_STACK 0x308000
  248 +
  249 +#define CONFIG_SPL_BSS_START_ADDR 0x20000000
  250 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  251 +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  252 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  253 +
  254 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  255 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  256 +#define CONFIG_SPL_GPIO_SUPPORT
  257 +#define CONFIG_SPL_SERIAL_SUPPORT
  258 +
  259 +#define CONFIG_SPL_BOARD_INIT
  260 +#define CONFIG_SYS_MONITOR_LEN (512 << 10)
  261 +
  262 +#define CONFIG_SYS_MASTER_CLOCK 132096000
  263 +#define CONFIG_SYS_AT91_PLLA 0x20953f03
  264 +#define CONFIG_SYS_MCKR 0x1301
  265 +#define CONFIG_SYS_MCKR_CSS 0x1302
  266 +
  267 +#define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC
  268 +
  269 +#ifdef CONFIG_SYS_USE_MMC
  270 +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
  271 +#define CONFIG_SPL_MMC_SUPPORT
  272 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
  273 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
  274 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  275 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  276 +#define CONFIG_SPL_FAT_SUPPORT
  277 +#define CONFIG_SPL_LIBDISK_SUPPORT
  278 +
  279 +#elif CONFIG_SYS_USE_NANDFLASH
  280 +#define CONFIG_SPL_NAND_SUPPORT
  281 +#define CONFIG_SPL_NAND_DRIVERS
  282 +#define CONFIG_SPL_NAND_BASE
  283 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
  284 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE
  285 +#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  286 +#define CONFIG_SYS_NAND_PAGE_COUNT 64
  287 +#define CONFIG_SYS_NAND_OOBSIZE 64
  288 +#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  289 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  290 +#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
  291 +
  292 +#elif CONFIG_SYS_USE_SPIFLASH
  293 +#define CONFIG_SPL_SPI_SUPPORT
  294 +#define CONFIG_SPL_SPI_FLASH_SUPPORT
  295 +#define CONFIG_SPL_SPI_LOAD
  296 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
  297 +
  298 +#endif
232 299  
233 300 #endif
include/configs/at91sam9x5ek.h
Diff comments   View file @ 1069770
... ... @@ -243,5 +243,62 @@
243 243 */
244 244 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
245 245  
  246 +/* SPL */
  247 +#define CONFIG_SPL_FRAMEWORK
  248 +#define CONFIG_SPL_TEXT_BASE 0x300000
  249 +#define CONFIG_SPL_MAX_SIZE 0x6000
  250 +#define CONFIG_SPL_STACK 0x308000
  251 +
  252 +#define CONFIG_SPL_BSS_START_ADDR 0x20000000
  253 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
  254 +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
  255 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
  256 +
  257 +#define CONFIG_SPL_LIBCOMMON_SUPPORT
  258 +#define CONFIG_SPL_LIBGENERIC_SUPPORT
  259 +#define CONFIG_SPL_GPIO_SUPPORT
  260 +#define CONFIG_SPL_SERIAL_SUPPORT
  261 +
  262 +#define CONFIG_SPL_BOARD_INIT
  263 +#define CONFIG_SYS_MONITOR_LEN (512 << 10)
  264 +
  265 +#define CONFIG_SYS_MASTER_CLOCK 132096000
  266 +#define CONFIG_SYS_AT91_PLLA 0x20c73f03
  267 +#define CONFIG_SYS_MCKR 0x1301
  268 +#define CONFIG_SYS_MCKR_CSS 0x1302
  269 +
  270 +#define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC
  271 +
  272 +#ifdef CONFIG_SYS_USE_MMC
  273 +#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
  274 +#define CONFIG_SPL_MMC_SUPPORT
  275 +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
  276 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
  277 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  278 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  279 +#define CONFIG_SPL_FAT_SUPPORT
  280 +#define CONFIG_SPL_LIBDISK_SUPPORT
  281 +
  282 +#elif CONFIG_SYS_USE_NANDFLASH
  283 +#define CONFIG_SPL_NAND_SUPPORT
  284 +#define CONFIG_SPL_NAND_DRIVERS
  285 +#define CONFIG_SPL_NAND_BASE
  286 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
  287 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE
  288 +#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
  289 +#define CONFIG_SYS_NAND_PAGE_COUNT 64
  290 +#define CONFIG_SYS_NAND_OOBSIZE 64
  291 +#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
  292 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
  293 +#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
  294 +
  295 +#elif CONFIG_SYS_USE_SPIFLASH
  296 +#define CONFIG_SPL_SPI_SUPPORT
  297 +#define CONFIG_SPL_SPI_FLASH_SUPPORT
  298 +#define CONFIG_SPL_SPI_LOAD
  299 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
  300 +
  301 +#endif
  302 +
246 303 #endif
include/configs/corvus.h
Diff comments   View file @ 1069770
... ... @@ -16,9 +16,6 @@
16 16  
17 17 #include <asm/hardware.h>
18 18  
19   -#define MACH_TYPE_CORVUS 2066
20   -
21   -#define CONFIG_MACH_TYPE MACH_TYPE_CORVUS
22 19 #define CONFIG_SYS_GENERIC_BOARD
23 20 /*
24 21 * Warning: changing CONFIG_SYS_TEXT_BASE requires
include/configs/sama5d3_xplained.h
Diff comments   View file @ 1069770
... ... @@ -10,31 +10,11 @@
10 10 #ifndef __CONFIG_H
11 11 #define __CONFIG_H
12 12  
13   -#include <asm/hardware.h>
  13 +/* No NOR flash, this definition should put before common header */
  14 +#define CONFIG_SYS_NO_FLASH
14 15  
15   -#define CONFIG_SYS_TEXT_BASE 0x26f00000
  16 +#include "at91-sama5_common.h"
16 17  
17   -/* ARM asynchronous clock */
18   -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
19   -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
20   -
21   -#define CONFIG_ARCH_CPU_INIT
22   -
23   -#ifndef CONFIG_SPL_BUILD
24   -#define CONFIG_SKIP_LOWLEVEL_INIT
25   -#endif
26   -
27   -#define CONFIG_BOARD_EARLY_INIT_F
28   -#define CONFIG_DISPLAY_CPUINFO
29   -
30   -#define CONFIG_CMD_BOOTZ
31   -#define CONFIG_OF_LIBFDT /* Device Tree support */
32   -
33   -#define CONFIG_SYS_GENERIC_BOARD
34   -
35   -/* general purpose I/O */
36   -#define CONFIG_AT91_GPIO
37   -
38 18 /* serial console */
39 19 #define CONFIG_ATMEL_USART
40 20 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
... ... @@ -51,29 +31,6 @@
51 31 */
52 32 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
53 33  
54   -#define CONFIG_BOOTDELAY 3
55   -
56   -/*
57   - * BOOTP options
58   - */
59   -#define CONFIG_BOOTP_BOOTFILESIZE
60   -#define CONFIG_BOOTP_BOOTPATH
61   -#define CONFIG_BOOTP_GATEWAY
62   -#define CONFIG_BOOTP_HOSTNAME
63   -
64   -/* No NOR flash */
65   -#define CONFIG_SYS_NO_FLASH
66   -
67   -/*
68   - * Command line configuration.
69   - */
70   -#include <config_cmd_default.h>
71   -#undef CONFIG_CMD_FPGA
72   -#undef CONFIG_CMD_IMI
73   -#undef CONFIG_CMD_LOADS
74   -#define CONFIG_CMD_PING
75   -#define CONFIG_CMD_DHCP
76   -
77 34 /* SDRAM */
78 35 #define CONFIG_NR_DRAM_BANKS 1
79 36 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
... ... @@ -180,34 +137,6 @@
180 137 #else
181 138 #define CONFIG_ENV_IS_NOWHERE
182 139 #endif
183   -
184   -#ifdef CONFIG_SYS_USE_MMC
185   -#define CONFIG_BOOTARGS \
186   - "console=ttyS0,115200 earlyprintk " \
187   - "root=/dev/mmcblk0p2 rw rootwait"
188   -#else
189   -#define CONFIG_BOOTARGS \
190   - "console=ttyS0,115200 earlyprintk " \
191   - "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
192   - "256K(env),256k(evn_redundent),256k(spare)," \
193   - "512k(dtb),6M(kernel)ro,-(rootfs) " \
194   - "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
195   -#endif
196   -
197   -#define CONFIG_BAUDRATE 115200
198   -
199   -#define CONFIG_SYS_PROMPT "U-Boot> "
200   -#define CONFIG_SYS_CBSIZE 256
201   -#define CONFIG_SYS_MAXARGS 16
202   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
203   - sizeof(CONFIG_SYS_PROMPT) + 16)
204   -#define CONFIG_SYS_LONGHELP
205   -#define CONFIG_CMDLINE_EDITING
206   -#define CONFIG_AUTO_COMPLETE
207   -#define CONFIG_SYS_HUSH_PARSER
208   -
209   -/* Size of malloc() pool */
210   -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
211 140  
212 141 /* SPL */
213 142 #define CONFIG_SPL_FRAMEWORK
include/configs/sama5d3xek.h
Diff comments   View file @ 1069770
... ... @@ -13,31 +13,12 @@
13 13 #ifndef __CONFIG_H
14 14 #define __CONFIG_H
15 15  
16   -#include <asm/hardware.h>
  16 +/*
  17 + * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
  18 + * before the common header.
  19 + */
  20 +#include "at91-sama5_common.h"
17 21  
18   -#define CONFIG_SYS_TEXT_BASE 0x26f00000
19   -
20   -/* ARM asynchronous clock */
21   -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
22   -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
23   -
24   -#define CONFIG_ARCH_CPU_INIT
25   -
26   -#ifndef CONFIG_SPL_BUILD
27   -#define CONFIG_SKIP_LOWLEVEL_INIT
28   -#endif
29   -
30   -#define CONFIG_BOARD_EARLY_INIT_F
31   -#define CONFIG_DISPLAY_CPUINFO
32   -
33   -#define CONFIG_CMD_BOOTZ
34   -#define CONFIG_OF_LIBFDT /* Device Tree support */
35   -
36   -#define CONFIG_SYS_GENERIC_BOARD
37   -
38   -/* general purpose I/O */
39   -#define CONFIG_AT91_GPIO
40   -
41 22 /* serial console */
42 23 #define CONFIG_ATMEL_USART
43 24 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
44 25  
45 26  
46 27  
47 28  
... ... @@ -69,40 +50,17 @@
69 50 /* board specific (not enough SRAM) */
70 51 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
71 52  
72   -#define CONFIG_BOOTDELAY 3
73   -
74   -/*
75   - * BOOTP options
76   - */
77   -#define CONFIG_BOOTP_BOOTFILESIZE
78   -#define CONFIG_BOOTP_BOOTPATH
79   -#define CONFIG_BOOTP_GATEWAY
80   -#define CONFIG_BOOTP_HOSTNAME
81   -
82 53 /* NOR flash */
  54 +#ifndef CONFIG_SYS_NO_FLASH
83 55 #define CONFIG_CMD_FLASH
84   -
85   -#ifdef CONFIG_CMD_FLASH
86 56 #define CONFIG_FLASH_CFI_DRIVER
87 57 #define CONFIG_SYS_FLASH_CFI
88 58 #define CONFIG_SYS_FLASH_PROTECTION
89 59 #define CONFIG_SYS_FLASH_BASE 0x10000000
90 60 #define CONFIG_SYS_MAX_FLASH_SECT 131
91 61 #define CONFIG_SYS_MAX_FLASH_BANKS 1
92   -#else
93   -#define CONFIG_SYS_NO_FLASH
94 62 #endif
95 63  
96   -/*
97   - * Command line configuration.
98   - */
99   -#include <config_cmd_default.h>
100   -#undef CONFIG_CMD_FPGA
101   -#undef CONFIG_CMD_IMI
102   -#undef CONFIG_CMD_LOADS
103   -#define CONFIG_CMD_PING
104   -#define CONFIG_CMD_DHCP
105   -
106 64 /* SDRAM */
107 65 #define CONFIG_NR_DRAM_BANKS 1
108 66 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
... ... @@ -227,34 +185,6 @@
227 185 #else
228 186 #define CONFIG_ENV_IS_NOWHERE
229 187 #endif
230   -
231   -#ifdef CONFIG_SYS_USE_MMC
232   -#define CONFIG_BOOTARGS \
233   - "console=ttyS0,115200 earlyprintk " \
234   - "root=/dev/mmcblk0p2 rw rootwait"
235   -#else
236   -#define CONFIG_BOOTARGS \
237   - "console=ttyS0,115200 earlyprintk " \
238   - "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
239   - "256K(env),256k(evn_redundent),256k(spare)," \
240   - "512k(dtb),6M(kernel)ro,-(rootfs) " \
241   - "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
242   -#endif
243   -
244   -#define CONFIG_BAUDRATE 115200
245   -
246   -#define CONFIG_SYS_PROMPT "U-Boot> "
247   -#define CONFIG_SYS_CBSIZE 256
248   -#define CONFIG_SYS_MAXARGS 16
249   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
250   - sizeof(CONFIG_SYS_PROMPT) + 16)
251   -#define CONFIG_SYS_LONGHELP
252   -#define CONFIG_CMDLINE_EDITING
253   -#define CONFIG_AUTO_COMPLETE
254   -#define CONFIG_SYS_HUSH_PARSER
255   -
256   -/* Size of malloc() pool */
257   -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
258 188  
259 189 /* SPL */
260 190 #define CONFIG_SPL_FRAMEWORK
include/configs/sama5d4_xplained.h
Diff comments   View file @ 1069770
... ... @@ -10,59 +10,16 @@
10 10 #ifndef __CONFIG_H
11 11 #define __CONFIG_H
12 12  
13   -#include <asm/hardware.h>
  13 +/* No NOR flash, this definition should put before common header */
  14 +#define CONFIG_SYS_NO_FLASH
14 15  
15   -#define CONFIG_SYS_TEXT_BASE 0x26f00000
  16 +#include "at91-sama5_common.h"
16 17  
17   -/* ARM asynchronous clock */
18   -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
19   -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
20   -
21   -#define CONFIG_ARCH_CPU_INIT
22   -
23   -#ifndef CONFIG_SPL_BUILD
24   -#define CONFIG_SKIP_LOWLEVEL_INIT
25   -#endif
26   -#define CONFIG_BOARD_EARLY_INIT_F
27   -#define CONFIG_DISPLAY_CPUINFO
28   -
29   -#define CONFIG_CMD_BOOTZ
30   -#define CONFIG_OF_LIBFDT /* Device Tree support */
31   -
32   -#define CONFIG_SYS_GENERIC_BOARD
33   -
34   -/* general purpose I/O */
35   -#define CONFIG_AT91_GPIO
36   -
37 18 /* serial console */
38 19 #define CONFIG_ATMEL_USART
39 20 #define CONFIG_USART_BASE ATMEL_BASE_USART3
40 21 #define CONFIG_USART_ID ATMEL_ID_USART3
41 22  
42   -#define CONFIG_BOOTDELAY 3
43   -
44   -/*
45   - * BOOTP options
46   - */
47   -#define CONFIG_BOOTP_BOOTFILESIZE
48   -#define CONFIG_BOOTP_BOOTPATH
49   -#define CONFIG_BOOTP_GATEWAY
50   -#define CONFIG_BOOTP_HOSTNAME
51   -
52   -/* No NOR flash */
53   -#define CONFIG_SYS_NO_FLASH
54   -
55   -/*
56   - * Command line configuration.
57   - */
58   -#include <config_cmd_default.h>
59   -#undef CONFIG_CMD_FPGA
60   -#undef CONFIG_CMD_IMI
61   -#undef CONFIG_CMD_LOADS
62   -#define CONFIG_CMD_PING
63   -#define CONFIG_CMD_DHCP
64   -#define CONFIG_CMD_SETEXPR
65   -
66 23 /* SDRAM */
67 24 #define CONFIG_NR_DRAM_BANKS 1
68 25 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
... ... @@ -199,33 +156,6 @@
199 156 "bootz 0x22000000 - 0x21000000"
200 157 #endif
201 158  
202   -#ifdef CONFIG_SYS_USE_MMC
203   -#define CONFIG_BOOTARGS \
204   - "console=ttyS0,115200 earlyprintk " \
205   - "root=/dev/mmcblk0p2 rw rootwait"
206   -#else
207   -#define CONFIG_BOOTARGS \
208   - "console=ttyS0,115200 earlyprintk " \
209   - "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
210   - "256K(env),256k(evn_redundent),256k(spare)," \
211   - "512k(dtb),6M(kernel)ro,-(rootfs) " \
212   - "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
213   -#endif
214   -
215   -#define CONFIG_BAUDRATE 115200
216   -
217   -#define CONFIG_SYS_PROMPT "U-Boot> "
218   -#define CONFIG_SYS_CBSIZE 256
219   -#define CONFIG_SYS_MAXARGS 16
220   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
221   - sizeof(CONFIG_SYS_PROMPT) + 16)
222   -#define CONFIG_SYS_LONGHELP
223   -#define CONFIG_CMDLINE_EDITING
224   -#define CONFIG_AUTO_COMPLETE
225   -#define CONFIG_SYS_HUSH_PARSER
226   -
227   -/* Size of malloc() pool */
228   -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
229 159  
230 160  
231 161 /* SPL */
include/configs/sama5d4ek.h
Diff comments   View file @ 1069770
... ... @@ -10,59 +10,16 @@
10 10 #ifndef __CONFIG_H
11 11 #define __CONFIG_H
12 12  
13   -#include <asm/hardware.h>
  13 +/* No NOR flash, this definition should put before common header */
  14 +#define CONFIG_SYS_NO_FLASH
14 15  
15   -#define CONFIG_SYS_TEXT_BASE 0x26f00000
  16 +#include "at91-sama5_common.h"
16 17  
17   -/* ARM asynchronous clock */
18   -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
19   -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
20   -
21   -#define CONFIG_ARCH_CPU_INIT
22   -
23   -#ifndef CONFIG_SPL_BUILD
24   -#define CONFIG_SKIP_LOWLEVEL_INIT
25   -#endif
26   -#define CONFIG_BOARD_EARLY_INIT_F
27   -#define CONFIG_DISPLAY_CPUINFO
28   -
29   -#define CONFIG_CMD_BOOTZ
30   -#define CONFIG_OF_LIBFDT /* Device Tree support */
31   -
32   -#define CONFIG_SYS_GENERIC_BOARD
33   -
34   -/* general purpose I/O */
35   -#define CONFIG_AT91_GPIO
36   -
37 18 /* serial console */
38 19 #define CONFIG_ATMEL_USART
39 20 #define CONFIG_USART_BASE ATMEL_BASE_USART3
40 21 #define CONFIG_USART_ID ATMEL_ID_USART3
41 22  
42   -#define CONFIG_BOOTDELAY 3
43   -
44   -/*
45   - * BOOTP options
46   - */
47   -#define CONFIG_BOOTP_BOOTFILESIZE
48   -#define CONFIG_BOOTP_BOOTPATH
49   -#define CONFIG_BOOTP_GATEWAY
50   -#define CONFIG_BOOTP_HOSTNAME
51   -
52   -/* No NOR flash */
53   -#define CONFIG_SYS_NO_FLASH
54   -
55   -/*
56   - * Command line configuration.
57   - */
58   -#include <config_cmd_default.h>
59   -#undef CONFIG_CMD_FPGA
60   -#undef CONFIG_CMD_IMI
61   -#undef CONFIG_CMD_LOADS
62   -#define CONFIG_CMD_PING
63   -#define CONFIG_CMD_DHCP
64   -#define CONFIG_CMD_SETEXPR
65   -
66 23 /* SDRAM */
67 24 #define CONFIG_NR_DRAM_BANKS 1
68 25 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
... ... @@ -196,35 +153,6 @@
196 153 "fatload mmc 0:1 0x22000000 zImage; " \
197 154 "bootz 0x22000000 - 0x21000000"
198 155 #endif
199   -
200   -#ifdef CONFIG_SYS_USE_MMC
201   -#define CONFIG_BOOTARGS \
202   - "console=ttyS0,115200 earlyprintk " \
203   - "root=/dev/mmcblk0p2 rw rootwait"
204   -#else
205   -#define CONFIG_BOOTARGS \
206   - "console=ttyS0,115200 earlyprintk " \
207   - "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
208   - "256K(env),256k(evn_redundent),256k(spare)," \
209   - "512k(dtb),6M(kernel)ro,-(rootfs) " \
210   - "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
211   -#endif
212   -
213   -#define CONFIG_BAUDRATE 115200
214   -
215   -#define CONFIG_SYS_PROMPT "U-Boot> "
216   -#define CONFIG_SYS_CBSIZE 256
217   -#define CONFIG_SYS_MAXARGS 16
218   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
219   - sizeof(CONFIG_SYS_PROMPT) + 16)
220   -#define CONFIG_SYS_LONGHELP
221   -#define CONFIG_CMDLINE_EDITING
222   -#define CONFIG_AUTO_COMPLETE
223   -#define CONFIG_SYS_HUSH_PARSER
224   -
225   -/* Size of malloc() pool */
226   -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
227   -
228 156  
229 157 /* SPL */
230 158 #define CONFIG_SPL_FRAMEWORK