Commit 2661dfd0046285e9007c1de126255bee11c0b8cd
1 parent
5e165b258f
Exists in
v2017.01-smarct4x
and in
37 other branches
ARM: UniPhier: enable output of system bus
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs, the output of the system bus is disabled by default. It must be enabled by software to have access to the system bus. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Showing 3 changed files with 15 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c
| ... | ... | @@ -12,6 +12,13 @@ |
| 12 | 12 | |
| 13 | 13 | void sbc_init(void) |
| 14 | 14 | { |
| 15 | + u32 tmp; | |
| 16 | + | |
| 17 | + /* system bus output enable */ | |
| 18 | + tmp = readl(PC0CTRL); | |
| 19 | + tmp &= 0xfffffcff; | |
| 20 | + writel(tmp, PC0CTRL); | |
| 21 | + | |
| 15 | 22 | /* XECS1: sub/boot memory (boot swap = off/on) */ |
| 16 | 23 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); |
| 17 | 24 | writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); |
arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c
| ... | ... | @@ -12,6 +12,13 @@ |
| 12 | 12 | |
| 13 | 13 | void sbc_init(void) |
| 14 | 14 | { |
| 15 | + u32 tmp; | |
| 16 | + | |
| 17 | + /* system bus output enable */ | |
| 18 | + tmp = readl(PC0CTRL); | |
| 19 | + tmp &= 0xfffffcff; | |
| 20 | + writel(tmp, PC0CTRL); | |
| 21 | + | |
| 15 | 22 | #if !defined(CONFIG_SPL_BUILD) |
| 16 | 23 | /* XECS0 : dummy */ |
| 17 | 24 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); |
arch/arm/include/asm/arch-uniphier/sbc-regs.h