Commit 26c7bab81e08dc7bd696c48f753428a829629bd8

Authored by Shinya Kuribayashi
Committed by Wolfgang Denk
1 parent 751b9b5189

common/miiphyutil.c: Cleanup MII_DEBUG and debug()

Current MII_DEBUG is confusing in two ways. One is useless define-then-
undef at the top of the file. The other is there is only one debug() in
this file, and that doesn't seem worthwhile to bother having MII_DEBUG.
While there are many useful printf()/puts() debug codes, but they are for
DEBUG, not for MII_DEBUG.

This patch tries to put them all together into MII_DEBUG and debug().

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>

Showing 1 changed file with 9 additions and 22 deletions Side-by-side Diff

... ... @@ -36,7 +36,6 @@
36 36 #include <net.h>
37 37  
38 38 /* local debug macro */
39   -#define MII_DEBUG
40 39 #undef MII_DEBUG
41 40  
42 41 #undef debug
43 42  
44 43  
45 44  
... ... @@ -261,31 +260,25 @@
261 260 unsigned short tmp;
262 261  
263 262 if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
264   -#ifdef DEBUG
265   - puts ("PHY ID register 2 read failed\n");
266   -#endif
  263 + debug ("PHY ID register 2 read failed\n");
267 264 return (-1);
268 265 }
269 266 reg = tmp;
270 267  
271   -#ifdef DEBUG
272   - printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
273   -#endif
  268 + debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
  269 +
274 270 if (reg == 0xFFFF) {
275 271 /* No physical device present at this address */
276 272 return (-1);
277 273 }
278 274  
279 275 if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
280   -#ifdef DEBUG
281   - puts ("PHY ID register 1 read failed\n");
282   -#endif
  276 + debug ("PHY ID register 1 read failed\n");
283 277 return (-1);
284 278 }
285 279 reg |= tmp << 16;
286   -#ifdef DEBUG
287   - printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
288   -#endif
  280 + debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  281 +
289 282 *oui = (reg >> 10);
290 283 *model = (unsigned char)((reg >> 4) & 0x0000003F);
291 284 *rev = (unsigned char)(reg & 0x0000000F);
292 285  
... ... @@ -304,15 +297,11 @@
304 297 int loop_cnt;
305 298  
306 299 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
307   -#ifdef DEBUG
308   - printf ("PHY status read failed\n");
309   -#endif
  300 + debug ("PHY status read failed\n");
310 301 return (-1);
311 302 }
312 303 if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
313   -#ifdef DEBUG
314   - puts ("PHY reset failed\n");
315   -#endif
  304 + debug ("PHY reset failed\n");
316 305 return (-1);
317 306 }
318 307 #ifdef CONFIG_PHY_RESET_DELAY
... ... @@ -327,9 +316,7 @@
327 316 reg = 0x8000;
328 317 while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
329 318 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
330   -# ifdef DEBUG
331   - puts ("PHY status read failed\n");
332   -# endif
  319 + debug ("PHY status read failed\n");
333 320 return (-1);
334 321 }
335 322 }