Commit 290e7cfdbfa288d26598c073186ab45e3fa711b3

Authored by Fabio Estevam
Committed by Stefano Babic
1 parent 5a6440cac7

mx6ull: Handle the CONFIG_MX6ULL cases correctly

Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.

This fixes a boot regression.

Reported-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Breno Lima <breno.lima@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Jörg Krause <joerg.krause@embedded.rocks>

Showing 10 changed files with 40 additions and 28 deletions Side-by-side Diff

arch/arm/include/asm/arch-mx6/imx-regs.h
... ... @@ -17,7 +17,7 @@
17 17 #define GPU_2D_ARB_END_ADDR 0x02203FFF
18 18 #define OPENVG_ARB_BASE_ADDR 0x02204000
19 19 #define OPENVG_ARB_END_ADDR 0x02207FFF
20   -#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
  20 +#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
21 21 #define CAAM_ARB_BASE_ADDR 0x00100000
22 22 #define CAAM_ARB_END_ADDR 0x00107FFF
23 23 #define GPU_ARB_BASE_ADDR 0x01800000
... ... @@ -46,7 +46,8 @@
46 46 #define MXS_BCH_BASE (APBH_DMA_ARB_BASE_ADDR + 0x04000)
47 47  
48 48 /* GPV - PL301 configuration ports */
49   -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
  49 +#if (defined(CONFIG_MX6SX) || \
  50 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
50 51 defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
51 52 #define GPV2_BASE_ADDR 0x00D00000
52 53 #define GPV3_BASE_ADDR 0x00E00000
... ... @@ -88,7 +89,7 @@
88 89 #define QSPI0_AMBA_END 0x6FFFFFFF
89 90 #define QSPI1_AMBA_BASE 0x70000000
90 91 #define QSPI1_AMBA_END 0x7FFFFFFF
91   -#elif defined(CONFIG_MX6UL)
  92 +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
92 93 #define WEIM_ARB_BASE_ADDR 0x50000000
93 94 #define WEIM_ARB_END_ADDR 0x57FFFFFF
94 95 #define QSPI0_AMBA_BASE 0x60000000
... ... @@ -109,7 +110,8 @@
109 110 #endif
110 111  
111 112 #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
112   - defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
  113 + defined(CONFIG_MX6SX) || \
  114 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
113 115 #define MMDC0_ARB_BASE_ADDR 0x80000000
114 116 #define MMDC0_ARB_END_ADDR 0xFFFFFFFF
115 117 #define MMDC1_ARB_BASE_ADDR 0xC0000000
... ... @@ -262,7 +264,7 @@
262 264 #define MMDC_P0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x30000)
263 265 /* i.MX6SL/SLL */
264 266 #define RNGB_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x34000)
265   -#ifdef CONFIG_MX6UL
  267 +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
266 268 #define ENET2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000)
267 269 #else
268 270 /* i.MX6SX */
... ... @@ -288,7 +290,7 @@
288 290 #define IP2APB_PERFMON3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4C000)
289 291 #endif
290 292 #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000)
291   -#ifdef CONFIG_MX6UL
  293 +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
292 294 #define QSPI0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x60000)
293 295 #define UART6_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
294 296 #elif defined(CONFIG_MX6SX)
... ... @@ -337,7 +339,7 @@
337 339 #define PWM6_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xA8000)
338 340 #define PWM7_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xAC000)
339 341 #define PWM8_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0xB0000)
340   -#elif defined(CONFIG_MX6ULL)
  342 +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
341 343 #define AIPS3_CONFIG_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x7C000)
342 344 #define DCP_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x80000)
343 345 #define RNGB_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x84000)
... ... @@ -354,7 +356,8 @@
354 356 #define MX6SX_LCDIF1_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x20000)
355 357 #define MX6SX_WDOG3_BASE_ADDR (AIPS3_ARB_BASE_ADDR + 0x88000)
356 358  
357   -#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
  359 +#if !(defined(CONFIG_MX6SX) || \
  360 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
358 361 defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
359 362 #define IRAM_SIZE 0x00040000
360 363 #else
... ... @@ -573,7 +576,7 @@
573 576 #define IOMUXC_GPR12_LOS_LEVEL (0x1f << 4)
574 577  
575 578 struct iomuxc {
576   -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
  579 +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
577 580 u8 reserved[0x4000];
578 581 #endif
579 582 u32 gpr[14];
... ... @@ -700,7 +703,7 @@
700 703 #define MXC_CSPICON_SSPOL 12 /* SS polarity */
701 704 #define MXC_CSPICON_CTL 20 /* inactive state of SCLK */
702 705 #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
703   - defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL)
  706 + defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
704 707 #define MXC_SPI_BASE_ADDRESSES \
705 708 ECSPI1_BASE_ADDR, \
706 709 ECSPI2_BASE_ADDR, \
arch/arm/include/asm/arch-mx6/mx6-ddr.h
... ... @@ -16,7 +16,7 @@
16 16 #ifdef CONFIG_MX6SX
17 17 #include "mx6sx-ddr.h"
18 18 #else
19   -#ifdef CONFIG_MX6UL
  19 +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
20 20 #include "mx6ul-ddr.h"
21 21 #else
22 22 #ifdef CONFIG_MX6SL
arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
... ... @@ -7,7 +7,7 @@
7 7 #ifndef __ASM_ARCH_MX6UL_DDR_H__
8 8 #define __ASM_ARCH_MX6UL_DDR_H__
9 9  
10   -#ifndef CONFIG_MX6UL
  10 +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
11 11 #error "wrong CPU"
12 12 #endif
13 13  
arch/arm/include/asm/mach-imx/iomux-v3.h
... ... @@ -127,7 +127,7 @@
127 127  
128 128 #define PAD_CTL_ODE (1 << 11)
129 129  
130   -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
  130 +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
131 131 #define PAD_CTL_SPEED_LOW (0 << 6)
132 132 #else
133 133 #define PAD_CTL_SPEED_LOW (1 << 6)
... ... @@ -253,7 +253,7 @@
253 253 imx_iomux_v3_setup_pad(MX6Q_##def);
254 254 #define SETUP_IOMUX_PADS(x) \
255 255 imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))
256   -#elif defined(CONFIG_MX6UL)
  256 +#elif defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
257 257 #define IOMUX_PADS(x) MX6_##x
258 258 #define SETUP_IOMUX_PAD(def) \
259 259 imx_iomux_v3_setup_pad(MX6_##def);
arch/arm/include/asm/mach-imx/regs-lcdif.h
... ... @@ -19,8 +19,11 @@
19 19 struct mxs_lcdif_regs {
20 20 mxs_reg_32(hw_lcdif_ctrl) /* 0x00 */
21 21 mxs_reg_32(hw_lcdif_ctrl1) /* 0x10 */
22   -#if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
23   - defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
  22 +
  23 +#if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || \
  24 + defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
  25 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
  26 + defined(CONFIG_MX7)
24 27 mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */
25 28 #endif
26 29 mxs_reg_32(hw_lcdif_transfer_count) /* 0x20/0x30 */
... ... @@ -55,8 +58,10 @@
55 58 #endif
56 59 mxs_reg_32(hw_lcdif_data) /* 0x1b0/0x180 */
57 60 mxs_reg_32(hw_lcdif_bm_error_stat) /* 0x1c0/0x190 */
58   -#if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
59   - defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
  61 +#if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || \
  62 + defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
  63 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
  64 + defined(CONFIG_MX7)
60 65 mxs_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
61 66 #endif
62 67 mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1d0/0x1b0 */
... ... @@ -64,8 +69,10 @@
64 69 mxs_reg_32(hw_lcdif_debug0) /* 0x1f0/0x1d0 */
65 70 mxs_reg_32(hw_lcdif_debug1) /* 0x200/0x1e0 */
66 71 mxs_reg_32(hw_lcdif_debug2) /* 0x1f0 */
67   -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
68   - defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
  72 +#if defined(CONFIG_MX6SX) || \
  73 + defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
  74 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
  75 + defined(CONFIG_MX7)
69 76 mxs_reg_32(hw_lcdif_thres)
70 77 mxs_reg_32(hw_lcdif_as_ctrl)
71 78 mxs_reg_32(hw_lcdif_as_buf)
arch/arm/mach-imx/mx6/Kconfig
... ... @@ -8,7 +8,7 @@
8 8 bool
9 9  
10 10 config MX6
11   - select ARM_ERRATA_743622 if !MX6UL
  11 + select ARM_ERRATA_743622 if !MX6UL && !MX6ULL
12 12 bool
13 13 default y
14 14 imply CMD_FUSE
arch/arm/mach-imx/mx6/ddr.c
... ... @@ -631,7 +631,7 @@
631 631 }
632 632 #endif
633 633  
634   -#ifdef CONFIG_MX6UL
  634 +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
635 635 void mx6ul_dram_iocfg(unsigned width,
636 636 const struct mx6ul_iomux_ddr_regs *ddr,
637 637 const struct mx6ul_iomux_grp_regs *grp)
drivers/gpio/mxc_gpio.c
... ... @@ -47,12 +47,12 @@
47 47 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
48 48 defined(CONFIG_MX7)
49 49 [4] = GPIO5_BASE_ADDR,
50   -#ifndef CONFIG_MX6UL
  50 +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
51 51 [5] = GPIO6_BASE_ADDR,
52 52 #endif
53 53 #endif
54 54 #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
55   -#ifndef CONFIG_MX6UL
  55 +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
56 56 [6] = GPIO7_BASE_ADDR,
57 57 #endif
58 58 #endif
include/configs/imx6_spl.h
... ... @@ -55,7 +55,8 @@
55 55 # endif
56 56 #endif
57 57  
58   -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
  58 +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
  59 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
59 60 #define CONFIG_SPL_BSS_START_ADDR 0x88200000
60 61 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
61 62 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000
include/configs/mx6_common.h
... ... @@ -7,7 +7,7 @@
7 7 #ifndef __MX6_COMMON_H
8 8 #define __MX6_COMMON_H
9 9  
10   -#ifndef CONFIG_MX6UL
  10 +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
11 11 #ifndef CONFIG_SYS_L2CACHE_OFF
12 12 #define CONFIG_SYS_L2_PL310
13 13 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
... ... @@ -37,8 +37,9 @@
37 37 #define CONFIG_REVISION_TAG
38 38  
39 39 /* Boot options */
40   -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
41   - defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
  40 +#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
  41 + defined(CONFIG_MX6SX) || \
  42 + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
42 43 #define CONFIG_LOADADDR 0x82000000
43 44 #ifndef CONFIG_SYS_TEXT_BASE
44 45 #define CONFIG_SYS_TEXT_BASE 0x87800000