83xx: initialize serdes for MPC837XRDB boards

On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Anton Vorontsov · Kim Phillips
1 parent 453316a2a1
Showing 2 changed files with 43 additions and 0 deletions Side-by-side Diff
board/freescale/mpc837xerdb/mpc837xerdb.c
include/configs/MPC837XERDB.h
@@ -15,6 +15,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <asm/io.h>
+#include <asm/fsl_serdes.h>
 #include <spd_sdram.h>
 #include <vsc7385.h>
  
@@ -129,6 +130,42 @@
 int checkboard(void)
 {
 	puts("Board: Freescale MPC837xERDB\n");
+	return 0;
+}
+
+int board_early_init_f(void)
+{
+#ifdef CONFIG_FSL_SERDES
+	immap_t *immr = (immap_t *)CFG_IMMR;
+	u32 spridr = in_be32(&immr->sysconf.spridr);
+
+	/* we check only part num, and don't look for CPU revisions */
+	switch (spridr >> 16) {
+	case SPR_8379E_REV10 >> 16:
+	case SPR_8379_REV10 >> 16:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	case SPR_8378E_REV10 >> 16:
+	case SPR_8378_REV10 >> 16:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	case SPR_8377E_REV10 >> 16:
+	case SPR_8377_REV10 >> 16:
+		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
+				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+		break;
+	default:
+		printf("serdes not configured: unknown CPU part number: "
+		       "%04x\n", spridr >> 16);
+		break;
+	}
+#endif /* CONFIG_FSL_SERDES */
 	return 0;
 }
  
@@ -32,6 +32,7 @@
  
 #define CONFIG_PCI	1
  
+#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
  
 /*
@@ -322,6 +323,11 @@
  
 #define CFG_NS16550_COM1	(CFG_IMMR+0x4500)
 #define CFG_NS16550_COM2	(CFG_IMMR+0x4600)
+
+/* SERDES */
+#define CONFIG_FSL_SERDES
+#define CONFIG_FSL_SERDES1	0xe3000
+#define CONFIG_FSL_SERDES2	0xe3100
  
 /* Use the HUSH parser */
 #define CFG_HUSH_PARSER
...	...	@@ -15,6 +15,7 @@
15	15	#include <common.h>
16	16	#include <i2c.h>
17	17	#include <asm/io.h>
	18	+#include <asm/fsl_serdes.h>
18	19	#include <spd_sdram.h>
19	20	#include <vsc7385.h>
20	21
...	...	@@ -129,6 +130,42 @@
129	130	int checkboard(void)
130	131	{
131	132	puts("Board: Freescale MPC837xERDB\n");
	133	+ return 0;
	134	+}
	135	+
	136	+int board_early_init_f(void)
	137	+{
	138	+#ifdef CONFIG_FSL_SERDES
	139	+ immap_t immr = (immap_t )CFG_IMMR;
	140	+ u32 spridr = in_be32(&immr->sysconf.spridr);
	141	+
	142	+ /* we check only part num, and don't look for CPU revisions */
	143	+ switch (spridr >> 16) {
	144	+ case SPR_8379E_REV10 >> 16:
	145	+ case SPR_8379_REV10 >> 16:
	146	+ fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
	147	+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	148	+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
	149	+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	150	+ break;
	151	+ case SPR_8378E_REV10 >> 16:
	152	+ case SPR_8378_REV10 >> 16:
	153	+ fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
	154	+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	155	+ break;
	156	+ case SPR_8377E_REV10 >> 16:
	157	+ case SPR_8377_REV10 >> 16:
	158	+ fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
	159	+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	160	+ fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
	161	+ FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
	162	+ break;
	163	+ default:
	164	+ printf("serdes not configured: unknown CPU part number: "
	165	+ "%04x\n", spridr >> 16);
	166	+ break;
	167	+ }
	168	+#endif /* CONFIG_FSL_SERDES */
132	169	return 0;
133	170	}
134	171
...	...	@@ -32,6 +32,7 @@
32	32
33	33	#define CONFIG_PCI 1
34	34
	35	+#define CONFIG_BOARD_EARLY_INIT_F
35	36	#define CONFIG_MISC_INIT_R
36	37
37	38	/*
...	...	@@ -322,6 +323,11 @@
322	323
323	324	#define CFG_NS16550_COM1 (CFG_IMMR+0x4500)
324	325	#define CFG_NS16550_COM2 (CFG_IMMR+0x4600)
	326	+
	327	+/* SERDES */
	328	+#define CONFIG_FSL_SERDES
	329	+#define CONFIG_FSL_SERDES1 0xe3000
	330	+#define CONFIG_FSL_SERDES2 0xe3100
325	331
326	332	/* Use the HUSH parser */
327	333	#define CFG_HUSH_PARSER