Commit 2c650e20107917ed90a36ca574a6816fb5d3342e

Authored by Wolfgang Denk
1 parent 26e670ea43
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: remove broken "gcplus" board.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: George G. Davis <gdavis@mvista.com>

Showing 9 changed files with 1 additions and 853 deletions Side-by-side Diff

... ... @@ -624,10 +624,6 @@
624 624  
625 625 dockstar ARM926EJS (Kirkwood SoC)
626 626  
627   -George G. Davis <gdavis@mvista.com>
628   -
629   - gcplus SA1100
630   -
631 627 Wolfgang Denk <wd@denx.de>
632 628 imx27lite i.MX27
633 629 qong i.MX31
board/gcplus/Makefile
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# 2003 (c) MontaVista Software, Inc.
6   -#
7   -# See file CREDITS for list of people who contributed to this
8   -# project.
9   -#
10   -# This program is free software; you can redistribute it and/or
11   -# modify it under the terms of the GNU General Public License as
12   -# published by the Free Software Foundation; either version 2 of
13   -# the License, or (at your option) any later version.
14   -#
15   -# This program is distributed in the hope that it will be useful,
16   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
17   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   -# GNU General Public License for more details.
19   -#
20   -# You should have received a copy of the GNU General Public License
21   -# along with this program; if not, write to the Free Software
22   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   -# MA 02111-1307 USA
24   -#
25   -
26   -include $(TOPDIR)/config.mk
27   -
28   -LIB = $(obj)lib$(BOARD).o
29   -
30   -COBJS := gcplus.o flash.o
31   -SOBJS := lowlevel_init.o
32   -
33   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
34   -OBJS := $(addprefix $(obj),$(COBJS))
35   -SOBJS := $(addprefix $(obj),$(SOBJS))
36   -
37   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
38   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
39   -
40   -clean:
41   - rm -f $(SOBJS) $(OBJS)
42   -
43   -distclean: clean
44   - rm -f $(LIB) core *.bak $(obj).depend
45   -
46   -#########################################################################
47   -
48   -# defines $(obj).depend target
49   -include $(SRCTREE)/rules.mk
50   -
51   -sinclude $(obj).depend
52   -
53   -#########################################################################
board/gcplus/config.mk
1   -#
2   -# ADS GCPlus board with SA1110 cpu
3   -#
4   -# The ADS GCPlus has 2 banks of 16 MiB SDRAM
5   -#
6   -# We use the ADS GCPlus Linux boot ROM to load U-Boot into SDRAM
7   -# at c020'0000 and then move ourself to c8f0'0000. Basically, just
8   -# install the U-Boot binary as you would the Linux zImage and then
9   -# reap the benfits of more convenient Linux development cycles, i.e.
10   -# bootp;tftp;bootm, repeat, etc.,.
11   -#
12   -
13   -CONFIG_SYS_TEXT_BASE = 0xc8f00000
board/gcplus/flash.c
1   -/*
2   - * (C) Copyright 2001
3   - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4   - *
5   - * (C) Copyright 2001
6   - * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7   - *
8   - * 2003 (c) MontaVista Software, Inc.
9   - *
10   - * See file CREDITS for list of people who contributed to this
11   - * project.
12   - *
13   - * This program is free software; you can redistribute it and/or
14   - * modify it under the terms of the GNU General Public License as
15   - * published by the Free Software Foundation; either version 2 of
16   - * the License, or (at your option) any later version.
17   - *
18   - * This program is distributed in the hope that it will be useful,
19   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
20   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21   - * GNU General Public License for more details.
22   - *
23   - * You should have received a copy of the GNU General Public License
24   - * along with this program; if not, write to the Free Software
25   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26   - * MA 02111-1307 USA
27   - */
28   -
29   -#include <common.h>
30   -#include <linux/byteorder/swab.h>
31   -
32   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
33   -
34   -/* Board support for 1 or 2 flash devices */
35   -#define FLASH_PORT_WIDTH32
36   -#undef FLASH_PORT_WIDTH16
37   -
38   -#ifdef FLASH_PORT_WIDTH16
39   -#define FLASH_PORT_WIDTH ushort
40   -#define FLASH_PORT_WIDTHV vu_short
41   -#define SWAP(x) __swab16(x)
42   -#else
43   -#define FLASH_PORT_WIDTH ulong
44   -#define FLASH_PORT_WIDTHV vu_long
45   -#define SWAP(x) __swab32(x)
46   -#endif
47   -
48   -#define FPW FLASH_PORT_WIDTH
49   -#define FPWV FLASH_PORT_WIDTHV
50   -
51   -#define mb() __asm__ __volatile__ ("" : : : "memory")
52   -
53   -/*-----------------------------------------------------------------------
54   - * Functions
55   - */
56   -static ulong flash_get_size(FPW * addr, flash_info_t * info);
57   -static int write_data(flash_info_t * info, ulong dest, FPW data);
58   -static void flash_get_offsets(ulong base, flash_info_t * info);
59   -void inline spin_wheel(void);
60   -
61   -/*-----------------------------------------------------------------------
62   - */
63   -
64   -unsigned long
65   -flash_init(void)
66   -{
67   - int i;
68   - ulong size = 0;
69   -
70   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
71   - switch (i) {
72   - case 0:
73   - flash_get_size((FPW *) PHYS_FLASH_1, &flash_info[i]);
74   - flash_get_offsets(PHYS_FLASH_1, &flash_info[i]);
75   - break;
76   - default:
77   - panic("configured too many flash banks!\n");
78   - break;
79   - }
80   - size += flash_info[i].size;
81   - }
82   -
83   - /* Protect monitor and environment sectors
84   - */
85   - flash_protect(FLAG_PROTECT_SET,
86   - CONFIG_SYS_FLASH_BASE,
87   - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
88   -
89   - flash_protect(FLAG_PROTECT_SET,
90   - CONFIG_ENV_ADDR,
91   - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
92   -
93   - return size;
94   -}
95   -
96   -/*-----------------------------------------------------------------------
97   - */
98   -static void
99   -flash_get_offsets(ulong base, flash_info_t * info)
100   -{
101   - int i;
102   -
103   - if (info->flash_id == FLASH_UNKNOWN) {
104   - return;
105   - }
106   -
107   - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
108   - for (i = 0; i < info->sector_count; i++) {
109   - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
110   - info->protect[i] = 0;
111   - }
112   - }
113   -}
114   -
115   -/*-----------------------------------------------------------------------
116   - */
117   -void
118   -flash_print_info(flash_info_t * info)
119   -{
120   - int i;
121   -
122   - if (info->flash_id == FLASH_UNKNOWN) {
123   - printf("missing or unknown FLASH type\n");
124   - return;
125   - }
126   -
127   - switch (info->flash_id & FLASH_VENDMASK) {
128   - case FLASH_MAN_INTEL:
129   - printf("INTEL ");
130   - break;
131   - default:
132   - printf("Unknown Vendor ");
133   - break;
134   - }
135   -
136   - switch (info->flash_id & FLASH_TYPEMASK) {
137   - case FLASH_28F128J3A:
138   - printf("28F128J3A\n");
139   - break;
140   - case FLASH_28F640J5:
141   - printf("28F640J5\n");
142   - break;
143   - default:
144   - printf("Unknown Chip Type\n");
145   - break;
146   - }
147   -
148   - printf(" Size: %ld MB in %d Sectors\n",
149   - info->size >> 20, info->sector_count);
150   -
151   - printf(" Sector Start Addresses:");
152   - for (i = 0; i < info->sector_count; ++i) {
153   - if ((i % 5) == 0)
154   - printf("\n ");
155   - printf(" %08lX%s",
156   - info->start[i], info->protect[i] ? " (RO)" : " ");
157   - }
158   - printf("\n");
159   - return;
160   -}
161   -
162   -/*
163   - * The following code cannot be run from FLASH!
164   - */
165   -static ulong
166   -flash_get_size(FPW * addr, flash_info_t * info)
167   -{
168   - volatile FPW value;
169   - /* Write auto select command: read Manufacturer ID */
170   - addr[0x5555] = (FPW) 0x00AA00AA;
171   - addr[0x2AAA] = (FPW) 0x00550055;
172   - addr[0x5555] = (FPW) 0x00900090;
173   -
174   - mb();
175   - value = addr[0];
176   -
177   - switch (value) {
178   -
179   - case (FPW) INTEL_MANUFACT:
180   - info->flash_id = FLASH_MAN_INTEL;
181   - break;
182   -
183   - default:
184   - info->flash_id = FLASH_UNKNOWN;
185   - info->sector_count = 0;
186   - info->size = 0;
187   - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
188   - return (0); /* no or unknown flash */
189   - }
190   -
191   - mb();
192   - value = addr[1]; /* device ID */
193   - switch (value) {
194   - case (FPW) INTEL_ID_28F128J3A:
195   - info->flash_id += FLASH_28F128J3A;
196   - info->sector_count = 128;
197   - info->size = 0x02000000;
198   - break; /* => 16 MB */
199   - case (FPW) INTEL_ID_28F640J5:
200   - info->flash_id += FLASH_28F640J5;
201   - info->sector_count = 64;
202   - info->size = 0x01000000;
203   - break; /* => 16 MB */
204   -
205   - default:
206   - info->flash_id = FLASH_UNKNOWN;
207   - break;
208   - }
209   -
210   - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
211   - printf("** ERROR: sector count %d > max (%d) **\n",
212   - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
213   - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
214   - }
215   -
216   - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
217   -
218   - return (info->size);
219   -}
220   -
221   -/*-----------------------------------------------------------------------
222   - */
223   -
224   -int
225   -flash_erase(flash_info_t * info, int s_first, int s_last)
226   -{
227   - int flag, prot, sect;
228   - ulong type, start;
229   - int rcode = 0;
230   -
231   - if ((s_first < 0) || (s_first > s_last)) {
232   - if (info->flash_id == FLASH_UNKNOWN) {
233   - printf("- missing\n");
234   - } else {
235   - printf("- no sectors to erase\n");
236   - }
237   - return 1;
238   - }
239   -
240   - type = (info->flash_id & FLASH_VENDMASK);
241   - if ((type != FLASH_MAN_INTEL)) {
242   - printf("Can't erase unknown flash type %08lx - aborted\n",
243   - info->flash_id);
244   - return 1;
245   - }
246   -
247   - prot = 0;
248   - for (sect = s_first; sect <= s_last; ++sect) {
249   - if (info->protect[sect]) {
250   - prot++;
251   - }
252   - }
253   -
254   - if (prot) {
255   - printf("- Warning: %d protected sectors will not be erased!\n",
256   - prot);
257   - } else {
258   - printf("\n");
259   - }
260   -
261   - /* Disable interrupts which might cause a timeout here */
262   - flag = disable_interrupts();
263   -
264   - /* Start erase on unprotected sectors */
265   - for (sect = s_first; sect <= s_last; sect++) {
266   - if (info->protect[sect] == 0) { /* not protected */
267   - FPWV *addr = (FPWV *) (info->start[sect]);
268   - FPW status;
269   -
270   - printf("Erasing sector %2d ... ", sect);
271   -
272   - /* arm simple, non interrupt dependent timer */
273   - start = get_timer(0);
274   -
275   - *addr = (FPW) 0x00500050; /* clear status register */
276   - *addr = (FPW) 0x00200020; /* erase setup */
277   - *addr = (FPW) 0x00D000D0; /* erase confirm */
278   -
279   - while (((status =
280   - *addr) & (FPW) 0x00800080) !=
281   - (FPW) 0x00800080) {
282   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
283   - printf("Timeout\n");
284   - *addr = (FPW) 0x00B000B0; /* suspend erase */
285   - *addr = (FPW) 0x00FF00FF; /* reset to read mode */
286   - rcode = 1;
287   - break;
288   - }
289   - }
290   -
291   - *addr = (FPW) 0x00500050; /* clear status register cmd. */
292   - *addr = (FPW) 0x00FF00FF; /* resest to read mode */
293   -
294   - printf(" done\n");
295   - }
296   - }
297   - return rcode;
298   -}
299   -
300   -/*-----------------------------------------------------------------------
301   - * Copy memory to flash, returns:
302   - * 0 - OK
303   - * 1 - write timeout
304   - * 2 - Flash not erased
305   - * 4 - Flash not identified
306   - */
307   -
308   -int
309   -write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
310   -{
311   - ulong cp, wp;
312   - FPW data;
313   - int count, i, l, rc, port_width;
314   -
315   - if (info->flash_id == FLASH_UNKNOWN) {
316   - return 4;
317   - }
318   -/* get lower word aligned address */
319   -#ifdef FLASH_PORT_WIDTH16
320   - wp = (addr & ~1);
321   - port_width = 2;
322   -#else
323   - wp = (addr & ~3);
324   - port_width = 4;
325   -#endif
326   -
327   - /*
328   - * handle unaligned start bytes
329   - */
330   - if ((l = addr - wp) != 0) {
331   - data = 0;
332   - for (i = 0, cp = wp; i < l; ++i, ++cp) {
333   - data = (data << 8) | (*(uchar *) cp);
334   - }
335   - for (; i < port_width && cnt > 0; ++i) {
336   - data = (data << 8) | *src++;
337   - --cnt;
338   - ++cp;
339   - }
340   - for (; cnt == 0 && i < port_width; ++i, ++cp) {
341   - data = (data << 8) | (*(uchar *) cp);
342   - }
343   -
344   - if ((rc = write_data(info, wp, SWAP(data))) != 0) {
345   - return (rc);
346   - }
347   - wp += port_width;
348   - }
349   -
350   - /*
351   - * handle word aligned part
352   - */
353   - count = 0;
354   - while (cnt >= port_width) {
355   - data = 0;
356   - for (i = 0; i < port_width; ++i) {
357   - data = (data << 8) | *src++;
358   - }
359   - if ((rc = write_data(info, wp, SWAP(data))) != 0) {
360   - return (rc);
361   - }
362   - wp += port_width;
363   - cnt -= port_width;
364   - if (count++ > 0x800) {
365   - spin_wheel();
366   - count = 0;
367   - }
368   - }
369   -
370   - if (cnt == 0) {
371   - return (0);
372   - }
373   -
374   - /*
375   - * handle unaligned tail bytes
376   - */
377   - data = 0;
378   - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
379   - data = (data << 8) | *src++;
380   - --cnt;
381   - }
382   - for (; i < port_width; ++i, ++cp) {
383   - data = (data << 8) | (*(uchar *) cp);
384   - }
385   -
386   - return (write_data(info, wp, SWAP(data)));
387   -}
388   -
389   -/*-----------------------------------------------------------------------
390   - * Write a word or halfword to Flash, returns:
391   - * 0 - OK
392   - * 1 - write timeout
393   - * 2 - Flash not erased
394   - */
395   -static int
396   -write_data(flash_info_t * info, ulong dest, FPW data)
397   -{
398   - FPWV *addr = (FPWV *) dest;
399   - ulong status;
400   - int flag;
401   - ulong start;
402   -
403   - /* Check if Flash is (sufficiently) erased */
404   - if ((*addr & data) != data) {
405   - printf("not erased at %08lX (%lX)\n", (ulong) addr, *addr);
406   - return (2);
407   - }
408   - /* Disable interrupts which might cause a timeout here */
409   - flag = disable_interrupts();
410   -
411   - *addr = (FPW) 0x00400040; /* write setup */
412   - *addr = data;
413   -
414   - /* arm simple, non interrupt dependent timer */
415   - start = get_timer(0);
416   -
417   - /* wait while polling the status register */
418   - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
419   - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
420   - *addr = (FPW) 0x00FF00FF; /* restore read mode */
421   - return (1);
422   - }
423   - }
424   -
425   - *addr = (FPW) 0x00FF00FF; /* restore read mode */
426   -
427   - return (0);
428   -}
429   -
430   -void inline
431   -spin_wheel(void)
432   -{
433   - static int p = 0;
434   - static char w[] = "\\/-";
435   -
436   - printf("\010%c", w[p]);
437   - (++p == 3) ? (p = 0) : 0;
438   -}
board/gcplus/gcplus.c
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Marius Groeger <mgroeger@sysgo.de>
5   - *
6   - * 2003-2004 (c) MontaVista Software, Inc.
7   - *
8   - * See file CREDITS for list of people who contributed to this
9   - * project.
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed in the hope that it will be useful,
17   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
18   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - *
21   - * You should have received a copy of the GNU General Public License
22   - * along with this program; if not, write to the Free Software
23   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   - * MA 02111-1307 USA
25   - */
26   -
27   -#include <common.h>
28   -#include <netdev.h>
29   -#include <SA-1100.h>
30   -
31   -DECLARE_GLOBAL_DATA_PTR;
32   -
33   -/*
34   - * Miscelaneous platform dependent initialisations
35   - */
36   -
37   -int
38   -board_init(void)
39   -{
40   - gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
41   -
42   - gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
43   -
44   - /* Most of the ADS GCPlus I/O is connected to Static nCS2.
45   - * So I'm brute forcing nCS2 timiming here for worst case.
46   - */
47   - MSC1 &= ~0xFFFF;
48   - MSC1 |= 0x8649;
49   -
50   - /* Nothing is connected to Static nCS4 or nCS5. But I'm using
51   - * nCS4 as a paranoia safe guard to force nCS2, nOE; nWE high
52   - * after accessing I/O via (non-VLIO) nCS2. What can I say, I'm
53   - * paranoid and lack decent tools to alleviate my fear. I sure
54   - * do wish I had a logic analyzer. : (
55   - */
56   -
57   - MSC2 = 0xfff9fff9;
58   -
59   - return 0;
60   -}
61   -
62   -int
63   -dram_init(void)
64   -{
65   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
66   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
67   - gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
68   - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
69   -
70   - return (0);
71   -}
72   -
73   -#ifdef CONFIG_CMD_NET
74   -int board_eth_init(bd_t *bis)
75   -{
76   - int rc = 0;
77   -#ifdef CONFIG_LAN91C96
78   - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
79   -#endif
80   - return rc;
81   -}
82   -#endif
board/gcplus/lowlevel_init.S
1   -/*
2   - * Memory Setup stuff - taken from blob memsetup.S
3   - *
4   - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5   - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6   - * 2003-2004 (c) MontaVista Software, Inc.
7   - *
8   - * See file CREDITS for list of people who contributed to this
9   - * project.
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed in the hope that it will be useful,
17   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
18   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - *
21   - * You should have received a copy of the GNU General Public License
22   - * along with this program; if not, write to the Free Software
23   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   - * MA 02111-1307 USA
25   - */
26   -
27   -
28   -#include "config.h"
29   -#include "version.h"
30   -
31   -
32   - .globl lowlevel_init
33   -lowlevel_init:
34   - /* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us.
35   - * However the darn thing leaves the MMU enabled before handing control
36   - * over to us. So we need to disable the MMU and we use lowlevel_init
37   - * to do it.
38   - */
39   -
40   -@ The following code segment was borrowed with gratitude from:
41   -@ linux-2.4.19-rmk7/arch/arm/boot/compressed/head-sa1100.S
42   -
43   - @ Data cache might be active.
44   - @ Be sure to flush kernel binary out of the cache,
45   - @ whatever state it is, before it is turned off.
46   - @ This is done by fetching through currently executed
47   - @ memory to be sure we hit the same cache.
48   - bic r2, pc, #0x1f
49   - add r3, r2, #0x4000 @ 16 kb is quite enough...
50   -1: ldr r0, [r2], #32
51   - teq r2, r3
52   - bne 1b
53   - mcr p15, 0, r0, c7, c10, 4 @ drain WB
54   - mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
55   -
56   - @ disabling MMU and caches
57   - mrc p15, 0, r0, c1, c0, 0 @ read control reg
58   - bic r0, r0, #0x0d @ clear WB, DC, MMU
59   - bic r0, r0, #0x1000 @ clear Icache
60   - mcr p15, 0, r0, c1, c0, 0
61   -
62   - nop
63   - nop
64   - nop
65   - nop
66   - nop
67   -
68   - b 2f
69   -2:
70   - nop
71   - nop
72   - nop
73   - nop
74   - nop
75   -
76   -
77   - mov pc, lr
... ... @@ -219,7 +219,6 @@
219 219 xm250 arm pxa
220 220 zipitz2 arm pxa
221 221 zylonite arm pxa
222   -gcplus arm sa1100
223 222 jornada arm sa1100
224 223 lart arm sa1100
225 224 shannon arm sa1100
doc/README.scrapyard
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
  14 +gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com>
14 15 evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
15 16 ep7312 arm arm720t - 2011-09-05 Marius Grรถger <mag@sysgo.de>
16 17 dnp1110 arm sa1100 - 2011-09-05 Alex Zรผpke <azu@sysgo.de>
include/configs/gcplus.h
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Marius Groeger <mgroeger@sysgo.de>
5   - *
6   - * 2003-2004 (c) MontaVista Software, Inc.
7   - *
8   - * Configuation settings for the ADS GraphicsClient+ board.
9   - *
10   - * See file CREDITS for list of people who contributed to this
11   - * project.
12   - *
13   - * This program is free software; you can redistribute it and/or
14   - * modify it under the terms of the GNU General Public License as
15   - * published by the Free Software Foundation; either version 2 of
16   - * the License, or (at your option) any later version.
17   - *
18   - * This program is distributed in the hope that it will be useful,
19   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
20   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21   - * GNU General Public License for more details.
22   - *
23   - * You should have received a copy of the GNU General Public License
24   - * along with this program; if not, write to the Free Software
25   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26   - * MA 02111-1307 USA
27   - */
28   -
29   -#ifndef __CONFIG_H
30   -#define __CONFIG_H
31   -
32   -/*
33   - * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
34   - * We don't actually init RAM in this case since we're using U-Boot as
35   - * an secondary boot loader during Linux kernel development and testing,
36   - * e.g. bootp/tftp download of the kernel is a far more convenient
37   - * when testing new kernels on this target. However the ADS GCPlus Linux
38   - * boot ROM leaves the MMU enabled when it passes control to U-Boot. So
39   - * we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem.
40   - */
41   -#undef CONFIG_SKIP_LOWLEVEL_INIT
42   -
43   -/*
44   - * High Level Configuration Options
45   - * (easy to change)
46   - */
47   -#define CONFIG_SA1110 1 /* This is an SA1100 CPU */
48   -#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
49   -
50   -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
51   -/* we will never enable dcache, because we have to setup MMU first */
52   -#define CONFIG_SYS_DCACHE_OFF
53   -
54   -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
55   -#define CONFIG_SETUP_MEMORY_TAGS 1
56   -#define CONFIG_INITRD_TAG 1
57   -
58   -/*
59   - * Size of malloc() pool
60   - */
61   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
62   -
63   -
64   -/*
65   - * Hardware drivers
66   - */
67   -#define CONFIG_NET_MULTI
68   -#define CONFIG_LAN91C96 /* we have an SMC9194 on-board */
69   -#define CONFIG_LAN91C96_BASE 0x100e0000
70   -
71   -/*
72   - * select serial console configuration
73   - */
74   -#define CONFIG_SA1100_SERIAL
75   -#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
76   -
77   -/* allow to overwrite serial and ethaddr */
78   -#define CONFIG_ENV_OVERWRITE
79   -
80   -#define CONFIG_BAUDRATE 38400
81   -
82   -
83   -/*
84   - * Command line configuration.
85   - */
86   -#include <config_cmd_default.h>
87   -
88   -#define CONFIG_CMD_DHCP
89   -
90   -
91   -/*
92   - * BOOTP options
93   - */
94   -#define CONFIG_BOOTP_SUBNETMASK
95   -#define CONFIG_BOOTP_GATEWAY
96   -#define CONFIG_BOOTP_HOSTNAME
97   -#define CONFIG_BOOTP_BOOTPATH
98   -
99   -
100   -#define CONFIG_BOOTDELAY 3
101   -#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
102   -#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
103   -#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
104   -
105   -#if defined(CONFIG_CMD_KGDB)
106   -#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
107   -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
108   -#endif
109   -
110   -/*
111   - * Miscellaneous configurable options
112   - */
113   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
114   -#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
115   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
116   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
117   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
118   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
119   -
120   -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
121   -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
122   -
123   -#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
124   -
125   -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
126   -#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */
127   -
128   - /* valid baudrates */
129   -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
130   -
131   -/*-----------------------------------------------------------------------
132   - * Stack sizes
133   - *
134   - * The stack sizes are set up in start.S using the settings below
135   - */
136   -#define CONFIG_STACKSIZE (128*1024) /* regular stack */
137   -#ifdef CONFIG_USE_IRQ
138   -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
139   -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
140   -#endif
141   -
142   -/*-----------------------------------------------------------------------
143   - * Physical Memory Map
144   - */
145   -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
146   -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
147   -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
148   -#define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
149   -#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
150   -
151   -
152   -#define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
153   -#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
154   -#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
155   -#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
156   -
157   -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
158   -
159   -/*-----------------------------------------------------------------------
160   - * FLASH and environment organization
161   - */
162   -#if 1
163   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
164   -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
165   -
166   -/* timeout values are in ticks */
167   -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
168   -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
169   -#else
170   -/* REVISIT: This doesn't work on ADS GCPlus just yet: */
171   -#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
172   -#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
173   -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
174   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
175   -#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
176   -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
177   -/*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */
178   -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
179   -#endif
180   -
181   -#define CONFIG_ENV_IS_IN_FLASH 1
182   -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
183   -#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE
184   -
185   -#endif /* __CONFIG_H */