MLK-14938-9 imx8: bootaux: Add i.MX8 M4 boot support

1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download M4 image to any DDR address first. Then use the "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0 or CM4_1, the default core id is 0 for CM4_0. Since current M4 only supports running in TCM. The bootaux will copy the M4 image from DDR to its TCML. 2. Implment bootaux for HIFI on QXP command: bootaux 0x81000000 1 Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 778606204b84ce6646fe58d752e2abda67600cf2) (cherry picked from commit e4a3fcc6fd357502d61687659b9cd7d2808b3fd4) (cherry picked from commit 13eafa71a6cad662af16e7997ec75b785753bb66) (cherry picked from commit 50e421d39a5c6913838794996fc98d01da42de3f) (cherry picked from commit c8c5630dc5efd6887fe70a56cd20fcd8eff730ea)

MLK-14938-9 imx8: bootaux: Add i.MX8 M4 boot support
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download M4 image to any DDR address first. Then use the "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0 or CM4_1, the default core id is 0 for CM4_0. Since current M4 only supports running in TCM. The bootaux will copy the M4 image from DDR to its TCML. 2. Implment bootaux for HIFI on QXP command: bootaux 0x81000000 1 Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 778606204b84ce6646fe58d752e2abda67600cf2) (cherry picked from commit e4a3fcc6fd357502d61687659b9cd7d2808b3fd4) (cherry picked from commit 13eafa71a6cad662af16e7997ec75b785753bb66) (cherry picked from commit 50e421d39a5c6913838794996fc98d01da42de3f) (cherry picked from commit c8c5630dc5efd6887fe70a56cd20fcd8eff730ea)
Ye Li
1 parent 9495f7b264
Showing 5 changed files with 193 additions and 5 deletions Side-by-side Diff
arch/arm/include/asm/mach-imx/sys_proto.h
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/Makefile
arch/arm/mach-imx/imx8/cpu.c
arch/arm/mach-imx/imx_bootaux.c
@@ -210,6 +210,7 @@
 			  u64 *phys_sdram_2_start,
 			  u64 *phys_sdram_2_size);
  
+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data);
 int arch_auxiliary_core_check_up(u32 core_id);
  
 int board_mmc_get_env_dev(int devno);
@@ -33,7 +33,7 @@
  
 config IMX_BOOTAUX
 	bool "Support boot auxiliary core"
-	depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8M
+	depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8 || ARCH_IMX8M
 	help
 	  bootaux [addr] to boot auxiliary core.
  
@@ -63,6 +63,11 @@
 obj-y += ddrmc-vf610.o
 obj-$(CONFIG_DDRMC_VF610_CALIBRATION) += ddrmc-vf610-calibration.o
 endif
+ifeq ($(SOC),$(filter $(SOC),imx8))
+ifneq ($(CONFIG_SPL_BUILD),y)
+obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o
+endif
+endif
 ifneq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
@@ -19,6 +19,8 @@
 #include <spl.h>
 #include <thermal.h>
 #include <asm/arch/sci/sci.h>
+#include <power-domain.h>
+#include <elf.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch-imx/cpu.h>
 #include <asm/armv8/cpu.h>
@@ -101,6 +103,179 @@
 		if (ret)
 			printf("Failed to initialize %s: %d\n", dev->name, ret);
 	}
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_IMX_BOOTAUX
+
+#ifdef CONFIG_IMX8QM
+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
+{
+	sc_rsrc_t core_rsrc, mu_rsrc;
+	sc_faddr_t tcml_addr;
+	u32 tcml_size = SZ_128K;
+	ulong addr;
+
+
+	switch (core_id) {
+	case 0:
+		core_rsrc = SC_R_M4_0_PID0;
+		tcml_addr = 0x34FE0000;
+		mu_rsrc = SC_R_M4_0_MU_1A;
+		break;
+	case 1:
+		core_rsrc = SC_R_M4_1_PID0;
+		tcml_addr = 0x38FE0000;
+		mu_rsrc = SC_R_M4_1_MU_1A;
+		break;
+	default:
+		printf("Not support this core boot up, ID:%u\n", core_id);
+		return -EINVAL;
+	}
+
+	addr = (sc_faddr_t)boot_private_data;
+
+	if (addr >= tcml_addr && addr <= tcml_addr + tcml_size) {
+		printf("Wrong image address 0x%lx, should not in TCML\n",
+			addr);
+		return -EINVAL;
+	}
+
+	printf("Power on M4 and MU\n");
+
+	if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
+		return -EIO;
+
+	if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
+		return -EIO;
+
+	printf("Copy M4 image from 0x%lx to TCML 0x%lx\n", addr, (ulong)tcml_addr);
+
+	if (addr != tcml_addr)
+		memcpy((void *)tcml_addr, (void *)addr, tcml_size);
+
+	printf("Start M4 %u\n", core_id);
+	if (sc_pm_cpu_start(-1, core_rsrc, true, tcml_addr) != SC_ERR_NONE)
+		return -EIO;
+
+	printf("bootaux complete\n");
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_IMX8QXP
+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
+{
+	sc_rsrc_t core_rsrc, mu_rsrc = SC_R_NONE;
+	sc_faddr_t aux_core_ram;
+	u32 size;
+	ulong addr;
+
+	switch (core_id) {
+	case 0:
+		core_rsrc = SC_R_M4_0_PID0;
+		aux_core_ram = 0x34FE0000;
+		mu_rsrc = SC_R_M4_0_MU_1A;
+		size = SZ_128K;
+		break;
+	case 1:
+		core_rsrc = SC_R_DSP;
+		aux_core_ram = 0x596f8000;
+		size = SZ_2K;
+		break;
+	default:
+		printf("Not support this core boot up, ID:%u\n", core_id);
+		return -EINVAL;
+	}
+
+	addr = (sc_faddr_t)boot_private_data;
+
+	if (addr >= aux_core_ram && addr <= aux_core_ram + size) {
+		printf("Wrong image address 0x%lx, should not in aux core ram\n",
+			addr);
+		return -EINVAL;
+	}
+
+	printf("Power on aux core %d\n", core_id);
+
+	if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
+		return -EIO;
+
+	if (mu_rsrc != SC_R_NONE) {
+		if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
+			return -EIO;
+	}
+
+	if (core_id == 1) {
+		struct power_domain pd;
+
+		if (sc_pm_clock_enable(-1, core_rsrc, SC_PM_CLK_PER, true, false) != SC_ERR_NONE) {
+			printf("Error enable clock\n");
+			return -EIO;
+		}
+
+		if (!power_domain_lookup_name("audio_sai0", &pd)) {
+			if (power_domain_on(&pd)) {
+				printf("Error power on SAI0\n");
+				return -EIO;
+			}
+		}
+
+		if (!power_domain_lookup_name("audio_ocram", &pd)) {
+			if (power_domain_on(&pd)) {
+				printf("Error power on HIFI RAM\n");
+				return -EIO;
+			}
+		}
+	}
+
+	printf("Copy image from 0x%lx to 0x%lx\n", addr, (ulong)aux_core_ram);
+	if (core_id == 0) {
+		/* M4 use bin file */
+		memcpy((void *)aux_core_ram, (void *)addr, size);
+	} else {
+		/* HIFI use elf file */
+		if (!valid_elf_image(addr))
+			return -1;
+		addr = load_elf_image_shdr(addr);
+	}
+
+	printf("Start %s\n", core_id == 0 ? "M4" : "HIFI");
+
+	if (sc_pm_cpu_start(-1, core_rsrc, true, aux_core_ram) != SC_ERR_NONE)
+		return -EIO;
+
+	printf("bootaux complete\n");
+	return 0;
+}
+#endif
+
+int arch_auxiliary_core_check_up(u32 core_id)
+{
+	sc_rsrc_t core_rsrc;
+	sc_pm_power_mode_t power_mode;
+
+	switch (core_id) {
+	case 0:
+		core_rsrc = SC_R_M4_0_PID0;
+		break;
+#ifdef CONFIG_IMX8QM
+	case 1:
+		core_rsrc = SC_R_M4_1_PID0;
+		break;
+#endif
+	default:
+		printf("Not support this core, ID:%u\n", core_id);
+		return 0;
+	}
+
+	if (sc_pm_get_resource_power_mode(-1, core_rsrc, &power_mode) != SC_ERR_NONE)
+		return 0;
+
+	if (power_mode != SC_PM_PW_MODE_OFF)
+		return 1;
  
 	return 0;
 }
@@ -14,6 +14,7 @@
 #include <linux/compiler.h>
 #include <cpu_func.h>
  
+#ifndef CONFIG_IMX8
 #ifndef CONFIG_IMX8M
 const __weak struct rproc_att hostmap[] = { };
  
@@ -151,7 +152,7 @@
 	return 1;
 #endif
 }
-
+#endif
 /*
  * To i.MX6SX and i.MX7D, the image supported by bootaux needs
  * the reset vector at the head for the image, with SP and PC
  
@@ -170,11 +171,15 @@
 {
 	ulong addr;
 	int ret, up;
+	u32 core = 0;
  
 	if (argc < 2)
 		return CMD_RET_USAGE;
  
-	up = arch_auxiliary_core_check_up(0);
+	if (argc > 2)
+		core = simple_strtoul(argv[2], NULL, 10);
+
+	up = arch_auxiliary_core_check_up(core);
 	if (up) {
 		printf("## Auxiliary core is already up\n");
 		return CMD_RET_SUCCESS;
@@ -185,7 +190,7 @@
 	if (!addr)
 		return CMD_RET_FAILURE;
  
-	ret = arch_auxiliary_core_up(0, addr);
+	ret = arch_auxiliary_core_up(core, addr);
 	if (ret)
 		return CMD_RET_FAILURE;
  
@@ -195,6 +200,8 @@
 U_BOOT_CMD(
 	bootaux, CONFIG_SYS_MAXARGS, 1,	do_bootaux,
 	"Start auxiliary core",
-	""
+	"<address> [<core>]\n"
+	"   - start auxiliary core [<core>] (default 0),\n"
+	"     at address <address>\n"
 );
...	...	@@ -210,6 +210,7 @@
210	210	u64 *phys_sdram_2_start,
211	211	u64 *phys_sdram_2_size);
212	212
	213	+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data);
213	214	int arch_auxiliary_core_check_up(u32 core_id);
214	215
215	216	int board_mmc_get_env_dev(int devno);
...	...	@@ -33,7 +33,7 @@
33	33
34	34	config IMX_BOOTAUX
35	35	bool "Support boot auxiliary core"
36		- depends on ARCH_MX7 \|\| ARCH_MX6 \|\| ARCH_VF610 \|\| ARCH_IMX8M
	36	+ depends on ARCH_MX7 \|\| ARCH_MX6 \|\| ARCH_VF610 \|\| ARCH_IMX8 \|\| ARCH_IMX8M
37	37	help
38	38	bootaux [addr] to boot auxiliary core.
39	39
...	...	@@ -63,6 +63,11 @@
63	63	obj-y += ddrmc-vf610.o
64	64	obj-$(CONFIG_DDRMC_VF610_CALIBRATION) += ddrmc-vf610-calibration.o
65	65	endif
	66	+ifeq ($(SOC),$(filter $(SOC),imx8))
	67	+ifneq ($(CONFIG_SPL_BUILD),y)
	68	+obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o
	69	+endif
	70	+endif
66	71	ifneq ($(CONFIG_SPL_BUILD),y)
67	72	obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
68	73	obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
...	...	@@ -19,6 +19,8 @@
19	19	#include <spl.h>
20	20	#include <thermal.h>
21	21	#include <asm/arch/sci/sci.h>
	22	+#include <power-domain.h>
	23	+#include <elf.h>
22	24	#include <asm/arch/sys_proto.h>
23	25	#include <asm/arch-imx/cpu.h>
24	26	#include <asm/armv8/cpu.h>
...	...	@@ -101,6 +103,179 @@
101	103	if (ret)
102	104	printf("Failed to initialize %s: %d\n", dev->name, ret);
103	105	}
	106	+
	107	+ return 0;
	108	+}
	109	+#endif
	110	+
	111	+#ifdef CONFIG_IMX_BOOTAUX
	112	+
	113	+#ifdef CONFIG_IMX8QM
	114	+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
	115	+{
	116	+ sc_rsrc_t core_rsrc, mu_rsrc;
	117	+ sc_faddr_t tcml_addr;
	118	+ u32 tcml_size = SZ_128K;
	119	+ ulong addr;
	120	+
	121	+
	122	+ switch (core_id) {
	123	+ case 0:
	124	+ core_rsrc = SC_R_M4_0_PID0;
	125	+ tcml_addr = 0x34FE0000;
	126	+ mu_rsrc = SC_R_M4_0_MU_1A;
	127	+ break;
	128	+ case 1:
	129	+ core_rsrc = SC_R_M4_1_PID0;
	130	+ tcml_addr = 0x38FE0000;
	131	+ mu_rsrc = SC_R_M4_1_MU_1A;
	132	+ break;
	133	+ default:
	134	+ printf("Not support this core boot up, ID:%u\n", core_id);
	135	+ return -EINVAL;
	136	+ }
	137	+
	138	+ addr = (sc_faddr_t)boot_private_data;
	139	+
	140	+ if (addr >= tcml_addr && addr <= tcml_addr + tcml_size) {
	141	+ printf("Wrong image address 0x%lx, should not in TCML\n",
	142	+ addr);
	143	+ return -EINVAL;
	144	+ }
	145	+
	146	+ printf("Power on M4 and MU\n");
	147	+
	148	+ if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
	149	+ return -EIO;
	150	+
	151	+ if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
	152	+ return -EIO;
	153	+
	154	+ printf("Copy M4 image from 0x%lx to TCML 0x%lx\n", addr, (ulong)tcml_addr);
	155	+
	156	+ if (addr != tcml_addr)
	157	+ memcpy((void )tcml_addr, (void )addr, tcml_size);
	158	+
	159	+ printf("Start M4 %u\n", core_id);
	160	+ if (sc_pm_cpu_start(-1, core_rsrc, true, tcml_addr) != SC_ERR_NONE)
	161	+ return -EIO;
	162	+
	163	+ printf("bootaux complete\n");
	164	+ return 0;
	165	+}
	166	+#endif
	167	+
	168	+#ifdef CONFIG_IMX8QXP
	169	+int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
	170	+{
	171	+ sc_rsrc_t core_rsrc, mu_rsrc = SC_R_NONE;
	172	+ sc_faddr_t aux_core_ram;
	173	+ u32 size;
	174	+ ulong addr;
	175	+
	176	+ switch (core_id) {
	177	+ case 0:
	178	+ core_rsrc = SC_R_M4_0_PID0;
	179	+ aux_core_ram = 0x34FE0000;
	180	+ mu_rsrc = SC_R_M4_0_MU_1A;
	181	+ size = SZ_128K;
	182	+ break;
	183	+ case 1:
	184	+ core_rsrc = SC_R_DSP;
	185	+ aux_core_ram = 0x596f8000;
	186	+ size = SZ_2K;
	187	+ break;
	188	+ default:
	189	+ printf("Not support this core boot up, ID:%u\n", core_id);
	190	+ return -EINVAL;
	191	+ }
	192	+
	193	+ addr = (sc_faddr_t)boot_private_data;
	194	+
	195	+ if (addr >= aux_core_ram && addr <= aux_core_ram + size) {
	196	+ printf("Wrong image address 0x%lx, should not in aux core ram\n",
	197	+ addr);
	198	+ return -EINVAL;
	199	+ }
	200	+
	201	+ printf("Power on aux core %d\n", core_id);
	202	+
	203	+ if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
	204	+ return -EIO;
	205	+
	206	+ if (mu_rsrc != SC_R_NONE) {
	207	+ if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
	208	+ return -EIO;
	209	+ }
	210	+
	211	+ if (core_id == 1) {
	212	+ struct power_domain pd;
	213	+
	214	+ if (sc_pm_clock_enable(-1, core_rsrc, SC_PM_CLK_PER, true, false) != SC_ERR_NONE) {
	215	+ printf("Error enable clock\n");
	216	+ return -EIO;
	217	+ }
	218	+
	219	+ if (!power_domain_lookup_name("audio_sai0", &pd)) {
	220	+ if (power_domain_on(&pd)) {
	221	+ printf("Error power on SAI0\n");
	222	+ return -EIO;
	223	+ }
	224	+ }
	225	+
	226	+ if (!power_domain_lookup_name("audio_ocram", &pd)) {
	227	+ if (power_domain_on(&pd)) {
	228	+ printf("Error power on HIFI RAM\n");
	229	+ return -EIO;
	230	+ }
	231	+ }
	232	+ }
	233	+
	234	+ printf("Copy image from 0x%lx to 0x%lx\n", addr, (ulong)aux_core_ram);
	235	+ if (core_id == 0) {
	236	+ /* M4 use bin file */
	237	+ memcpy((void )aux_core_ram, (void )addr, size);
	238	+ } else {
	239	+ /* HIFI use elf file */
	240	+ if (!valid_elf_image(addr))
	241	+ return -1;
	242	+ addr = load_elf_image_shdr(addr);
	243	+ }
	244	+
	245	+ printf("Start %s\n", core_id == 0 ? "M4" : "HIFI");
	246	+
	247	+ if (sc_pm_cpu_start(-1, core_rsrc, true, aux_core_ram) != SC_ERR_NONE)
	248	+ return -EIO;
	249	+
	250	+ printf("bootaux complete\n");
	251	+ return 0;
	252	+}
	253	+#endif
	254	+
	255	+int arch_auxiliary_core_check_up(u32 core_id)
	256	+{
	257	+ sc_rsrc_t core_rsrc;
	258	+ sc_pm_power_mode_t power_mode;
	259	+
	260	+ switch (core_id) {
	261	+ case 0:
	262	+ core_rsrc = SC_R_M4_0_PID0;
	263	+ break;
	264	+#ifdef CONFIG_IMX8QM
	265	+ case 1:
	266	+ core_rsrc = SC_R_M4_1_PID0;
	267	+ break;
	268	+#endif
	269	+ default:
	270	+ printf("Not support this core, ID:%u\n", core_id);
	271	+ return 0;
	272	+ }
	273	+
	274	+ if (sc_pm_get_resource_power_mode(-1, core_rsrc, &power_mode) != SC_ERR_NONE)
	275	+ return 0;
	276	+
	277	+ if (power_mode != SC_PM_PW_MODE_OFF)
	278	+ return 1;
104	279
105	280	return 0;
106	281	}
...	...	@@ -14,6 +14,7 @@
14	14	#include <linux/compiler.h>
15	15	#include <cpu_func.h>
16	16
	17	+#ifndef CONFIG_IMX8
17	18	#ifndef CONFIG_IMX8M
18	19	const __weak struct rproc_att hostmap[] = { };
19	20
...	...	@@ -151,7 +152,7 @@
151	152	return 1;
152	153	#endif
153	154	}
154		-
	155	+#endif
155	156	/*
156	157	* To i.MX6SX and i.MX7D, the image supported by bootaux needs
157	158	* the reset vector at the head for the image, with SP and PC
158	159
...	...	@@ -170,11 +171,15 @@
170	171	{
171	172	ulong addr;
172	173	int ret, up;
	174	+ u32 core = 0;
173	175
174	176	if (argc < 2)
175	177	return CMD_RET_USAGE;
176	178
177		- up = arch_auxiliary_core_check_up(0);
	179	+ if (argc > 2)
	180	+ core = simple_strtoul(argv[2], NULL, 10);
	181	+
	182	+ up = arch_auxiliary_core_check_up(core);
178	183	if (up) {
179	184	printf("## Auxiliary core is already up\n");
180	185	return CMD_RET_SUCCESS;
...	...	@@ -185,7 +190,7 @@
185	190	if (!addr)
186	191	return CMD_RET_FAILURE;
187	192
188		- ret = arch_auxiliary_core_up(0, addr);
	193	+ ret = arch_auxiliary_core_up(core, addr);
189	194	if (ret)
190	195	return CMD_RET_FAILURE;
191	196
...	...	@@ -195,6 +200,8 @@
195	200	U_BOOT_CMD(
196	201	bootaux, CONFIG_SYS_MAXARGS, 1, do_bootaux,
197	202	"Start auxiliary core",
198		- ""
	203	+ "<address> [<core>]\n"
	204	+ " - start auxiliary core [<core>] (default 0),\n"
	205	+ " at address <address>\n"
199	206	);