sf: Add quad read/write commands support

This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

sf: Add quad read/write commands support
This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Jagannadha Sutradharudu Teki
1 parent 4e09cc1e2c
Showing 5 changed files with 113 additions and 89 deletions Side-by-side Diff
drivers/mtd/spi/sf_internal.h
drivers/mtd/spi/sf_ops.c
drivers/mtd/spi/sf_probe.c
include/spi.h
include/spi_flash.h
@@ -28,6 +28,7 @@
 #define CMD_PAGE_PROGRAM		0x02
 #define CMD_WRITE_DISABLE		0x04
 #define CMD_READ_STATUS			0x05
+#define CMD_QUAD_PAGE_PROGRAM		0x32
 #define CMD_READ_STATUS1		0x35
 #define CMD_WRITE_ENABLE		0x06
 #define CMD_READ_CONFIG			0x35
@@ -38,6 +39,7 @@
 #define CMD_READ_ARRAY_FAST		0x0b
 #define CMD_READ_DUAL_OUTPUT_FAST	0x3b
 #define CMD_READ_DUAL_IO_FAST		0xbb
+#define CMD_READ_QUAD_OUTPUT_FAST	0x6b
 #define CMD_READ_ID			0x9f
  
 /* Bank addr access commands */
@@ -210,7 +210,7 @@
  
 	page_size = flash->page_size;
  
-	cmd[0] = CMD_PAGE_PROGRAM;
+	cmd[0] = flash->write_cmd;
 	for (actual = 0; actual < len; actual += chunk_len) {
 #ifdef CONFIG_SPI_FLASH_BAR
 		ret = spi_flash_bank(flash, offset);
@@ -42,105 +42,105 @@
  
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
-	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	0,          SECT_4K},
-	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	0,          SECT_4K},
-	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	0,          SECT_4K},
-	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	0,          SECT_4K},
-	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	0,          SECT_4K},
-	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	0,          SECT_4K},
-	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	0,	    SECT_4K},
-	{"AT25DF321",      0x1f4701, 0x0,	64 * 1024,    64,	0,          SECT_4K},
+	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	0,		    SECT_4K},
+	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	0,		    SECT_4K},
+	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	0,		    SECT_4K},
+	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	0,		    SECT_4K},
+	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	0,		    SECT_4K},
+	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
+	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
+	{"AT25DF321",      0x1f4701, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON		/* EON */
-	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	0,                0},
-	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	0,                0},
-	{"EN25S64",	   0x1c3817, 0x0,	64 * 1024,   128,	0,	          0},
+	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	0,			  0},
+	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
+	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	0,			  0},
+	{"EN25S64",	   0x1c3817, 0x0,	64 * 1024,   128,	0,			  0},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	0,          SECT_4K},
+	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	0,		    SECT_4K},
+	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	0,		    SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
-	{"MX25L2006E",	   0xc22012, 0x0,	64 * 1024,     4,	0,                0},
-	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	0,                0},
-	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	0,                0},
-	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	0,                0},
-	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	0,                0},
-	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	0,                0},
-	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256,	0,                0},
-	{"MX25L25635F",	   0xc22019, 0x0,	64 * 1024,   512,	0,                0},
-	{"MX25L51235F",	   0xc2201a, 0x0,	64 * 1024,  1024,	0,                0},
-	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256,	0,                0},
+	{"MX25L2006E",	   0xc22012, 0x0,	64 * 1024,     4,	0,			  0},
+	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	0,			  0},
+	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	0,			  0},
+	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	0,			  0},
+	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	0,			  0},
+	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	0,			  0},
+	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256,	0,			  0},
+	{"MX25L25635F",	   0xc22019, 0x0,	64 * 1024,   512,	0,			  0},
+	{"MX25L51235F",	   0xc2201a, 0x0,	64 * 1024,  1024,	0,			  0},
+	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256,	0,			  0},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
-	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	0,                0},
-	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	0,                0},
-	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	0,                0},
-	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	0,                0},
-	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64,	0,                0},
-	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256,	0,                0},
-	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64,	0,                0},
-	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128,	0,                0},
-	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256,	0,	          0},
-	{"S25FL256S_256K", 0x010219, 0x4d00,    64 * 1024,   512, RD_EXTN,		  0},
-	{"S25FL256S_64K",  0x010219, 0x4d01,	64 * 1024,   512, RD_EXTN,		  0},
-	{"S25FL512S_256K", 0x010220, 0x4d00,    64 * 1024,  1024,	0,                0},
-	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024,	0,                0},
+	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	0,			  0},
+	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	0,			  0},
+	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	0,			  0},
+	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	0,			  0},
+	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64,	0,			  0},
+	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256,	0,			  0},
+	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64,	0,			  0},
+	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128,	0,			  0},
+	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256,	0,			  0},
+	{"S25FL256S_256K", 0x010219, 0x4d00,    64 * 1024,   512, RD_FULL,		     WR_QPP},
+	{"S25FL256S_64K",  0x010219, 0x4d01,	64 * 1024,   512, RD_FULL,		     WR_QPP},
+	{"S25FL512S_256K", 0x010220, 0x4d00,    64 * 1024,  1024,	0,			  0},
+	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024,	0,			  0},
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	{"M25P10",	   0x202011, 0x0,       32 * 1024,     4,	0,                0},
-	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	0,                0},
-	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	0,                0},
-	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	0,                0},
-	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	0,                0},
-	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	0,                0},
-	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	0,                0},
-	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	0,                0},
-	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64,	0,          SECT_4K},
-	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64,	0,          SECT_4K},
-	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128,	0,          SECT_4K},
-	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128,	0,          SECT_4K},
-	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256,	0,          SECT_4K},
-	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256,	0,          SECT_4K},
-	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512,	0,          SECT_4K},
-	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512,	0,          SECT_4K},
-	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024,       0,  E_FSR | SECT_4K},
-	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024,       0,  E_FSR | SECT_4K},
-	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048,       0,  E_FSR | SECT_4K},
-	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048,       0,  E_FSR | SECT_4K},
+	{"M25P10",	   0x202011, 0x0,	32 * 1024,     4,	0,			  0},
+	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	0,			  0},
+	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	0,			  0},
+	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	0,			  0},
+	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	0,			  0},
+	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	0,			  0},
+	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	0,			  0},
+	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	0,			  0},
+	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64,	0,		    SECT_4K},
+	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64,	0,		    SECT_4K},
+	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128,	0,		    SECT_4K},
+	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128,	0,		    SECT_4K},
+	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256,	0,		    SECT_4K},
+	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256,	0,		    SECT_4K},
+	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512,	0,		    SECT_4K},
+	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512,	0,		    SECT_4K},
+	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024,       0,	    E_FSR | SECT_4K},
+	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024,       0,	    E_FSR | SECT_4K},
+	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048,       0,	    E_FSR | SECT_4K},
+	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048,	0,	    E_FSR | SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
-	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,       0, SECT_4K | SST_WP},
-	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,	0, SECT_4K | SST_WP},
-	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,	0, SECT_4K | SST_WP},
-	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,	0, SECT_4K | SST_WP},
-	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,       0, SECT_4K | SST_WP},
-	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,       0, SECT_4K | SST_WP},
-	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,       0, SECT_4K | SST_WP},
-	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,       0, SECT_4K | SST_WP},
-	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,       0, SECT_4K | SST_WP},
+	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,	0,          SECT_4K | SST_WP},
+	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,	0,	    SECT_4K | SST_WP},
+	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,	0,	    SECT_4K | SST_WP},
+	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,	0,	    SECT_4K | SST_WP},
+	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
+	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,	0,	    SECT_4K | SST_WP},
+	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,       0,          SECT_4K | SST_WP},
+	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,       0,	    SECT_4K | SST_WP},
+	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,       0,	    SECT_4K | SST_WP},
+	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,       0,	    SECT_4K | SST_WP},
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
-	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,	0,		  0},
-	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,	0,		  0},
-	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,	0,		  0},
-	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,	0,	    SECT_4K},
-	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,	0,          SECT_4K},
-	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,	0,          SECT_4K},
-	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16,	0,          SECT_4K},
-	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32,	0,          SECT_4K},
-	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64,	0,          SECT_4K},
-	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256,	0,          SECT_4K},
-	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512,	0,          SECT_4K},
-	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16,	0,          SECT_4K},
-	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32,	0,          SECT_4K},
-	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64,	0,          SECT_4K},
-	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128,	0,          SECT_4K},
-	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256,	0,          SECT_4K},
+	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,	0,		           0},
+	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,	0,		           0},
+	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,	0,		           0},
+	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,	0,		     SECT_4K},
+	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,	0,		     SECT_4K},
+	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,	0,		     SECT_4K},
+	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
+	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16,	0,		     SECT_4K},
+	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32,	0,		     SECT_4K},
+	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64,	0,		     SECT_4K},
+	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
+	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256,	0,		     SECT_4K},
+	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512,	0,		     SECT_4K},
+	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16,	0,		     SECT_4K},
+	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32,	0,		     SECT_4K},
+	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64,	0,		     SECT_4K},
+	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128,	0,		     SECT_4K},
+	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256,	0,		     SECT_4K},
 #endif
 	/*
 	 * Note:
@@ -162,6 +162,7 @@
 	CMD_READ_ARRAY_SLOW,
 	CMD_READ_DUAL_OUTPUT_FAST,
 	CMD_READ_DUAL_IO_FAST,
+	CMD_READ_QUAD_OUTPUT_FAST,
 };
  
 static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi,
@@ -241,6 +242,13 @@
 		/* Go for for default supported read cmd */
 		flash->read_cmd = CMD_READ_ARRAY_FAST;
 	}
+
+	/* Not require to look for fastest only two write cmds yet */
+	if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
+		flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
+	else
+		/* Go for default supported write cmd */
+		flash->write_cmd = CMD_PAGE_PROGRAM;
  
 	/* Poll cmd seclection */
 	flash->poll_cmd = CMD_READ_STATUS;
@@ -31,11 +31,16 @@
 #define SPI_XFER_MMAP_END	0x10	/* Memory Mapped End */
 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
  
+/* SPI TX operation modes */
+#define SPI_OPM_TX_QPP		1 << 0
+
 /* SPI RX operation modes */
 #define SPI_OPM_RX_AS		1 << 0
 #define SPI_OPM_RX_DOUT		1 << 1
 #define SPI_OPM_RX_DIO		1 << 2
-#define SPI_OPM_RX_EXTN		SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | SPI_OPM_RX_DIO
+#define SPI_OPM_RX_QOF		1 << 3
+#define SPI_OPM_RX_EXTN		SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \
+				SPI_OPM_RX_DIO | SPI_OPM_RX_QOF
  
 /* Header byte that marks the start of the message */
 #define SPI_PREAMBLE_END_BYTE	0xec
@@ -50,6 +55,7 @@
  * @bus:		ID of the bus that the slave is attached to.
  * @cs:			ID of the chip select connected to the slave.
  * @op_mode_rx:		SPI RX operation mode.
+ * @op_mode_tx:		SPI TX operation mode.
  * @wordlen:		Size of SPI word in number of bits
  * @max_write_size:	If non-zero, the maximum number of bytes which can
  *			be written at once, excluding command bytes.
@@ -59,6 +65,7 @@
 	unsigned int bus;
 	unsigned int cs;
 	u8 op_mode_rx;
+	u8 op_mode_tx;
 	unsigned int wordlen;
 	unsigned int max_write_size;
 	void *memory_map;
@@ -19,13 +19,18 @@
 #include <linux/types.h>
 #include <linux/compiler.h>
  
-/* Enum list - Extended read commands */
+/* No enum list for write commands only QPP */
+#define WR_QPP		1 << 4
+
+/* Enum list - Full read commands */
 enum spi_read_cmds {
 	ARRAY_SLOW = 1 << 0,
 	DUAL_OUTPUT_FAST = 1 << 1,
 	DUAL_IO_FAST = 1 << 2,
+	QUAD_OUTPUT_FAST = 1 << 3,
 };
 #define RD_EXTN		ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST
+#define RD_FULL		RD_EXTN | QUAD_OUTPUT_FAST
  
 /**
  * struct spi_flash - SPI flash structure
@@ -41,7 +46,8 @@
  * @bank_curr:		Current flash bank
  * @poll_cmd:		Poll cmd - for flash erase/program
  * @erase_cmd:		Erase cmd 4K, 32K, 64K
- * @read_cmd:		Read cmd - Array Fast and Extn read
+ * @read_cmd:		Read cmd - Array Fast, Extn read and quad read.
+ * @write_cmd:		Write cmd - page and quad program.
  * @memory_map:		Address of read-only SPI flash access
  * @read:		Flash read ops: Read len bytes at offset into buf
  *			Supported cmds: Fast Array Read
@@ -67,6 +73,7 @@
 	u8 poll_cmd;
 	u8 erase_cmd;
 	u8 read_cmd;
+	u8 write_cmd;
  
 	void *memory_map;
 	int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
...	...	@@ -28,6 +28,7 @@
28	28	#define CMD_PAGE_PROGRAM 0x02
29	29	#define CMD_WRITE_DISABLE 0x04
30	30	#define CMD_READ_STATUS 0x05
	31	+#define CMD_QUAD_PAGE_PROGRAM 0x32
31	32	#define CMD_READ_STATUS1 0x35
32	33	#define CMD_WRITE_ENABLE 0x06
33	34	#define CMD_READ_CONFIG 0x35
...	...	@@ -38,6 +39,7 @@
38	39	#define CMD_READ_ARRAY_FAST 0x0b
39	40	#define CMD_READ_DUAL_OUTPUT_FAST 0x3b
40	41	#define CMD_READ_DUAL_IO_FAST 0xbb
	42	+#define CMD_READ_QUAD_OUTPUT_FAST 0x6b
41	43	#define CMD_READ_ID 0x9f
42	44
43	45	/* Bank addr access commands */
...	...	@@ -210,7 +210,7 @@
210	210
211	211	page_size = flash->page_size;
212	212
213		- cmd[0] = CMD_PAGE_PROGRAM;
	213	+ cmd[0] = flash->write_cmd;
214	214	for (actual = 0; actual < len; actual += chunk_len) {
215	215	#ifdef CONFIG_SPI_FLASH_BAR
216	216	ret = spi_flash_bank(flash, offset);
...	...	@@ -42,105 +42,105 @@
42	42
43	43	static const struct spi_flash_params spi_flash_params_table[] = {
44	44	#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
45		- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0, SECT_4K},
46		- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0, SECT_4K},
47		- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0, SECT_4K},
48		- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0, SECT_4K},
49		- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0, SECT_4K},
50		- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0, SECT_4K},
51		- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0, SECT_4K},
52		- {"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, 0, SECT_4K},
	45	+ {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0, SECT_4K},
	46	+ {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0, SECT_4K},
	47	+ {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0, SECT_4K},
	48	+ {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0, SECT_4K},
	49	+ {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0, SECT_4K},
	50	+ {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0, SECT_4K},
	51	+ {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0, SECT_4K},
	52	+ {"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, 0, SECT_4K},
53	53	#endif
54	54	#ifdef CONFIG_SPI_FLASH_EON /* EON */
55		- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0, 0},
56		- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
57		- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0, 0},
58		- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0, 0},
	55	+ {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0, 0},
	56	+ {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	57	+ {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0, 0},
	58	+ {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0, 0},
59	59	#endif
60	60	#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
61		- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0, SECT_4K},
62		- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	61	+ {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	62	+ {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0, SECT_4K},
63	63	#endif
64	64	#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
65		- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0, 0},
66		- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0, 0},
67		- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0, 0},
68		- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0, 0},
69		- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0, 0},
70		- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0, 0},
71		- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0, 0},
72		- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0, 0},
73		- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, 0, 0},
74		- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0, 0},
	65	+ {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0, 0},
	66	+ {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0, 0},
	67	+ {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0, 0},
	68	+ {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0, 0},
	69	+ {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0, 0},
	70	+ {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0, 0},
	71	+ {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0, 0},
	72	+ {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0, 0},
	73	+ {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, 0, 0},
	74	+ {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0, 0},
75	75	#endif
76	76	#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
77		- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0, 0},
78		- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0, 0},
79		- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0, 0},
80		- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0, 0},
81		- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0, 0},
82		- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0, 0},
83		- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0, 0},
84		- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0, 0},
85		- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0, 0},
86		- {"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, RD_EXTN, 0},
87		- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_EXTN, 0},
88		- {"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0, 0},
89		- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0, 0},
	77	+ {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0, 0},
	78	+ {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0, 0},
	79	+ {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0, 0},
	80	+ {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0, 0},
	81	+ {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, 0, 0},
	82	+ {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, 0, 0},
	83	+ {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, 0, 0},
	84	+ {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, 0, 0},
	85	+ {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, 0, 0},
	86	+ {"S25FL256S_256K", 0x010219, 0x4d00, 64 * 1024, 512, RD_FULL, WR_QPP},
	87	+ {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP},
	88	+ {"S25FL512S_256K", 0x010220, 0x4d00, 64 * 1024, 1024, 0, 0},
	89	+ {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, 0, 0},
90	90	#endif
91	91	#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
92		- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0, 0},
93		- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0, 0},
94		- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0, 0},
95		- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0, 0},
96		- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0, 0},
97		- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0},
98		- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0},
99		- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0},
100		- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0, SECT_4K},
101		- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0, SECT_4K},
102		- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0, SECT_4K},
103		- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0, SECT_4K},
104		- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0, SECT_4K},
105		- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0, SECT_4K},
106		- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0, SECT_4K},
107		- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0, SECT_4K},
108		- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0, E_FSR \| SECT_4K},
109		- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0, E_FSR \| SECT_4K},
110		- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0, E_FSR \| SECT_4K},
111		- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0, E_FSR \| SECT_4K},
	92	+ {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0, 0},
	93	+ {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0, 0},
	94	+ {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0, 0},
	95	+ {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0, 0},
	96	+ {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0, 0},
	97	+ {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0},
	98	+ {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0},
	99	+ {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0},
	100	+ {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0, SECT_4K},
	101	+ {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0, SECT_4K},
	102	+ {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0, SECT_4K},
	103	+ {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0, SECT_4K},
	104	+ {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0, SECT_4K},
	105	+ {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0, SECT_4K},
	106	+ {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0, SECT_4K},
	107	+ {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0, SECT_4K},
	108	+ {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0, E_FSR \| SECT_4K},
	109	+ {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0, E_FSR \| SECT_4K},
	110	+ {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0, E_FSR \| SECT_4K},
	111	+ {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0, E_FSR \| SECT_4K},
112	112	#endif
113	113	#ifdef CONFIG_SPI_FLASH_SST /* SST */
114		- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
115		- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
116		- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, 0, SECT_4K \| SST_WP},
117		- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, 0, SECT_4K \| SST_WP},
118		- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0, SECT_4K},
119		- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, 0, SECT_4K \| SST_WP},
120		- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, 0, SECT_4K \| SST_WP},
121		- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, 0, SECT_4K \| SST_WP},
122		- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
123		- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
	114	+ {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
	115	+ {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
	116	+ {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, 0, SECT_4K \| SST_WP},
	117	+ {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, 0, SECT_4K \| SST_WP},
	118	+ {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0, SECT_4K},
	119	+ {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, 0, SECT_4K \| SST_WP},
	120	+ {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, 0, SECT_4K \| SST_WP},
	121	+ {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, 0, SECT_4K \| SST_WP},
	122	+ {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, 0, SECT_4K \| SST_WP},
	123	+ {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, 0, SECT_4K \| SST_WP},
124	124	#endif
125	125	#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
126		- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0, 0},
127		- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0, 0},
128		- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0, 0},
129		- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0, SECT_4K},
130		- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0, SECT_4K},
131		- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0, SECT_4K},
132		- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
133		- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0, SECT_4K},
134		- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0, SECT_4K},
135		- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0, SECT_4K},
136		- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0, SECT_4K},
137		- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0, SECT_4K},
138		- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0, SECT_4K},
139		- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0, SECT_4K},
140		- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0, SECT_4K},
141		- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0, SECT_4K},
142		- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0, SECT_4K},
143		- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0, SECT_4K},
	126	+ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0, 0},
	127	+ {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0, 0},
	128	+ {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0, 0},
	129	+ {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0, SECT_4K},
	130	+ {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0, SECT_4K},
	131	+ {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	132	+ {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	133	+ {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0, SECT_4K},
	134	+ {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0, SECT_4K},
	135	+ {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	136	+ {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	137	+ {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0, SECT_4K},
	138	+ {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0, SECT_4K},
	139	+ {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0, SECT_4K},
	140	+ {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0, SECT_4K},
	141	+ {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0, SECT_4K},
	142	+ {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0, SECT_4K},
	143	+ {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0, SECT_4K},
144	144	#endif
145	145	/*
146	146	* Note:
...	...	@@ -162,6 +162,7 @@
162	162	CMD_READ_ARRAY_SLOW,
163	163	CMD_READ_DUAL_OUTPUT_FAST,
164	164	CMD_READ_DUAL_IO_FAST,
	165	+ CMD_READ_QUAD_OUTPUT_FAST,
165	166	};
166	167
167	168	static struct spi_flash spi_flash_validate_params(struct spi_slave spi,
...	...	@@ -241,6 +242,13 @@
241	242	/* Go for for default supported read cmd */
242	243	flash->read_cmd = CMD_READ_ARRAY_FAST;
243	244	}
	245	+
	246	+ /* Not require to look for fastest only two write cmds yet */
	247	+ if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
	248	+ flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
	249	+ else
	250	+ /* Go for default supported write cmd */
	251	+ flash->write_cmd = CMD_PAGE_PROGRAM;
244	252
245	253	/* Poll cmd seclection */
246	254	flash->poll_cmd = CMD_READ_STATUS;
...	...	@@ -31,11 +31,16 @@
31	31	#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */
32	32	#define SPI_XFER_ONCE (SPI_XFER_BEGIN \| SPI_XFER_END)
33	33
	34	+/* SPI TX operation modes */
	35	+#define SPI_OPM_TX_QPP 1 << 0
	36	+
34	37	/* SPI RX operation modes */
35	38	#define SPI_OPM_RX_AS 1 << 0
36	39	#define SPI_OPM_RX_DOUT 1 << 1
37	40	#define SPI_OPM_RX_DIO 1 << 2
38		-#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS \| SPI_OPM_RX_DOUT \| SPI_OPM_RX_DIO
	41	+#define SPI_OPM_RX_QOF 1 << 3
	42	+#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS \| SPI_OPM_RX_DOUT \| \
	43	+ SPI_OPM_RX_DIO \| SPI_OPM_RX_QOF
39	44
40	45	/* Header byte that marks the start of the message */
41	46	#define SPI_PREAMBLE_END_BYTE 0xec
...	...	@@ -50,6 +55,7 @@
50	55	* @bus: ID of the bus that the slave is attached to.
51	56	* @cs: ID of the chip select connected to the slave.
52	57	* @op_mode_rx: SPI RX operation mode.
	58	+ * @op_mode_tx: SPI TX operation mode.
53	59	* @wordlen: Size of SPI word in number of bits
54	60	* @max_write_size: If non-zero, the maximum number of bytes which can
55	61	* be written at once, excluding command bytes.
...	...	@@ -59,6 +65,7 @@
59	65	unsigned int bus;
60	66	unsigned int cs;
61	67	u8 op_mode_rx;
	68	+ u8 op_mode_tx;
62	69	unsigned int wordlen;
63	70	unsigned int max_write_size;
64	71	void *memory_map;
...	...	@@ -19,13 +19,18 @@
19	19	#include <linux/types.h>
20	20	#include <linux/compiler.h>
21	21
22		-/* Enum list - Extended read commands */
	22	+/* No enum list for write commands only QPP */
	23	+#define WR_QPP 1 << 4
	24	+
	25	+/* Enum list - Full read commands */
23	26	enum spi_read_cmds {
24	27	ARRAY_SLOW = 1 << 0,
25	28	DUAL_OUTPUT_FAST = 1 << 1,
26	29	DUAL_IO_FAST = 1 << 2,
	30	+ QUAD_OUTPUT_FAST = 1 << 3,
27	31	};
28	32	#define RD_EXTN ARRAY_SLOW \| DUAL_OUTPUT_FAST \| DUAL_IO_FAST
	33	+#define RD_FULL RD_EXTN \| QUAD_OUTPUT_FAST
29	34
30	35	/**
31	36	* struct spi_flash - SPI flash structure
...	...	@@ -41,7 +46,8 @@
41	46	* @bank_curr: Current flash bank
42	47	* @poll_cmd: Poll cmd - for flash erase/program
43	48	* @erase_cmd: Erase cmd 4K, 32K, 64K
44		- * @read_cmd: Read cmd - Array Fast and Extn read
	49	+ * @read_cmd: Read cmd - Array Fast, Extn read and quad read.
	50	+ * @write_cmd: Write cmd - page and quad program.
45	51	* @memory_map: Address of read-only SPI flash access
46	52	* @read: Flash read ops: Read len bytes at offset into buf
47	53	* Supported cmds: Fast Array Read
...	...	@@ -67,6 +73,7 @@
67	73	u8 poll_cmd;
68	74	u8 erase_cmd;
69	75	u8 read_cmd;
	76	+ u8 write_cmd;
70	77
71	78	void *memory_map;
72	79	int (read)(struct spi_flash flash, u32 offset, size_t len, void *buf);