Eric Lee / smarc-uboot

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Commit 3c5628ccf4459bef29471889b9af255a388244fa

Authored by Anson Huang
1 parent 9ebc498844
Exists in smarc-rel_imx_4.1.15_2.0.0_ga

MLK-12748-3 imx: adjust imx7d lpddr3 lpsr exit flow 

On i.MX7D lpddr3, retention mode exit flow should restore
more registers to make sure the ddr controller and ddr phy
settings restored properly, otherwise, some of the boards
can NOT pass memtester after retention mode exited.

For LPSR mode, ddr resume flow is same as retention mode,
just adjust it accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Showing 1 changed file with 13 additions and 1 deletions Side-by-side Diff

board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S
Diff comments   View file @ 3c5628c
... ... @@ -151,7 +151,7 @@
151 151 str r7, [r3, r6]
152 152  
153 153 ldr r6, =0x108
154   - ldr r7, =0x03060707
  154 + ldr r7, =0x03060708
155 155 str r7, [r3, r6]
156 156  
157 157 ldr r6, =0x10c
... ... @@ -174,6 +174,10 @@
174 174 ldr r7, =0x00000202
175 175 str r7, [r3, r6]
176 176  
  177 + ldr r6, =0x120
  178 + ldr r7, =0x00000202
  179 + str r7, [r3, r6]
  180 +
177 181 ldr r6, =0x180
178 182 ldr r7, =0x00600018
179 183 str r7, [r3, r6]
... ... @@ -198,6 +202,10 @@
198 202 ldr r7, =0x00171717
199 203 str r7, [r3, r6]
200 204  
  205 + ldr r6, =0x210
  206 + ldr r7, =0xF00
  207 + str r7, [r3, r6]
  208 +
201 209 ldr r6, =0x214
202 210 ldr r7, =0x05050505
203 211 str r7, [r3, r6]
... ... @@ -265,6 +273,10 @@
265 273  
266 274 ldr r6, =0x10
267 275 ldr r7, =0x0007080C
  276 + str r7, [r4, r6]
  277 +
  278 + ldr r6, =0xb0
  279 + ldr r7, =0x1010007e
268 280 str r7, [r4, r6]
269 281  
270 282 ldr r7, [r1, #0x800]