powerpc: mpc5xxx: remove aev, TB5200 board support

They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

powerpc: mpc5xxx: remove aev, TB5200 board support
They have not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada · Tom Rini
1 parent 2da8137b45
Showing 12 changed files with 4 additions and 1031 deletions Side-by-side Diff
arch/powerpc/cpu/mpc5xxx/Kconfig
board/tqc/tqm5200/Kconfig
board/tqc/tqm5200/MAINTAINERS
board/tqc/tqm5200/Makefile
board/tqc/tqm5200/cmd_tb5200.c
board/tqc/tqm5200/tqm5200.c
configs/TB5200_B_defconfig
configs/TB5200_defconfig
configs/aev_defconfig
doc/README.scrapyard
include/configs/TB5200.h
include/configs/aev.h
@@ -65,14 +65,8 @@
 config TARGET_PCM030
 	bool "Support pcm030"
  
-config TARGET_AEV
-	bool "Support aev"
-
 config TARGET_CHARON
 	bool "Support charon"
-
-config TARGET_TB5200
-	bool "Support TB5200"
  
 config TARGET_TQM5200
 	bool "Support TQM5200"
-if TARGET_AEV
-
-config SYS_BOARD
-	default "tqm5200"
-
-config SYS_VENDOR
-	default "tqc"
-
-config SYS_CONFIG_NAME
-	default "aev"
-
-endif
-
 if TARGET_CHARON
  
 config SYS_BOARD
@@ -21,19 +8,6 @@
  
 config SYS_CONFIG_NAME
 	default "charon"
-
-endif
-
-if TARGET_TB5200
-
-config SYS_BOARD
-	default "tqm5200"
-
-config SYS_VENDOR
-	default "tqc"
-
-config SYS_CONFIG_NAME
-	default "TB5200"
  
 endif
  
@@ -9,9 +9,6 @@
 F:	configs/cam5200_niosflash_defconfig
 F:	configs/fo300_defconfig
 F:	configs/MiniFAP_defconfig
-F:	include/configs/TB5200.h
-F:	configs/TB5200_defconfig
-F:	configs/TB5200_B_defconfig
 F:	configs/TQM5200_defconfig
 F:	configs/TQM5200_B_defconfig
 F:	configs/TQM5200_B_HIGHBOOT_defconfig
@@ -5,5 +5,5 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
  
-obj-y	:= tqm5200.o cmd_stk52xx.o cmd_tb5200.o cam5200_flash.o
+obj-y	:= tqm5200.o cmd_stk52xx.o cam5200_flash.o
-/*
- * (C) Copyright 2005 - 2006
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * TB5200 specific functions
- */
-/*#define DEBUG*/
-
-#include <common.h>
-#include <command.h>
-
-#if defined(CONFIG_CMD_BSP)
-#if defined (CONFIG_TB5200)
-
-#define SM501_PANEL_DISPLAY_CONTROL	0x00080000UL
-
-static void led_init(void)
-{
-	struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
-
-	/* configure timer 4 for simple GPIO output */
-	gpt->gpt4.emsr |=  0x00000024;
-}
-
-int cmd_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
-
-	led_init();
-
-	if (strcmp (argv[1], "on") == 0) {
-		debug ("switch status LED on\n");
-		gpt->gpt4.emsr |=  (1 << 4);
-	} else if (strcmp (argv[1], "off") == 0) {
-		debug ("switch status LED off\n");
-		gpt->gpt4.emsr &=  ~(1 << 4);
-	} else {
-		printf ("Usage:\nled on/off\n");
-		return 1;
-	}
-
-	return 0;
-}
-
-static void sm501_backlight (unsigned int state)
-{
-	if (state == 1) {
-		*(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) |=
-			(1 << 26) | (1 << 27);
-	} else if (state == 0)
-		*(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
-			~((1 << 26) | (1 << 27));
-}
-
-int cmd_backlight(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	if (strcmp (argv[1], "on") == 0) {
-		debug ("switch backlight on\n");
-		sm501_backlight (1);
-	} else if (strcmp (argv[1], "off") == 0) {
-		debug ("switch backlight off\n");
-		sm501_backlight (0);
-	} else {
-		printf ("Usage:\nbacklight on/off\n");
-		return 1;
-	}
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	led ,	2,	1,	cmd_led,
-	"switch status LED on or off",
-	"on/off"
-);
-
-U_BOOT_CMD(
-	backlight ,	2,	1,	cmd_backlight,
-	"switch backlight on or off",
-	"on/off"
-	);
-
-#endif /* CONFIG_STK52XX */
-#endif
@@ -258,11 +258,6 @@
  
 int checkboard (void)
 {
-#if defined(CONFIG_AEVFIFO)
-	puts ("Board: AEVFIFO\n");
-	return 0;
-#endif
-
 #if defined(CONFIG_TQM5200S)
 # define MODULE_NAME	"TQM5200S"
 #else
@@ -271,8 +266,6 @@
  
 #if defined(CONFIG_STK52XX)
 # define CARRIER_NAME	"STK52xx"
-#elif defined(CONFIG_TB5200)
-# define CARRIER_NAME	"TB5200"
 #elif defined(CONFIG_CAM5200)
 # define CARRIER_NAME	"CAM5200"
 #elif defined(CONFIG_FO300)
  
@@ -762,16 +755,13 @@
 	if (line_number == 1) {
 	strcpy (info, " Board: TQM5200 (TQ-Components GmbH)");
 #if defined (CONFIG_CHARON) || defined (CONFIG_FO300) || \
-	defined(CONFIG_STK52XX) || defined(CONFIG_TB5200)
+	defined(CONFIG_STK52XX)
 	} else if (line_number == 2) {
 #if defined (CONFIG_CHARON)
 		strcpy (info, "        on a CHARON carrier board");
 #endif
 #if defined (CONFIG_STK52XX)
 		strcpy (info, "        on a STK52xx carrier board");
-#endif
-#if defined (CONFIG_TB5200)
-		strcpy (info, "        on a TB5200 carrier board");
 #endif
 #if defined (CONFIG_FO300)
 		strcpy (info, "        on a FO300 carrier board");
-CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B"
-CONFIG_PPC=y
-CONFIG_MPC5xxx=y
-CONFIG_TARGET_TB5200=y
-CONFIG_PPC=y
-CONFIG_MPC5xxx=y
-CONFIG_TARGET_TB5200=y
-CONFIG_PPC=y
-CONFIG_MPC5xxx=y
-CONFIG_TARGET_AEV=y
@@ -12,6 +12,8 @@
  
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+aev              powerpc     mpc5xxx        -           -
+TB5200           powerpc     mpc5xxx        -           -
 JSE              powerpc     ppc4xx         -           -           Stephen Williams <steve@icarus.com>
 BC3450           powerpc     mpc5xxx        -           -
 hawkboard        arm         arm926ejs      cb957cda    2015-02-24  Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com>
-/*
- * (C) Copyright 2003-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004-2006
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC5200		1	/* This is an MPC5200 CPU */
-#define CONFIG_TQM5200		1	/* ... on TQM5200 module */
-#define CONFIG_TB5200		1	/* ... on a TB5200 base board */
-
-/*
- * Valid values for CONFIG_SYS_TEXT_BASE are:
- * 0xFC000000	boot low (standard configuration with room for
- *		max 64 MByte Flash ROM)
- * 0xFFF00000	boot high (for a backup copy of U-Boot)
- * 0x00100000	boot from RAM (for testing only)
- */
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xFC000000
-#endif
-
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE	1	/* default console is on PSC1 */
-#define CONFIG_PSC_CONSOLE2	6	/* second console is on PSC6 */
-#define CONFIG_BAUDRATE		115200	/* ... at 115200 bps */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*
- * Video console
- */
-#if 1
-#define CONFIG_VIDEO
-#define CONFIG_VIDEO_SM501
-#define CONFIG_VIDEO_SM501_32BPP
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_CONSOLE_EXTRA_INFO
-#define CONFIG_VIDEO_SW_CURSOR
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#endif
-
-/* Partitions */
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-
-/* USB */
-#define CONFIG_USB_OHCI
-#define CONFIG_USB_STORAGE
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_MEMORY   | \
-				 CONFIG_SYS_POST_CPU	   | \
-				 CONFIG_SYS_POST_I2C)
-
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#endif
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SNTP
-#define CONFIG_CMD_BSP
-#define CONFIG_CMD_USB
-
-#ifdef CONFIG_VIDEO
-#define CONFIG_CMD_BMP
-#endif
-
-#ifdef CONFIG_POST
-#define CONFIG_CMD_DIAG
-#endif
-
-
-#define	CONFIG_TIMESTAMP		/* display image timestamps */
-
-#if (CONFIG_SYS_TEXT_BASE == 0xFC000000)		/* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#if defined(CONFIG_TQM5200_B)
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"rootpath=/opt/eldk/ppc_6xx\0"					\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_self=run ramargs addip;"					\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"bootfile=/tftpboot/tqm5200/uImage\0"				\
-	"load=tftp 200000 ${u-boot}\0"					\
-	"u-boot=/tftpboot/tqm5200/u-boot.bin\0"				\
-	"update=protect off FC000000 FC07FFFF;"				\
-		"erase FC000000 FC07FFFF;"				\
-		"cp.b 200000 FC000000 ${filesize};"			\
-		"protect on FC000000 FC07FFFF\0"			\
-	""
-#else
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"rootpath=/opt/eldk/ppc_6xx\0"					\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_self=run ramargs addip;"					\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"bootfile=/tftpboot/tqm5200/uImage\0"				\
-	"load=tftp 200000 $(u-boot)\0"					\
-	"u-boot=/tftpboot/tqm5200/u-boot.bin\0"				\
-	"update=protect off FC000000 FC05FFFF;"				\
-		"erase FC000000 FC05FFFF;"				\
-		"cp.b 200000 FC000000 ${filesize};"			\
-		"protect on FC000000 FC05FFFF\0"			\
-	""
-#endif /* CONFIG_TQM5200_B */
-
-#define CONFIG_BOOTCOMMAND	"run net_nfs"
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
-/*
- * PCI Bus clocking configuration
- *
- * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
- * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
- */
-#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2		/* define for 66MHz speed */
-#endif
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #2 */
-
-/*
- * I2C clock frequency
- *
- * Please notice, that the resulting clock frequency could differ from the
- * configured value. This is because the I2C clock is derived from system
- * clock over a frequency divider with only a few divider values. U-boot
- * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
- * approximation allways lies below the configured value, never above.
- */
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
- * also). For other EEPROMs configuration should be verified. On Mini-FAP the
- * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
- * same configuration could be used.
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* 1010000x */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5	/* =32 Bytes per write */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
-
-/* List of I2C addresses to be verified by POST */
-#undef CONFIG_SYS_POST_I2C_ADDRS
-#define CONFIG_SYS_POST_I2C_ADDRS	{CONFIG_SYS_I2C_EEPROM_ADDR,	\
-					 CONFIG_SYS_I2C_RTC_ADDR,	\
-					 CONFIG_SYS_I2C_SLAVE}
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
-
-/* use CFI flash driver */
-#define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
-#define CONFIG_FLASH_CFI_DRIVER	1	/* Use the common driver */
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_BOOTCS_START }
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_SIZE		0x04000000 /* 64 MByte */
-#define CONFIG_SYS_MAX_FLASH_SECT	512	/* max num of sects on one chip */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
-
-#if !defined(CONFIG_SYS_LOWBOOT)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
-#else	/* CONFIG_SYS_LOWBOOT */
-#if defined(CONFIG_TQM5200_B)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00080000)
-#else
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00060000)
-#endif /* CONFIG_TQM5200_B */
-#endif	/* CONFIG_SYS_LOWBOOT */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-
-/* Dynamic MTD partition support */
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
-#define CONFIG_FLASH_CFI_MTD
-#define MTDIDS_DEFAULT		"nor0=TQM5200-0"
-#if defined(CONFIG_TQM5200_B)
-#define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:768k(firmware),"	\
-						"1280k(kernel),"	\
-						"2m(initrd),"		\
-						"4m(small-fs),"		\
-						"16m(big-fs),"		\
-						"8m(misc)"
-#else
-#define MTDPARTS_DEFAULT	"mtdparts=TQM5200-0:640k(firmware),"	\
-						"1408k(kernel),"	\
-						"2m(initrd),"		\
-						"4m(small-fs),"		\
-						"16m(big-fs),"		\
-						"8m(misc)"
-#endif /* CONFIG_TQM5200_B */
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x10000
-#if defined(CONFIG_TQM5200_B)
-#define CONFIG_ENV_SECT_SIZE	0x40000
-#else
-#define CONFIG_ENV_SECT_SIZE	0x20000
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-#endif /* CONFIG_TQM5200_B */
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
-#endif
-
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#if defined(CONFIG_TQM5200_B)
-#define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* Reserve 512 kB for Monitor	*/
-#else
-#define CONFIG_SYS_MONITOR_LEN		(384 << 10)	/* Reserve 384 kB for Monitor	*/
-#endif /* CONFIG_TQM5200_B */
-#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)	/* Reserve 1024 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-/*
- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
- */
-/* #define CONFIG_MPC5xxx_FEC_MII10 */
-#define CONFIG_PHY_ADDR		0x00
-
-/*
- * GPIO configuration
- *
- * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
- *	Bit 0 (mask: 0x80000000): 1
- * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
- *	00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
- *	01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
- *	      Use for REV200 STK52XX boards. Do not use with REV100 modules
- *	      (because, there I2C1 is used as I2C bus)
- * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
- * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
- *	000 -> All PSC2 pins are GIOPs
- *	001 -> CAN1/2 on PSC2 pins
- *	       Use for REV100 STK52xx boards
- * use PSC3: Bits 20:23 (mask: 0x00000300):
- *      0001 -> USB2
- *      0000 -> GPIO
- * use PSC6:
- *   on STK52xx:
- *	use as UART. Pins PSC6_0 to PSC6_3 are used.
- *	Bits 9:11 (mask: 0x00700000):
- *	   101 -> PSC6 : Extended POST test is not available
- *   on MINI-FAP and TQM5200_IB:
- *	use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
- *	   000 -> PSC6 could not be used as UART, CODEC or IrDA
- *   GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
- *   tests.
- */
-#define CONFIG_SYS_GPS_PORT_CONFIG	0x81500114
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_M41T11	1
-#define CONFIG_SYS_I2C_RTC_ADDR	0x68
-#define CONFIG_SYS_M41T11_BASE_YEAR	1900    /* because Linux uses the same base
-					   year */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#define CONFIG_CMDLINE_EDITING	1	/* add command line history */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
-#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
-#define CONFIG_SYS_BOOTCS_CFG		0x0008DF30 /* for pci_clk  = 66 MHz */
-#else
-#define CONFIG_SYS_BOOTCS_CFG		0x0004DF30 /* for pci_clk = 33 MHz */
-#endif
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
-
-#define CONFIG_LAST_STAGE_INIT
-
-/*
- * SRAM - Do not map below 2 GB in address space, because this area is used
- * for SDRAM autosizing.
- */
-#define CONFIG_SYS_CS2_START		0xE5000000
-#define CONFIG_SYS_CS2_SIZE		0x100000	/* 1 MByte */
-#define CONFIG_SYS_CS2_CFG		0x0004D930
-
-/*
- * Grafic controller - Do not map below 2 GB in address space, because this
- * area is used for SDRAM autosizing.
- */
-#define SM501_FB_BASE		0xE0000000
-#define CONFIG_SYS_CS1_START		(SM501_FB_BASE)
-#define CONFIG_SYS_CS1_SIZE		0x4000000	/* 64 MByte */
-#define CONFIG_SYS_CS1_CFG		0x8F48FF70
-#define SM501_MMIO_BASE		CONFIG_SYS_CS1_START + 0x03E00000
-
-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333311	/* 1 dead cycle for flash and SM501 */
-
-#define CONFIG_SYS_RESET_ADDRESS	0xff000000
-
-/*-----------------------------------------------------------------------
- * USB stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_USB_CLOCK	0x0001BBBB
-#define CONFIG_USB_CONFIG	0x00001000
-
-/*-----------------------------------------------------------------------
- * IDE/ATA stuff Supports IDE harddisk
- *-----------------------------------------------------------------------
- */
-
-#undef	CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card Adapter */
-
-#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE	 not supported	*/
-#undef	CONFIG_IDE_LED			/* LED	 for ide not supported	*/
-
-#define CONFIG_IDE_RESET		/* reset for ide supported	*/
-#define CONFIG_IDE_PREINIT
-
-#define CONFIG_SYS_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CONFIG_SYS_IDE_MAXDEVICE	2	/* max. 2 drives per IDE bus	*/
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
-
-#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
-
-/* Offset for data I/O			*/
-#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0060)
-
-/* Offset for normal register accesses	*/
-#define CONFIG_SYS_ATA_REG_OFFSET	(CONFIG_SYS_ATA_DATA_OFFSET)
-
-/* Offset for alternate registers	*/
-#define CONFIG_SYS_ATA_ALT_OFFSET	(0x005C)
-
-/* Interval between registers						     */
-#define CONFIG_SYS_ATA_STRIDE		4
-
-#endif /* __CONFIG_H */
-/*
- * (C) Copyright 2003-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004-2005
- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC5200		1	/* This is an MPC5200 CPU */
-#define CONFIG_TQM5200		1	/* ... on TQM5200 module */
-#undef CONFIG_TQM5200_REV100		/*  define for revision 100 modules */
-#define CONFIG_STK52XX		1	/* ... on a STK52XX base board */
-#define CONFIG_STK52XX_REV100	1	/*  define for revision 100 baseboards */
-#define CONFIG_AEVFIFO		1
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
-
-/*
- * Valid values for CONFIG_SYS_TEXT_BASE are:
- * 0xFC000000	boot low (standard configuration with room for
- *		max 64 MByte Flash ROM)
- * 0xFFF00000	boot high (for a backup copy of U-Boot)
- * 0x00100000	boot from RAM (for testing only)
- */
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xFC000000
-#endif
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
-#define CONFIG_BAUDRATE		115200	/* ... at 115200 bps */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*
- * PCI Mapping:
- * 0x40000000 - 0x4fffffff - PCI Memory
- * 0x50000000 - 0x50ffffff - PCI IO Space
- */
-#ifdef CONFIG_AEVFIFO
-#define CONFIG_PCI		1
-#define CONFIG_PCI_PNP		1
-/* #define CONFIG_PCI_SCAN_SHOW	1 */
-#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE		1
-
-#define CONFIG_PCI_MEM_BUS	0x40000000
-#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE	0x10000000
-
-#define CONFIG_PCI_IO_BUS	0x50000000
-#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE	0x01000000
-
-#define CONFIG_EEPRO100		1
-#define CONFIG_SYS_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
-#define CONFIG_NS8382X		1
-#endif	/* CONFIG_AEVFIFO */
-
-/* Partitions */
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-
-/* POST support */
-#define CONFIG_POST		(CONFIG_SYS_POST_MEMORY   | \
-				 CONFIG_SYS_POST_CPU	   | \
-				 CONFIG_SYS_POST_I2C)
-
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#endif
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NFS
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SNTP
-
-#ifdef CONFIG_POST
-#define CONFIG_CMD_DIAG
-#endif
-
-
-#define	CONFIG_TIMESTAMP		/* display image timestamps */
-
-#if (CONFIG_SYS_TEXT_BASE == 0xFC000000)		/* Boot low */
-#   define CONFIG_SYS_LOWBOOT		1
-#endif
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"rootpath=/opt/eldk/ppc_6xx\0"					\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath} "			\
-		"console=ttyS0,${baudrate}\0"				\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_self=run ramargs addip;"					\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"flash_nfs=run nfsargs addip;"					\
-		"bootm ${kernel_addr}\0"				\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"	\
-	"bootfile=/tftpboot/tqm5200/uImage\0"				\
-	"load=tftp 200000 ${u-boot}\0"					\
-	"u-boot=/tftpboot/tqm5200/u-boot.bin\0"				\
-	"update=protect off FC000000 FC05FFFF;"				\
-		"erase FC000000 FC05FFFF;"				\
-		"cp.b 200000 FC000000 ${filesize};"			\
-		"protect on FC000000 FC05FFFF\0"			\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run net_nfs"
-
-/*
- * IPB Bus clocking configuration.
- */
-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-
-#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
-/*
- * PCI Bus clocking configuration
- *
- * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
- * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
- */
-#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/* define for 66MHz speed */
-#endif
-
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#ifdef CONFIG_TQM5200_REV100
-#define CONFIG_SYS_I2C_MODULE		1	/* Select I2C module #1 for rev. 100 board */
-#else
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #2 for all other revs */
-#endif
-
-/*
- * I2C clock frequency
- *
- * Please notice, that the resulting clock frequency could differ from the
- * configured value. This is because the I2C clock is derived from system
- * clock over a frequency divider with only a few divider values. U-boot
- * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
- * approximation allways lies below the configured value, never above.
- */
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
- * also). For other EEPROMs configuration should be verified. On Mini-FAP the
- * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
- * same configuration could be used.
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* 1010000x */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5	/* =32 Bytes per write */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
-
-/* use CFI flash driver if no module variant is spezified */
-#define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
-#define CONFIG_FLASH_CFI_DRIVER	1	/* Use the common driver */
-#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_BOOTCS_START }
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_SIZE		0x04000000 /* 64 MByte */
-#define CONFIG_SYS_MAX_FLASH_SECT	512	/* max num of sects on one chip */
-#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* not supported yet for AMD */
-
-#if !defined(CONFIG_SYS_LOWBOOT)
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
-#else	/* CONFIG_SYS_LOWBOOT */
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x00060000)
-#endif	/* CONFIG_SYS_LOWBOOT */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks
-					   (= chip selects) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
-
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x10000
-#define CONFIG_ENV_SECT_SIZE	0x20000
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define	CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-/* Use ON-Chip SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#ifdef CONFIG_POST
-/* preserve space for the post_word at end of on-chip SRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_POST_SIZE
-#else
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
-#endif
-
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(384 << 10)	/* Reserve 384 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-/*
- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
- */
-/* #define CONFIG_MPC5xxx_FEC_MII10 */
-#define CONFIG_PHY_ADDR		0x00
-
-/*
- * GPIO configuration
- *
- * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
- *	Bit 0 (mask: 0x80000000): 1
- * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
- *	00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
- *	01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
- *	      Use for REV200 STK52XX boards. Do not use with REV100 modules
- *	      (because, there I2C1 is used as I2C bus)
- * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
- * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
- *	000 -> All PSC2 pins are GIOPs
- *	001 -> CAN1/2 on PSC2 pins
- *	       Use for REV100 STK52xx boards
- * use PSC6:
- *   on STK52xx:
- *	use as UART. Pins PSC6_0 to PSC6_3 are used.
- *	Bits 9:11 (mask: 0x00700000):
- *	   101 -> PSC6 : Extended POST test is not available
- *   on MINI-FAP and TQM5200_IB:
- *	use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
- *	   000 -> PSC6 could not be used as UART, CODEC or IrDA
- *   GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
- *   tests.
- */
-#define CONFIG_SYS_GPS_PORT_CONFIG	0x81500014
-
-/*
- * RTC configuration
- */
-#define CONFIG_RTC_MPC5200	1	/* use internal MPC5200 RTC */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-/* Enable an alternate, more extensive memory test */
-#define CONFIG_SYS_ALT_MEMTEST
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/*
- * Enable loopw command.
- */
-#define CONFIG_LOOPW
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
-#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
-#define CONFIG_SYS_BOOTCS_CFG		0x0008DF30 /* for pci_clk  = 66 MHz */
-#else
-#define CONFIG_SYS_BOOTCS_CFG		0x0004DF30 /* for pci_clk = 33 MHz */
-#endif
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
-
-#define CONFIG_LAST_STAGE_INIT
-
-/*
- * SRAM - Do not map below 2 GB in address space, because this area is used
- * for SDRAM autosizing.
- */
-#define CONFIG_SYS_CS2_START		0xE5000000
-#define CONFIG_SYS_CS2_SIZE		0x80000		/* 512 kByte */
-#define CONFIG_SYS_CS2_CFG		0x0004D930
-
-/*
- * Grafic controller - Do not map below 2 GB in address space, because this
- * area is used for SDRAM autosizing.
- */
-#define SM501_FB_BASE           0xE0000000
-#define CONFIG_SYS_CS1_START           (SM501_FB_BASE)
-#define CONFIG_SYS_CS1_SIZE            0x4000000       /* 64 MByte */
-#define CONFIG_SYS_CS1_CFG             0x8F48FF70
-#define SM501_MMIO_BASE         CONFIG_SYS_CS1_START + 0x03E00000
-
-#define CONFIG_SYS_CS_BURST            0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE        0x33333311      /* 1 dead cycle for flash and SM501 */
-
-#define CONFIG_SYS_RESET_ADDRESS	0xff000000
-
-#endif /* __CONFIG_H */
...	...	@@ -65,14 +65,8 @@
65	65	config TARGET_PCM030
66	66	bool "Support pcm030"
67	67
68		-config TARGET_AEV
69		- bool "Support aev"
70		-
71	68	config TARGET_CHARON
72	69	bool "Support charon"
73		-
74		-config TARGET_TB5200
75		- bool "Support TB5200"
76	70
77	71	config TARGET_TQM5200
78	72	bool "Support TQM5200"
1		-if TARGET_AEV
2		-
3		-config SYS_BOARD
4		- default "tqm5200"
5		-
6		-config SYS_VENDOR
7		- default "tqc"
8		-
9		-config SYS_CONFIG_NAME
10		- default "aev"
11		-
12		-endif
13		-
14	1	if TARGET_CHARON
15	2
16	3	config SYS_BOARD
...	...	@@ -21,19 +8,6 @@
21	8
22	9	config SYS_CONFIG_NAME
23	10	default "charon"
24		-
25		-endif
26		-
27		-if TARGET_TB5200
28		-
29		-config SYS_BOARD
30		- default "tqm5200"
31		-
32		-config SYS_VENDOR
33		- default "tqc"
34		-
35		-config SYS_CONFIG_NAME
36		- default "TB5200"
37	11
38	12	endif
39	13
...	...	@@ -9,9 +9,6 @@
9	9	F: configs/cam5200_niosflash_defconfig
10	10	F: configs/fo300_defconfig
11	11	F: configs/MiniFAP_defconfig
12		-F: include/configs/TB5200.h
13		-F: configs/TB5200_defconfig
14		-F: configs/TB5200_B_defconfig
15	12	F: configs/TQM5200_defconfig
16	13	F: configs/TQM5200_B_defconfig
17	14	F: configs/TQM5200_B_HIGHBOOT_defconfig
...	...	@@ -5,5 +5,5 @@
5	5	# SPDX-License-Identifier: GPL-2.0+
6	6	#
7	7
8		-obj-y := tqm5200.o cmd_stk52xx.o cmd_tb5200.o cam5200_flash.o
	8	+obj-y := tqm5200.o cmd_stk52xx.o cam5200_flash.o
1		-/*
2		- * (C) Copyright 2005 - 2006
3		- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
4		- *
5		- * SPDX-License-Identifier: GPL-2.0+
6		- */
7		-
8		-/*
9		- * TB5200 specific functions
10		- */
11		-/#define DEBUG/
12		-
13		-#include <common.h>
14		-#include <command.h>
15		-
16		-#if defined(CONFIG_CMD_BSP)
17		-#if defined (CONFIG_TB5200)
18		-
19		-#define SM501_PANEL_DISPLAY_CONTROL 0x00080000UL
20		-
21		-static void led_init(void)
22		-{
23		- struct mpc5xxx_gpt_0_7 gpt = (struct mpc5xxx_gpt_0_7 )MPC5XXX_GPT;
24		-
25		- /* configure timer 4 for simple GPIO output */
26		- gpt->gpt4.emsr \|= 0x00000024;
27		-}
28		-
29		-int cmd_led(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
30		-{
31		- struct mpc5xxx_gpt_0_7 gpt = (struct mpc5xxx_gpt_0_7 )MPC5XXX_GPT;
32		-
33		- led_init();
34		-
35		- if (strcmp (argv[1], "on") == 0) {
36		- debug ("switch status LED on\n");
37		- gpt->gpt4.emsr \|= (1 << 4);
38		- } else if (strcmp (argv[1], "off") == 0) {
39		- debug ("switch status LED off\n");
40		- gpt->gpt4.emsr &= ~(1 << 4);
41		- } else {
42		- printf ("Usage:\nled on/off\n");
43		- return 1;
44		- }
45		-
46		- return 0;
47		-}
48		-
49		-static void sm501_backlight (unsigned int state)
50		-{
51		- if (state == 1) {
52		- (vu_long )(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) \|=
53		- (1 << 26) \| (1 << 27);
54		- } else if (state == 0)
55		- (vu_long )(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
56		- ~((1 << 26) \| (1 << 27));
57		-}
58		-
59		-int cmd_backlight(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
60		-{
61		- if (strcmp (argv[1], "on") == 0) {
62		- debug ("switch backlight on\n");
63		- sm501_backlight (1);
64		- } else if (strcmp (argv[1], "off") == 0) {
65		- debug ("switch backlight off\n");
66		- sm501_backlight (0);
67		- } else {
68		- printf ("Usage:\nbacklight on/off\n");
69		- return 1;
70		- }
71		-
72		- return 0;
73		-}
74		-
75		-U_BOOT_CMD(
76		- led , 2, 1, cmd_led,
77		- "switch status LED on or off",
78		- "on/off"
79		-);
80		-
81		-U_BOOT_CMD(
82		- backlight , 2, 1, cmd_backlight,
83		- "switch backlight on or off",
84		- "on/off"
85		- );
86		-
87		-#endif /* CONFIG_STK52XX */
88		-#endif
...	...	@@ -258,11 +258,6 @@
258	258
259	259	int checkboard (void)
260	260	{
261		-#if defined(CONFIG_AEVFIFO)
262		- puts ("Board: AEVFIFO\n");
263		- return 0;
264		-#endif
265		-
266	261	#if defined(CONFIG_TQM5200S)
267	262	# define MODULE_NAME "TQM5200S"
268	263	#else
...	...	@@ -271,8 +266,6 @@
271	266
272	267	#if defined(CONFIG_STK52XX)
273	268	# define CARRIER_NAME "STK52xx"
274		-#elif defined(CONFIG_TB5200)
275		-# define CARRIER_NAME "TB5200"
276	269	#elif defined(CONFIG_CAM5200)
277	270	# define CARRIER_NAME "CAM5200"
278	271	#elif defined(CONFIG_FO300)
279	272
...	...	@@ -762,16 +755,13 @@
762	755	if (line_number == 1) {
763	756	strcpy (info, " Board: TQM5200 (TQ-Components GmbH)");
764	757	#if defined (CONFIG_CHARON) \|\| defined (CONFIG_FO300) \|\| \
765		- defined(CONFIG_STK52XX) \|\| defined(CONFIG_TB5200)
	758	+ defined(CONFIG_STK52XX)
766	759	} else if (line_number == 2) {
767	760	#if defined (CONFIG_CHARON)
768	761	strcpy (info, " on a CHARON carrier board");
769	762	#endif
770	763	#if defined (CONFIG_STK52XX)
771	764	strcpy (info, " on a STK52xx carrier board");
772		-#endif
773		-#if defined (CONFIG_TB5200)
774		- strcpy (info, " on a TB5200 carrier board");
775	765	#endif
776	766	#if defined (CONFIG_FO300)
777	767	strcpy (info, " on a FO300 carrier board");
1		-CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B"
2		-CONFIG_PPC=y
3		-CONFIG_MPC5xxx=y
4		-CONFIG_TARGET_TB5200=y
...	...	@@ -12,6 +12,8 @@
12	12
13	13	Board Arch CPU Commit Removed Last known maintainer/contact
14	14	=================================================================================================
	15	+aev powerpc mpc5xxx - -
	16	+TB5200 powerpc mpc5xxx - -
15	17	JSE powerpc ppc4xx - - Stephen Williams <steve@icarus.com>
16	18	BC3450 powerpc mpc5xxx - -
17	19	hawkboard arm arm926ejs cb957cda 2015-02-24 Syed Mohammed Khasim <sm.khasim@gmail.com>:Sughosh Ganu <urwithsughosh@gmail.com>
1		-/*
2		- * (C) Copyright 2003-2006
3		- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4		- *
5		- * (C) Copyright 2004-2006
6		- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7		- *
8		- * SPDX-License-Identifier: GPL-2.0+
9		- */
10		-
11		-#ifndef __CONFIG_H
12		-#define __CONFIG_H
13		-
14		-/*
15		- * High Level Configuration Options
16		- * (easy to change)
17		- */
18		-
19		-#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20		-#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21		-#define CONFIG_TB5200 1 /* ... on a TB5200 base board */
22		-
23		-/*
24		- * Valid values for CONFIG_SYS_TEXT_BASE are:
25		- * 0xFC000000 boot low (standard configuration with room for
26		- * max 64 MByte Flash ROM)
27		- * 0xFFF00000 boot high (for a backup copy of U-Boot)
28		- * 0x00100000 boot from RAM (for testing only)
29		- */
30		-#ifndef CONFIG_SYS_TEXT_BASE
31		-#define CONFIG_SYS_TEXT_BASE 0xFC000000
32		-#endif
33		-
34		-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
35		-
36		-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
37		-
38		-/*
39		- * Serial console configuration
40		- */
41		-#define CONFIG_PSC_CONSOLE 1 /* default console is on PSC1 */
42		-#define CONFIG_PSC_CONSOLE2 6 /* second console is on PSC6 */
43		-#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
44		-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
45		-
46		-/*
47		- * Video console
48		- */
49		-#if 1
50		-#define CONFIG_VIDEO
51		-#define CONFIG_VIDEO_SM501
52		-#define CONFIG_VIDEO_SM501_32BPP
53		-#define CONFIG_CFB_CONSOLE
54		-#define CONFIG_VIDEO_LOGO
55		-#define CONFIG_VGA_AS_SINGLE_DEVICE
56		-#define CONFIG_CONSOLE_EXTRA_INFO
57		-#define CONFIG_VIDEO_SW_CURSOR
58		-#define CONFIG_SPLASH_SCREEN
59		-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
60		-#endif
61		-
62		-/* Partitions */
63		-#define CONFIG_MAC_PARTITION
64		-#define CONFIG_DOS_PARTITION
65		-#define CONFIG_ISO_PARTITION
66		-
67		-/* USB */
68		-#define CONFIG_USB_OHCI
69		-#define CONFIG_USB_STORAGE
70		-
71		-/* POST support */
72		-#define CONFIG_POST (CONFIG_SYS_POST_MEMORY \| \
73		- CONFIG_SYS_POST_CPU \| \
74		- CONFIG_SYS_POST_I2C)
75		-
76		-#ifdef CONFIG_POST
77		-/* preserve space for the post_word at end of on-chip SRAM */
78		-#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
79		-#endif
80		-
81		-
82		-/*
83		- * BOOTP options
84		- */
85		-#define CONFIG_BOOTP_BOOTFILESIZE
86		-#define CONFIG_BOOTP_BOOTPATH
87		-#define CONFIG_BOOTP_GATEWAY
88		-#define CONFIG_BOOTP_HOSTNAME
89		-
90		-
91		-/*
92		- * Command line configuration.
93		- */
94		-#include <config_cmd_default.h>
95		-
96		-#define CONFIG_CMD_ASKENV
97		-#define CONFIG_CMD_DATE
98		-#define CONFIG_CMD_DHCP
99		-#define CONFIG_CMD_ECHO
100		-#define CONFIG_CMD_EEPROM
101		-#define CONFIG_CMD_EXT2
102		-#define CONFIG_CMD_FAT
103		-#define CONFIG_CMD_I2C
104		-#define CONFIG_CMD_IDE
105		-#define CONFIG_CMD_JFFS2
106		-#define CONFIG_CMD_MII
107		-#define CONFIG_CMD_NFS
108		-#define CONFIG_CMD_PING
109		-#define CONFIG_CMD_REGINFO
110		-#define CONFIG_CMD_SNTP
111		-#define CONFIG_CMD_BSP
112		-#define CONFIG_CMD_USB
113		-
114		-#ifdef CONFIG_VIDEO
115		-#define CONFIG_CMD_BMP
116		-#endif
117		-
118		-#ifdef CONFIG_POST
119		-#define CONFIG_CMD_DIAG
120		-#endif
121		-
122		-
123		-#define CONFIG_TIMESTAMP /* display image timestamps */
124		-
125		-#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
126		-# define CONFIG_SYS_LOWBOOT 1
127		-#endif
128		-
129		-/*
130		- * Autobooting
131		- */
132		-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
133		-
134		-#define CONFIG_PREBOOT "echo;" \
135		- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
136		- "echo"
137		-
138		-#undef CONFIG_BOOTARGS
139		-
140		-#if defined(CONFIG_TQM5200_B)
141		-#define CONFIG_EXTRA_ENV_SETTINGS \
142		- "netdev=eth0\0" \
143		- "rootpath=/opt/eldk/ppc_6xx\0" \
144		- "ramargs=setenv bootargs root=/dev/ram rw\0" \
145		- "nfsargs=setenv bootargs root=/dev/nfs rw " \
146		- "nfsroot=${serverip}:${rootpath}\0" \
147		- "addip=setenv bootargs ${bootargs} " \
148		- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
149		- ":${hostname}:${netdev}:off panic=1\0" \
150		- "flash_self=run ramargs addip;" \
151		- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
152		- "flash_nfs=run nfsargs addip;" \
153		- "bootm ${kernel_addr}\0" \
154		- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
155		- "bootfile=/tftpboot/tqm5200/uImage\0" \
156		- "load=tftp 200000 ${u-boot}\0" \
157		- "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
158		- "update=protect off FC000000 FC07FFFF;" \
159		- "erase FC000000 FC07FFFF;" \
160		- "cp.b 200000 FC000000 ${filesize};" \
161		- "protect on FC000000 FC07FFFF\0" \
162		- ""
163		-#else
164		-#define CONFIG_EXTRA_ENV_SETTINGS \
165		- "netdev=eth0\0" \
166		- "rootpath=/opt/eldk/ppc_6xx\0" \
167		- "ramargs=setenv bootargs root=/dev/ram rw\0" \
168		- "nfsargs=setenv bootargs root=/dev/nfs rw " \
169		- "nfsroot=${serverip}:${rootpath}\0" \
170		- "addip=setenv bootargs ${bootargs} " \
171		- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
172		- ":${hostname}:${netdev}:off panic=1\0" \
173		- "flash_self=run ramargs addip;" \
174		- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
175		- "flash_nfs=run nfsargs addip;" \
176		- "bootm ${kernel_addr}\0" \
177		- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
178		- "bootfile=/tftpboot/tqm5200/uImage\0" \
179		- "load=tftp 200000 $(u-boot)\0" \
180		- "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
181		- "update=protect off FC000000 FC05FFFF;" \
182		- "erase FC000000 FC05FFFF;" \
183		- "cp.b 200000 FC000000 ${filesize};" \
184		- "protect on FC000000 FC05FFFF\0" \
185		- ""
186		-#endif /* CONFIG_TQM5200_B */
187		-
188		-#define CONFIG_BOOTCOMMAND "run net_nfs"
189		-
190		-/*
191		- * IPB Bus clocking configuration.
192		- */
193		-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
194		-
195		-#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
196		-/*
197		- * PCI Bus clocking configuration
198		- *
199		- * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
200		- * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
201		- * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
202		- */
203		-#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
204		-#endif
205		-
206		-/*
207		- * I2C configuration
208		- */
209		-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
210		-#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
211		-
212		-/*
213		- * I2C clock frequency
214		- *
215		- * Please notice, that the resulting clock frequency could differ from the
216		- * configured value. This is because the I2C clock is derived from system
217		- * clock over a frequency divider with only a few divider values. U-boot
218		- * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
219		- * approximation allways lies below the configured value, never above.
220		- */
221		-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
222		-#define CONFIG_SYS_I2C_SLAVE 0x7F
223		-
224		-/*
225		- * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
226		- * also). For other EEPROMs configuration should be verified. On Mini-FAP the
227		- * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
228		- * same configuration could be used.
229		- */
230		-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
231		-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
232		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
233		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
234		-
235		-/* List of I2C addresses to be verified by POST */
236		-#undef CONFIG_SYS_POST_I2C_ADDRS
237		-#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
238		- CONFIG_SYS_I2C_RTC_ADDR, \
239		- CONFIG_SYS_I2C_SLAVE}
240		-
241		-/*
242		- * Flash configuration
243		- */
244		-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
245		-
246		-/* use CFI flash driver */
247		-#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
248		-#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
249		-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
250		-#define CONFIG_SYS_FLASH_EMPTY_INFO
251		-#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
252		-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
253		-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
254		-
255		-#if !defined(CONFIG_SYS_LOWBOOT)
256		-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
257		-#else /* CONFIG_SYS_LOWBOOT */
258		-#if defined(CONFIG_TQM5200_B)
259		-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
260		-#else
261		-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
262		-#endif /* CONFIG_TQM5200_B */
263		-#endif /* CONFIG_SYS_LOWBOOT */
264		-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
265		- (= chip selects) */
266		-
267		-/* Dynamic MTD partition support */
268		-#define CONFIG_CMD_MTDPARTS
269		-#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
270		-#define CONFIG_FLASH_CFI_MTD
271		-#define MTDIDS_DEFAULT "nor0=TQM5200-0"
272		-#if defined(CONFIG_TQM5200_B)
273		-#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
274		- "1280k(kernel)," \
275		- "2m(initrd)," \
276		- "4m(small-fs)," \
277		- "16m(big-fs)," \
278		- "8m(misc)"
279		-#else
280		-#define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
281		- "1408k(kernel)," \
282		- "2m(initrd)," \
283		- "4m(small-fs)," \
284		- "16m(big-fs)," \
285		- "8m(misc)"
286		-#endif /* CONFIG_TQM5200_B */
287		-
288		-/*
289		- * Environment settings
290		- */
291		-#define CONFIG_ENV_IS_IN_FLASH 1
292		-#define CONFIG_ENV_SIZE 0x10000
293		-#if defined(CONFIG_TQM5200_B)
294		-#define CONFIG_ENV_SECT_SIZE 0x40000
295		-#else
296		-#define CONFIG_ENV_SECT_SIZE 0x20000
297		-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
298		-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
299		-#endif /* CONFIG_TQM5200_B */
300		-
301		-/*
302		- * Memory map
303		- */
304		-#define CONFIG_SYS_MBAR 0xF0000000
305		-#define CONFIG_SYS_SDRAM_BASE 0x00000000
306		-#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
307		-
308		-/* Use ON-Chip SRAM until RAM will be available */
309		-#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
310		-#ifdef CONFIG_POST
311		-/* preserve space for the post_word at end of on-chip SRAM */
312		-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
313		-#else
314		-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
315		-#endif
316		-
317		-
318		-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
319		-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
320		-
321		-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
322		-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
323		-# define CONFIG_SYS_RAMBOOT 1
324		-#endif
325		-
326		-#if defined(CONFIG_TQM5200_B)
327		-#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
328		-#else
329		-#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
330		-#endif /* CONFIG_TQM5200_B */
331		-#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
332		-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
333		-
334		-/*
335		- * Ethernet configuration
336		- */
337		-#define CONFIG_MPC5xxx_FEC 1
338		-#define CONFIG_MPC5xxx_FEC_MII100
339		-/*
340		- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
341		- */
342		-/* #define CONFIG_MPC5xxx_FEC_MII10 */
343		-#define CONFIG_PHY_ADDR 0x00
344		-
345		-/*
346		- * GPIO configuration
347		- *
348		- * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
349		- * Bit 0 (mask: 0x80000000): 1
350		- * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
351		- * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
352		- * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
353		- * Use for REV200 STK52XX boards. Do not use with REV100 modules
354		- * (because, there I2C1 is used as I2C bus)
355		- * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
356		- * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
357		- * 000 -> All PSC2 pins are GIOPs
358		- * 001 -> CAN1/2 on PSC2 pins
359		- * Use for REV100 STK52xx boards
360		- * use PSC3: Bits 20:23 (mask: 0x00000300):
361		- * 0001 -> USB2
362		- * 0000 -> GPIO
363		- * use PSC6:
364		- * on STK52xx:
365		- * use as UART. Pins PSC6_0 to PSC6_3 are used.
366		- * Bits 9:11 (mask: 0x00700000):
367		- * 101 -> PSC6 : Extended POST test is not available
368		- * on MINI-FAP and TQM5200_IB:
369		- * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
370		- * 000 -> PSC6 could not be used as UART, CODEC or IrDA
371		- * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
372		- * tests.
373		- */
374		-#define CONFIG_SYS_GPS_PORT_CONFIG 0x81500114
375		-
376		-/*
377		- * RTC configuration
378		- */
379		-#define CONFIG_RTC_M41T11 1
380		-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
381		-#define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
382		- year */
383		-
384		-/*
385		- * Miscellaneous configurable options
386		- */
387		-#define CONFIG_SYS_LONGHELP /* undef to save memory */
388		-#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
389		-#if defined(CONFIG_CMD_KGDB)
390		-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
391		-#else
392		-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
393		-#endif
394		-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
395		-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
396		-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
397		-
398		-#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
399		-#if defined(CONFIG_CMD_KGDB)
400		-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
401		-#endif
402		-
403		-/* Enable an alternate, more extensive memory test */
404		-#define CONFIG_SYS_ALT_MEMTEST
405		-
406		-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
407		-#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
408		-
409		-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
410		-
411		-/*
412		- * Enable loopw command.
413		- */
414		-#define CONFIG_LOOPW
415		-
416		-/*
417		- * Various low-level settings
418		- */
419		-#define CONFIG_SYS_HID0_INIT HID0_ICE \| HID0_ICFI
420		-#define CONFIG_SYS_HID0_FINAL HID0_ICE
421		-
422		-#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
423		-#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
424		-#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
425		-#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
426		-#else
427		-#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
428		-#endif
429		-#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
430		-#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
431		-
432		-#define CONFIG_LAST_STAGE_INIT
433		-
434		-/*
435		- * SRAM - Do not map below 2 GB in address space, because this area is used
436		- * for SDRAM autosizing.
437		- */
438		-#define CONFIG_SYS_CS2_START 0xE5000000
439		-#define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
440		-#define CONFIG_SYS_CS2_CFG 0x0004D930
441		-
442		-/*
443		- * Grafic controller - Do not map below 2 GB in address space, because this
444		- * area is used for SDRAM autosizing.
445		- */
446		-#define SM501_FB_BASE 0xE0000000
447		-#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
448		-#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
449		-#define CONFIG_SYS_CS1_CFG 0x8F48FF70
450		-#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
451		-
452		-#define CONFIG_SYS_CS_BURST 0x00000000
453		-#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
454		-
455		-#define CONFIG_SYS_RESET_ADDRESS 0xff000000
456		-
457		-/*-----------------------------------------------------------------------
458		- * USB stuff
459		- *-----------------------------------------------------------------------
460		- */
461		-#define CONFIG_USB_CLOCK 0x0001BBBB
462		-#define CONFIG_USB_CONFIG 0x00001000
463		-
464		-/*-----------------------------------------------------------------------
465		- * IDE/ATA stuff Supports IDE harddisk
466		- *-----------------------------------------------------------------------
467		- */
468		-
469		-#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
470		-
471		-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
472		-#undef CONFIG_IDE_LED /* LED for ide not supported */
473		-
474		-#define CONFIG_IDE_RESET /* reset for ide supported */
475		-#define CONFIG_IDE_PREINIT
476		-
477		-#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
478		-#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
479		-
480		-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
481		-
482		-#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
483		-
484		-/* Offset for data I/O */
485		-#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
486		-
487		-/* Offset for normal register accesses */
488		-#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
489		-
490		-/* Offset for alternate registers */
491		-#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
492		-
493		-/* Interval between registers */
494		-#define CONFIG_SYS_ATA_STRIDE 4
495		-
496		-#endif /* __CONFIG_H */
1		-/*
2		- * (C) Copyright 2003-2006
3		- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4		- *
5		- * (C) Copyright 2004-2005
6		- * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7		- *
8		- * SPDX-License-Identifier: GPL-2.0+
9		- */
10		-
11		-#ifndef __CONFIG_H
12		-#define __CONFIG_H
13		-
14		-/*
15		- * High Level Configuration Options
16		- * (easy to change)
17		- */
18		-
19		-#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20		-#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21		-#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
22		-#define CONFIG_STK52XX 1 /* ... on a STK52XX base board */
23		-#define CONFIG_STK52XX_REV100 1 /* define for revision 100 baseboards */
24		-#define CONFIG_AEVFIFO 1
25		-#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
26		-
27		-/*
28		- * Valid values for CONFIG_SYS_TEXT_BASE are:
29		- * 0xFC000000 boot low (standard configuration with room for
30		- * max 64 MByte Flash ROM)
31		- * 0xFFF00000 boot high (for a backup copy of U-Boot)
32		- * 0x00100000 boot from RAM (for testing only)
33		- */
34		-#ifndef CONFIG_SYS_TEXT_BASE
35		-#define CONFIG_SYS_TEXT_BASE 0xFC000000
36		-#endif
37		-
38		-#define CONFIG_HIGH_BATS 1 /* High BATs supported */
39		-
40		-/*
41		- * Serial console configuration
42		- */
43		-#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
44		-#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
45		-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
46		-
47		-/*
48		- * PCI Mapping:
49		- * 0x40000000 - 0x4fffffff - PCI Memory
50		- * 0x50000000 - 0x50ffffff - PCI IO Space
51		- */
52		-#ifdef CONFIG_AEVFIFO
53		-#define CONFIG_PCI 1
54		-#define CONFIG_PCI_PNP 1
55		-/* #define CONFIG_PCI_SCAN_SHOW 1 */
56		-#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
57		-
58		-#define CONFIG_PCI_MEM_BUS 0x40000000
59		-#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
60		-#define CONFIG_PCI_MEM_SIZE 0x10000000
61		-
62		-#define CONFIG_PCI_IO_BUS 0x50000000
63		-#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
64		-#define CONFIG_PCI_IO_SIZE 0x01000000
65		-
66		-#define CONFIG_EEPRO100 1
67		-#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
68		-#define CONFIG_NS8382X 1
69		-#endif /* CONFIG_AEVFIFO */
70		-
71		-/* Partitions */
72		-#define CONFIG_MAC_PARTITION
73		-#define CONFIG_DOS_PARTITION
74		-#define CONFIG_ISO_PARTITION
75		-
76		-/* POST support */
77		-#define CONFIG_POST (CONFIG_SYS_POST_MEMORY \| \
78		- CONFIG_SYS_POST_CPU \| \
79		- CONFIG_SYS_POST_I2C)
80		-
81		-#ifdef CONFIG_POST
82		-/* preserve space for the post_word at end of on-chip SRAM */
83		-#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
84		-#endif
85		-
86		-
87		-/*
88		- * BOOTP options
89		- */
90		-#define CONFIG_BOOTP_BOOTFILESIZE
91		-#define CONFIG_BOOTP_BOOTPATH
92		-#define CONFIG_BOOTP_GATEWAY
93		-#define CONFIG_BOOTP_HOSTNAME
94		-
95		-
96		-/*
97		- * Command line configuration.
98		- */
99		-#include <config_cmd_default.h>
100		-
101		-#define CONFIG_CMD_ASKENV
102		-#define CONFIG_CMD_DATE
103		-#define CONFIG_CMD_DHCP
104		-#define CONFIG_CMD_ECHO
105		-#define CONFIG_CMD_EEPROM
106		-#define CONFIG_CMD_I2C
107		-#define CONFIG_CMD_MII
108		-#define CONFIG_CMD_NFS
109		-#define CONFIG_CMD_PCI
110		-#define CONFIG_CMD_PING
111		-#define CONFIG_CMD_REGINFO
112		-#define CONFIG_CMD_SNTP
113		-
114		-#ifdef CONFIG_POST
115		-#define CONFIG_CMD_DIAG
116		-#endif
117		-
118		-
119		-#define CONFIG_TIMESTAMP /* display image timestamps */
120		-
121		-#if (CONFIG_SYS_TEXT_BASE == 0xFC000000) /* Boot low */
122		-# define CONFIG_SYS_LOWBOOT 1
123		-#endif
124		-
125		-/*
126		- * Autobooting
127		- */
128		-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
129		-
130		-#define CONFIG_PREBOOT "echo;" \
131		- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
132		- "echo"
133		-
134		-#undef CONFIG_BOOTARGS
135		-
136		-#define CONFIG_EXTRA_ENV_SETTINGS \
137		- "netdev=eth0\0" \
138		- "rootpath=/opt/eldk/ppc_6xx\0" \
139		- "ramargs=setenv bootargs root=/dev/ram rw\0" \
140		- "nfsargs=setenv bootargs root=/dev/nfs rw " \
141		- "nfsroot=${serverip}:${rootpath} " \
142		- "console=ttyS0,${baudrate}\0" \
143		- "addip=setenv bootargs ${bootargs} " \
144		- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
145		- ":${hostname}:${netdev}:off panic=1\0" \
146		- "flash_self=run ramargs addip;" \
147		- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
148		- "flash_nfs=run nfsargs addip;" \
149		- "bootm ${kernel_addr}\0" \
150		- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
151		- "bootfile=/tftpboot/tqm5200/uImage\0" \
152		- "load=tftp 200000 ${u-boot}\0" \
153		- "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
154		- "update=protect off FC000000 FC05FFFF;" \
155		- "erase FC000000 FC05FFFF;" \
156		- "cp.b 200000 FC000000 ${filesize};" \
157		- "protect on FC000000 FC05FFFF\0" \
158		- ""
159		-
160		-#define CONFIG_BOOTCOMMAND "run net_nfs"
161		-
162		-/*
163		- * IPB Bus clocking configuration.
164		- */
165		-#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
166		-
167		-#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
168		-/*
169		- * PCI Bus clocking configuration
170		- *
171		- * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
172		- * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
173		- * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
174		- */
175		-#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
176		-#endif
177		-
178		-/*
179		- * I2C configuration
180		- */
181		-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
182		-#ifdef CONFIG_TQM5200_REV100
183		-#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
184		-#else
185		-#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
186		-#endif
187		-
188		-/*
189		- * I2C clock frequency
190		- *
191		- * Please notice, that the resulting clock frequency could differ from the
192		- * configured value. This is because the I2C clock is derived from system
193		- * clock over a frequency divider with only a few divider values. U-boot
194		- * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
195		- * approximation allways lies below the configured value, never above.
196		- */
197		-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
198		-#define CONFIG_SYS_I2C_SLAVE 0x7F
199		-
200		-/*
201		- * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
202		- * also). For other EEPROMs configuration should be verified. On Mini-FAP the
203		- * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
204		- * same configuration could be used.
205		- */
206		-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
207		-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
208		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
209		-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
210		-
211		-/*
212		- * Flash configuration
213		- */
214		-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
215		-
216		-/* use CFI flash driver if no module variant is spezified */
217		-#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
218		-#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
219		-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
220		-#define CONFIG_SYS_FLASH_EMPTY_INFO
221		-#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
222		-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
223		-#undef CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */
224		-
225		-#if !defined(CONFIG_SYS_LOWBOOT)
226		-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00760000 + 0x00800000)
227		-#else /* CONFIG_SYS_LOWBOOT */
228		-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
229		-#endif /* CONFIG_SYS_LOWBOOT */
230		-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
231		- (= chip selects) */
232		-#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
233		-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
234		-
235		-
236		-/*
237		- * Environment settings
238		- */
239		-#define CONFIG_ENV_IS_IN_FLASH 1
240		-#define CONFIG_ENV_SIZE 0x10000
241		-#define CONFIG_ENV_SECT_SIZE 0x20000
242		-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
243		-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
244		-
245		-/*
246		- * Memory map
247		- */
248		-#define CONFIG_SYS_MBAR 0xF0000000
249		-#define CONFIG_SYS_SDRAM_BASE 0x00000000
250		-#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
251		-
252		-/* Use ON-Chip SRAM until RAM will be available */
253		-#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
254		-#ifdef CONFIG_POST
255		-/* preserve space for the post_word at end of on-chip SRAM */
256		-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
257		-#else
258		-#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
259		-#endif
260		-
261		-
262		-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
263		-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
264		-
265		-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
266		-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
267		-# define CONFIG_SYS_RAMBOOT 1
268		-#endif
269		-
270		-#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
271		-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
272		-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
273		-
274		-/*
275		- * Ethernet configuration
276		- */
277		-#define CONFIG_MPC5xxx_FEC 1
278		-#define CONFIG_MPC5xxx_FEC_MII100
279		-/*
280		- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
281		- */
282		-/* #define CONFIG_MPC5xxx_FEC_MII10 */
283		-#define CONFIG_PHY_ADDR 0x00
284		-
285		-/*
286		- * GPIO configuration
287		- *
288		- * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
289		- * Bit 0 (mask: 0x80000000): 1
290		- * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
291		- * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
292		- * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
293		- * Use for REV200 STK52XX boards. Do not use with REV100 modules
294		- * (because, there I2C1 is used as I2C bus)
295		- * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
296		- * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
297		- * 000 -> All PSC2 pins are GIOPs
298		- * 001 -> CAN1/2 on PSC2 pins
299		- * Use for REV100 STK52xx boards
300		- * use PSC6:
301		- * on STK52xx:
302		- * use as UART. Pins PSC6_0 to PSC6_3 are used.
303		- * Bits 9:11 (mask: 0x00700000):
304		- * 101 -> PSC6 : Extended POST test is not available
305		- * on MINI-FAP and TQM5200_IB:
306		- * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
307		- * 000 -> PSC6 could not be used as UART, CODEC or IrDA
308		- * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
309		- * tests.
310		- */
311		-#define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
312		-
313		-/*
314		- * RTC configuration
315		- */
316		-#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
317		-
318		-/*
319		- * Miscellaneous configurable options
320		- */
321		-#define CONFIG_SYS_LONGHELP /* undef to save memory */
322		-#if defined(CONFIG_CMD_KGDB)
323		-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
324		-#else
325		-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
326		-#endif
327		-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
328		-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
329		-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
330		-
331		-/* Enable an alternate, more extensive memory test */
332		-#define CONFIG_SYS_ALT_MEMTEST
333		-
334		-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
335		-#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
336		-
337		-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
338		-
339		-#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
340		-#if defined(CONFIG_CMD_KGDB)
341		-# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
342		-#endif
343		-
344		-/*
345		- * Enable loopw command.
346		- */
347		-#define CONFIG_LOOPW
348		-
349		-/*
350		- * Various low-level settings
351		- */
352		-#define CONFIG_SYS_HID0_INIT HID0_ICE \| HID0_ICFI
353		-#define CONFIG_SYS_HID0_FINAL HID0_ICE
354		-
355		-#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
356		-#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
357		-#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
358		-#define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
359		-#else
360		-#define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
361		-#endif
362		-#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
363		-#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
364		-
365		-#define CONFIG_LAST_STAGE_INIT
366		-
367		-/*
368		- * SRAM - Do not map below 2 GB in address space, because this area is used
369		- * for SDRAM autosizing.
370		- */
371		-#define CONFIG_SYS_CS2_START 0xE5000000
372		-#define CONFIG_SYS_CS2_SIZE 0x80000 /* 512 kByte */
373		-#define CONFIG_SYS_CS2_CFG 0x0004D930
374		-
375		-/*
376		- * Grafic controller - Do not map below 2 GB in address space, because this
377		- * area is used for SDRAM autosizing.
378		- */
379		-#define SM501_FB_BASE 0xE0000000
380		-#define CONFIG_SYS_CS1_START (SM501_FB_BASE)
381		-#define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
382		-#define CONFIG_SYS_CS1_CFG 0x8F48FF70
383		-#define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
384		-
385		-#define CONFIG_SYS_CS_BURST 0x00000000
386		-#define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
387		-
388		-#define CONFIG_SYS_RESET_ADDRESS 0xff000000
389		-
390		-#endif /* __CONFIG_H */