MLK-12791 mx6qpsabresd: Change ENET TXCLK clock from PLL

In u-boot, i.MX6QP sabresd board uses 125Mhz ref clock from PHY, While kernel uses the clock from internal PLL by setting GPR5 bit 9. When doing warm reset in kernel, the GPR regigster is not reset, so the clock source still is the PLL. This causes ENET in u-boot can't work. In this patch, we change the u-boot to use internal PLL to align with kernel for i.MX6QP. This also fixes the ENET issue after kernel warm reset. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7f00c72e17e4e440df62aa4945a619fdbc9cfd8f)

MLK-12791 mx6qpsabresd: Change ENET TXCLK clock from PLL
In u-boot, i.MX6QP sabresd board uses 125Mhz ref clock from PHY, While kernel uses the clock from internal PLL by setting GPR5 bit 9. When doing warm reset in kernel, the GPR regigster is not reset, so the clock source still is the PLL. This causes ENET in u-boot can't work. In this patch, we change the u-boot to use internal PLL to align with kernel for i.MX6QP. This also fixes the ENET issue after kernel warm reset. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7f00c72e17e4e440df62aa4945a619fdbc9cfd8f)
Ye Li
1 parent 2906317e68
Showing 1 changed file with 10 additions and 0 deletions Side-by-side Diff
board/freescale/mx6sabresd/mx6sabresd.c
@@ -802,6 +802,16 @@
  
 int board_eth_init(bd_t *bis)
 {
+	if (is_mx6dqp()) {
+		int ret;
+
+		/* select ENET MAC0 TX clock from PLL */
+		imx_iomux_set_gpr_register(5, 9, 1, 1);
+		ret = enable_fec_anatop_clock(0, ENET_125MHZ);
+		if (ret)
+		    printf("Error fec anatop clock settings!\n");
+	}
+
 	setup_iomux_enet();
  
 	return cpu_eth_init(bis);
...	...	@@ -802,6 +802,16 @@
802	802
803	803	int board_eth_init(bd_t *bis)
804	804	{
	805	+ if (is_mx6dqp()) {
	806	+ int ret;
	807	+
	808	+ /* select ENET MAC0 TX clock from PLL */
	809	+ imx_iomux_set_gpr_register(5, 9, 1, 1);
	810	+ ret = enable_fec_anatop_clock(0, ENET_125MHZ);
	811	+ if (ret)
	812	+ printf("Error fec anatop clock settings!\n");
	813	+ }
	814	+
805	815	setup_iomux_enet();
806	816
807	817	return cpu_eth_init(bis);