Eric Lee / smarc-uboot

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Commit 498d1a62db4374c9d6223771bcbe8ae612a0f59f

Authored by Pavel Machek
Committed by Marek Vasut
1 parent 036ba54f5b
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

arm: socfpga: mmc: Pick the clock from clock manager 

Make the SoCFPGA MMC stub pick clock via the clock manager
frequency accessors instead of hard-coding the frequency.

Also fix calloc() misuse.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>

Showing 1 changed file with 11 additions and 4 deletions Side-by-side Diff

drivers/mmc/socfpga_dw_mmc.c
Diff comments   View file @ 498d1a6
... ... @@ -7,6 +7,7 @@
7 7 #include <common.h>
8 8 #include <malloc.h>
9 9 #include <dwmmc.h>
  10 +#include <errno.h>
10 11 #include <asm/arch/dwmmc.h>
11 12 #include <asm/arch/clock_manager.h>
12 13 #include <asm/arch/system_manager.h>
13 14  
14 15  
15 16  
... ... @@ -44,12 +45,18 @@
44 45 int socfpga_dwmmc_init(u32 regbase, int bus_width, int index)
45 46 {
46 47 struct dwmci_host *host;
  48 + unsigned long clk = cm_get_mmc_controller_clk_hz();
47 49  
  50 + if (clk == 0) {
  51 + printf("%s: MMC clock is zero!", __func__);
  52 + return -EINVAL;
  53 + }
  54 +
48 55 /* calloc for zero init */
49   - host = calloc(sizeof(struct dwmci_host), 1);
  56 + host = calloc(1, sizeof(struct dwmci_host));
50 57 if (!host) {
51   - printf("dwmci_host calloc fail!\n");
52   - return -1;
  58 + printf("%s: calloc() failed!\n", __func__);
  59 + return -ENOMEM;
53 60 }
54 61  
55 62 host->name = "SOCFPGA DWMMC";
... ... @@ -58,7 +65,7 @@
58 65 host->clksel = socfpga_dwmci_clksel;
59 66 host->dev_index = index;
60 67 /* fixed clock divide by 4 which due to the SDMMC wrapper */
61   - host->bus_hz = CONFIG_SOCFPGA_DWMMC_BUS_HZ;
  68 + host->bus_hz = clk;
62 69 host->fifoth_val = MSIZE(0x2) |
63 70 RX_WMARK(CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH / 2 - 1) |
64 71 TX_WMARK(CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH / 2);