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Commit 529d767f626d002fe459b51bdf2c7b9c6c860975

Authored by Vignesh R
Committed by Lokesh Vutla
1 parent 5205a82eb3
Exists in v2016.05-smarct4x and in 3 other branches v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc

ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz 

According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.

Signed-off-by: Vignesh R <vigneshr@ti.com>

Showing 2 changed files with 4 additions and 8 deletions Side-by-side Diff

arch/arm/dts/dra7-evm.dts
Diff comments   View file @ 529d767
... ... @@ -677,15 +677,13 @@
677 677 pinctrl-names = "default";
678 678 pinctrl-0 = <&qspi1_pins>;
679 679  
680   - spi-max-frequency = <48000000>;
  680 + spi-max-frequency = <64000000>;
681 681 m25p80@0 {
682 682 compatible = "s25fl256s1","spi-flash";
683   - spi-max-frequency = <48000000>;
  683 + spi-max-frequency = <64000000>;
684 684 reg = <0>;
685 685 spi-tx-bus-width = <1>;
686 686 spi-rx-bus-width = <4>;
687   - spi-cpol;
688   - spi-cpha;
689 687 #address-cells = <1>;
690 688 #size-cells = <1>;
691 689  
arch/arm/dts/dra72-evm-common.dtsi
Diff comments   View file @ 529d767
... ... @@ -510,15 +510,13 @@
510 510 &qspi {
511 511 status = "okay";
512 512  
513   - spi-max-frequency = <48000000>;
  513 + spi-max-frequency = <64000000>;
514 514 m25p80@0 {
515 515 compatible = "s25fl256s1";
516   - spi-max-frequency = <48000000>;
  516 + spi-max-frequency = <64000000>;
517 517 reg = <0>;
518 518 spi-tx-bus-width = <1>;
519 519 spi-rx-bus-width = <4>;
520   - spi-cpol;
521   - spi-cpha;
522 520 #address-cells = <1>;
523 521 #size-cells = <1>;
524 522