Add pixis_set_sgmii command

The 8544DS and 8572DS platforms support an optional SGMII riser card to expose ethernet over an SGMII interface. Once the card is in, it is also necessary to configure the board such that it uses the card, rather than the on-board ethernet ports. This can either be done by flipping dip switches on the motherboard, or by modifying registers in the pixis. Either way requires a reboot. This adds a command to allow users to choose which ports are routed through the SGMII card, and which through the onboard ports. It also allows users to revert to the current switch settings. This code does not work on the 8572, as the PIXIS is different. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Add pixis_set_sgmii command
The 8544DS and 8572DS platforms support an optional SGMII riser card to expose ethernet over an SGMII interface. Once the card is in, it is also necessary to configure the board such that it uses the card, rather than the on-board ethernet ports. This can either be done by flipping dip switches on the motherboard, or by modifying registers in the pixis. Either way requires a reboot. This adds a command to allow users to choose which ports are routed through the SGMII card, and which through the onboard ports. It also allows users to revert to the current switch settings. This code does not work on the 8572, as the PIXIS is different. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Andy Fleming · Ben Warren
1 parent 216f2a7156
Showing 2 changed files with 60 additions and 0 deletions Side-by-side Diff
board/freescale/common/pixis.c
include/configs/MPC8544DS.h
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <watchdog.h>
 #include <asm/cache.h>
+#include <asm/io.h>
  
 #include "pixis.h"
  
@@ -281,6 +282,60 @@
 	   diswd, 1, 0, pixis_disable_watchdog_cmd,
 	   "diswd	- Disable watchdog timer \n",
 	   NULL);
+
+#ifdef CONFIG_FSL_SGMII_RISER
+int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int which_tsec = -1;
+	uchar mask;
+	uchar switch_mask;
+
+	if (argc > 2)
+		if (strcmp(argv[1], "all") != 0)
+			which_tsec = simple_strtoul(argv[1], NULL, 0);
+
+	switch (which_tsec) {
+	case 1:
+		mask = PIXIS_VSPEED2_TSEC1SER;
+		switch_mask = PIXIS_VCFGEN1_TSEC1SER;
+		break;
+	case 3:
+		mask = PIXIS_VSPEED2_TSEC3SER;
+		switch_mask = PIXIS_VCFGEN1_TSEC3SER;
+		break;
+	default:
+		mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER;
+		switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER;
+		break;
+	}
+
+	/* Toggle whether the switches or FPGA control the settings */
+	if (!strcmp(argv[argc - 1], "switch"))
+		clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
+			switch_mask);
+	else
+		setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
+			switch_mask);
+
+	/* If it's not the switches, enable or disable SGMII, as specified */
+	if (!strcmp(argv[argc - 1], "on"))
+		clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
+	else if (!strcmp(argv[argc - 1], "off"))
+		setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+		pixis_set_sgmii, CFG_MAXARGS, 1, pixis_set_sgmii,
+		"pixis_set_sgmii"
+		" - Enable or disable SGMII mode for a given TSEC \n",
+		"\npixis_set_sgmii [TSEC num] <on|off|switch>\n"
+		"    TSEC num: 1,2,3,4 or 'all'.  'all' is default.\n"
+		"    on - enables SGMII\n"
+		"    off - disables SGMII\n"
+		"    switch - use switch settings\n");
+#endif
  
 /*
  * This function takes the non-integral cpu:mpx pll ratio
@@ -196,7 +196,12 @@
 #define PIXIS_VSPEED1		0x18	/* VELA VSpeed 1 */
 #define PIXIS_VCLKH		0x19	/* VELA VCLKH register */
 #define PIXIS_VCLKL		0x1A	/* VELA VCLKL register */
+#define PIXIS_VSPEED2		0x1d	/* VELA VSpeed 2 */
 #define CFG_PIXIS_VBOOT_MASK	0x40    /* Reset altbank mask*/
+#define PIXIS_VSPEED2_TSEC1SER	0x2
+#define PIXIS_VSPEED2_TSEC3SER	0x1
+#define PIXIS_VCFGEN1_TSEC1SER	0x20
+#define PIXIS_VCFGEN1_TSEC3SER	0x40
  
  
 /* define to use L1 as initial stack */
...	...	@@ -26,6 +26,7 @@
26	26	#include <command.h>
27	27	#include <watchdog.h>
28	28	#include <asm/cache.h>
	29	+#include <asm/io.h>
29	30
30	31	#include "pixis.h"
31	32
...	...	@@ -281,6 +282,60 @@
281	282	diswd, 1, 0, pixis_disable_watchdog_cmd,
282	283	"diswd - Disable watchdog timer \n",
283	284	NULL);
	285	+
	286	+#ifdef CONFIG_FSL_SGMII_RISER
	287	+int pixis_set_sgmii(cmd_tbl_t cmdtp, int flag, int argc, char argv[])
	288	+{
	289	+ int which_tsec = -1;
	290	+ uchar mask;
	291	+ uchar switch_mask;
	292	+
	293	+ if (argc > 2)
	294	+ if (strcmp(argv[1], "all") != 0)
	295	+ which_tsec = simple_strtoul(argv[1], NULL, 0);
	296	+
	297	+ switch (which_tsec) {
	298	+ case 1:
	299	+ mask = PIXIS_VSPEED2_TSEC1SER;
	300	+ switch_mask = PIXIS_VCFGEN1_TSEC1SER;
	301	+ break;
	302	+ case 3:
	303	+ mask = PIXIS_VSPEED2_TSEC3SER;
	304	+ switch_mask = PIXIS_VCFGEN1_TSEC3SER;
	305	+ break;
	306	+ default:
	307	+ mask = PIXIS_VSPEED2_TSEC1SER \| PIXIS_VSPEED2_TSEC3SER;
	308	+ switch_mask = PIXIS_VCFGEN1_TSEC1SER \| PIXIS_VCFGEN1_TSEC3SER;
	309	+ break;
	310	+ }
	311	+
	312	+ /* Toggle whether the switches or FPGA control the settings */
	313	+ if (!strcmp(argv[argc - 1], "switch"))
	314	+ clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
	315	+ switch_mask);
	316	+ else
	317	+ setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
	318	+ switch_mask);
	319	+
	320	+ /* If it's not the switches, enable or disable SGMII, as specified */
	321	+ if (!strcmp(argv[argc - 1], "on"))
	322	+ clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
	323	+ else if (!strcmp(argv[argc - 1], "off"))
	324	+ setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
	325	+
	326	+ return 0;
	327	+}
	328	+
	329	+U_BOOT_CMD(
	330	+ pixis_set_sgmii, CFG_MAXARGS, 1, pixis_set_sgmii,
	331	+ "pixis_set_sgmii"
	332	+ " - Enable or disable SGMII mode for a given TSEC \n",
	333	+ "\npixis_set_sgmii [TSEC num] <on\|off\|switch>\n"
	334	+ " TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n"
	335	+ " on - enables SGMII\n"
	336	+ " off - disables SGMII\n"
	337	+ " switch - use switch settings\n");
	338	+#endif
284	339
285	340	/*
286	341	* This function takes the non-integral cpu:mpx pll ratio
...	...	@@ -196,7 +196,12 @@
196	196	#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
197	197	#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
198	198	#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
	199	+#define PIXIS_VSPEED2 0x1d /* VELA VSpeed 2 */
199	200	#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/
	201	+#define PIXIS_VSPEED2_TSEC1SER 0x2
	202	+#define PIXIS_VSPEED2_TSEC3SER 0x1
	203	+#define PIXIS_VCFGEN1_TSEC1SER 0x20
	204	+#define PIXIS_VCFGEN1_TSEC3SER 0x40
200	205
201	206
202	207	/* define to use L1 as initial stack */