Eric Lee / smarc-uboot

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Commit 5f25a3908c85db4291518558e84b2919ce5dad63

Authored by Lokesh Vutla
2 parents 7fb5dfba06 aeaec0e682
Exists in v2016.05-smarct4x and in 3 other branches v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc

Merge branch 'master' of git://git.denx.de/u-boot into ti-u-boot-2016.05 

* 'master' of git://git.denx.de/u-boot: (31 commits)
  Prepare v2016.05
  sunxi: Enable USB host in CHIP defconfig
  test, tools: update tbot documentation
  tests: py: fix NameError exception if bdi cmd is not supported
  arm/arm64: Move barrier instructions into separate header
  arm: socfpga: Update iomux and pll for c5 socdk RevE
  warp7: Fix boot by selecting CONFIG_OF_LIBFDT
  usb: gadget: dfu: discard dead code
  dfu: avoid memory leak
  usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
  usb: hub: Don't continue on get_port_status failure
  usb: Assure Get Descriptor request is in separate microframe
  usb: Wait after sending Set Configuration request
  socfpga: fix broken build if CONFIG_ETH_DESIGNWARE disabled
  mtd: cqspi: Simplify indirect read code
  mtd: cqspi: Simplify indirect write code
  arm: socfpga: socrates: Add 'time' command
  ARM: socfpga: Disable USB OC protection on SoCrates
  usb: Don't init pointer to zero, but NULL
  usb: ehci-mx6: allow board_ehci_hcd_init to fail
  ...

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Showing 58 changed files Side-by-side Diff

... ... @@ -5,7 +5,7 @@
5 5 VERSION = 2016
6 6 PATCHLEVEL = 05
7 7 SUBLEVEL =
8   -EXTRAVERSION = -rc3
  8 +EXTRAVERSION =
9 9 NAME =
10 10  
11 11 # *DOCUMENTATION*
arch/arm/cpu/armv7/am33xx/clock.c
Diff comments   View file @ 5f25a39
... ... @@ -237,6 +237,7 @@
237 237 enable_basic_clocks();
238 238 scale_vcores();
239 239 setup_dplls();
  240 + timer_init();
240 241 }
241 242  
242 243 void rtc_only_prcm_init(void)
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
Diff comments   View file @ 5f25a39
... ... @@ -180,7 +180,7 @@
180 180  
181 181 /*
182 182 * DDR controller 0 & 1 are on memory complex 0
183   - * DDR controler 2 is on memory complext 1
  183 + * DDR controller 2 is on memory complext 1
184 184 */
185 185 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
186 186 if (ctrl_num >= 2)
arch/arm/cpu/armv8/start.S
Diff comments   View file @ 5f25a39
... ... @@ -214,7 +214,9 @@
214 214 ldr x1, =GICC_BASE
215 215 bl gic_init_secure_percpu
216 216 #endif
  217 +#endif
217 218  
  219 +#ifndef CONFIG_ARMV8_MULTIENTRY
218 220 branch_if_master x0, x1, 2f
219 221  
220 222 /*
arch/arm/dts/socfpga_cyclone5_socrates.dts
Diff comments   View file @ 5f25a39
... ... @@ -83,6 +83,7 @@
83 83 };
84 84  
85 85 &usb1 {
  86 + disable-over-current;
86 87 status = "okay";
87 88 };
arch/arm/imx-common/cache.c
Diff comments   View file @ 5f25a39
... ... @@ -43,6 +43,12 @@
43 43  
44 44  
45 45 /*
  46 + * Must disable the L2 before changing the latency parameters
  47 + * and auxiliary control register.
  48 + */
  49 + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
  50 +
  51 + /*
46 52 * Set bit 22 in the auxiliary control register. If this bit
47 53 * is cleared, PL310 treats Normal Shared Non-cacheable
48 54 * accesses as Cacheable no-allocate.
... ... @@ -58,9 +64,6 @@
58 64 writel(val, &iomux->gpr[11]);
59 65 }
60 66 #endif
61   -
62   - /* Must disable the L2 before changing the latency parameters */
63   - clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
64 67  
65 68 writel(0x132, &pl310->pl310_tag_latency_ctrl);
66 69 writel(0x132, &pl310->pl310_data_latency_ctrl);
arch/arm/include/asm/arch-tegra/gpu.h
Diff comments   View file @ 5f25a39
... ... @@ -26,7 +26,7 @@
26 26  
27 27 #else /* CONFIG_OF_LIBFDT */
28 28  
29   -static inline int tegra_gpu_enable_node(void *blob, const char *gpupath)
  29 +static inline int tegra_gpu_enable_node(void *blob, const char *compat)
30 30 {
31 31 return 0;
32 32 }
arch/arm/include/asm/armv7.h
Diff comments   View file @ 5f25a39
... ... @@ -59,26 +59,7 @@
59 59 #ifndef __ASSEMBLY__
60 60 #include <linux/types.h>
61 61 #include <asm/io.h>
62   -
63   -/*
64   - * CP15 Barrier instructions
65   - * Please note that we have separate barrier instructions in ARMv7
66   - * However, we use the CP15 based instructtions because we use
67   - * -march=armv5 in U-Boot
68   - */
69   -#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0))
70   -#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0))
71   -#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0))
72   -
73   -#ifdef __ARM_ARCH_7A__
74   -#define ISB asm volatile ("isb" : : : "memory")
75   -#define DSB asm volatile ("dsb" : : : "memory")
76   -#define DMB asm volatile ("dmb" : : : "memory")
77   -#else
78   -#define ISB CP15ISB
79   -#define DSB CP15DSB
80   -#define DMB CP15DMB
81   -#endif
  62 +#include <asm/barriers.h>
82 63  
83 64 /*
84 65 * Workaround for ARM errata # 798870
arch/arm/include/asm/barriers.h
Diff comments   View file @ 5f25a39
  1 +/*
  2 + * Copyright (C) 2016 ARM Ltd.
  3 + *
  4 + * ARM and ARM64 barrier instructions
  5 + * split from armv7.h to allow sharing between ARM and ARM64
  6 + *
  7 + * Original copyright in armv7.h was:
  8 + * (C) Copyright 2010 Texas Instruments, <www.ti.com> Aneesh V <aneesh@ti.com>
  9 + *
  10 + * Much of the original barrier code was contributed by:
  11 + * Valentine Barshak <valentine.barshak@cogentembedded.com>
  12 + *
  13 + * SPDX-License-Identifier: GPL-2.0+
  14 + */
  15 +#ifndef __BARRIERS_H__
  16 +#define __BARRIERS_H__
  17 +
  18 +#ifndef __ASSEMBLY__
  19 +
  20 +#ifndef CONFIG_ARM64
  21 +/*
  22 + * CP15 Barrier instructions
  23 + * Please note that we have separate barrier instructions in ARMv7
  24 + * However, we use the CP15 based instructtions because we use
  25 + * -march=armv5 in U-Boot
  26 + */
  27 +#define CP15ISB asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0))
  28 +#define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0))
  29 +#define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0))
  30 +
  31 +#endif /* !CONFIG_ARM64 */
  32 +
  33 +#if defined(__ARM_ARCH_7A__) || defined(CONFIG_ARM64)
  34 +#define ISB asm volatile ("isb sy" : : : "memory")
  35 +#define DSB asm volatile ("dsb sy" : : : "memory")
  36 +#define DMB asm volatile ("dmb sy" : : : "memory")
  37 +#else
  38 +#define ISB CP15ISB
  39 +#define DSB CP15DSB
  40 +#define DMB CP15DMB
  41 +#endif
  42 +
  43 +#endif /* __ASSEMBLY__ */
  44 +#endif /* __BARRIERS_H__ */
arch/arm/mach-socfpga/misc.c
Diff comments   View file @ 5f25a39
... ... @@ -172,7 +172,7 @@
172 172 #else
173 173 static int socfpga_eth_reset(void)
174 174 {
175   - return 0
  175 + return 0;
176 176 };
177 177 #endif
178 178  
arch/arm/mach-sunxi/dram_helpers.c
Diff comments   View file @ 5f25a39
... ... @@ -7,7 +7,7 @@
7 7 */
8 8  
9 9 #include <common.h>
10   -#include <asm/armv7.h>
  10 +#include <asm/barriers.h>
11 11 #include <asm/io.h>
12 12 #include <asm/arch/dram.h>
13 13  
arch/arm/mach-tegra/board2.c
Diff comments   View file @ 5f25a39
... ... @@ -404,16 +404,22 @@
404 404 */
405 405 int ft_system_setup(void *blob, bd_t *bd)
406 406 {
407   - const char *gpu_path =
408   -#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
409   - "/gpu@0,57000000";
410   -#else
411   - NULL;
  407 + const char *gpu_compats[] = {
  408 +#if defined(CONFIG_TEGRA124)
  409 + "nvidia,gk20a",
412 410 #endif
  411 +#if defined(CONFIG_TEGRA210)
  412 + "nvidia,gm20b",
  413 +#endif
  414 + };
  415 + int i, ret;
413 416  
414 417 /* Enable GPU node if GPU setup has been performed */
415   - if (gpu_path != NULL)
416   - return tegra_gpu_enable_node(blob, gpu_path);
  418 + for (i = 0; i < ARRAY_SIZE(gpu_compats); i++) {
  419 + ret = tegra_gpu_enable_node(blob, gpu_compats[i]);
  420 + if (ret)
  421 + return ret;
  422 + }
417 423  
418 424 return 0;
419 425 }
arch/arm/mach-tegra/gpu.c
Diff comments   View file @ 5f25a39
... ... @@ -33,16 +33,17 @@
33 33  
34 34 #if defined(CONFIG_OF_LIBFDT)
35 35  
36   -int tegra_gpu_enable_node(void *blob, const char *gpupath)
  36 +int tegra_gpu_enable_node(void *blob, const char *compat)
37 37 {
38 38 int offset;
39 39  
40   - if (_configured) {
41   - offset = fdt_path_offset(blob, gpupath);
42   - if (offset > 0) {
43   - fdt_status_okay(blob, offset);
44   - debug("enabled GPU node %s\n", gpupath);
45   - }
  40 + if (!_configured)
  41 + return 0;
  42 +
  43 + offset = fdt_node_offset_by_compatible(blob, -1, compat);
  44 + while (offset != -FDT_ERR_NOTFOUND) {
  45 + fdt_status_okay(blob, offset);
  46 + offset = fdt_node_offset_by_compatible(blob, offset, compat);
46 47 }
47 48  
48 49 return 0;
arch/arm/mach-uniphier/boot-mode/boot-mode.c
Diff comments   View file @ 5f25a39
... ... @@ -114,7 +114,7 @@
114 114  
115 115 U_BOOT_CMD(
116 116 mmcsetn, 1, 1, do_mmcsetn,
117   - "Set the first MMC (not SD) dev number to \"mmc_first_dev\" enviroment",
  117 + "Set the first MMC (not SD) dev number to \"mmc_first_dev\" environment",
118 118 ""
119 119 );
120 120 #endif
... ... @@ -145,7 +145,7 @@
145 145 Enable this option if you want U-Boot to hand over the Yamon-style
146 146 environment to the kernel. Information like memory size, initrd
147 147 address and size will be prepared as zero-terminated key/value list.
148   - The address of the enviroment is stored in register $a2.
  148 + The address of the environment is stored in register $a2.
149 149  
150 150 config MIPS_BOOT_FDT
151 151 bool "Hand over a flattened device tree to Linux kernel"
arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
Diff comments   View file @ 5f25a39
... ... @@ -1151,7 +1151,7 @@
1151 1151 dram_size *= ranks;
1152 1152 debug("dram_size = %lu\n", dram_size);
1153 1153  
1154   - /* Start the SDRAM controler */
  1154 + /* Start the SDRAM controller */
1155 1155 mtsdram(DDR0_02, DDR0_02_START_ENCODE(1));
1156 1156 denali_wait_for_dlllock();
1157 1157  
board/altera/cyclone5-socdk/qts/pinmux_config.h
Diff comments   View file @ 5f25a39
... ... @@ -8,7 +8,7 @@
8 8 #define __SOCFPGA_PINMUX_CONFIG_H__
9 9  
10 10 const u8 sys_mgr_init_table[] = {
11   - 3, /* EMACIO0 */
  11 + 0, /* EMACIO0 */
12 12 2, /* EMACIO1 */
13 13 2, /* EMACIO2 */
14 14 2, /* EMACIO3 */
... ... @@ -17,7 +17,7 @@
17 17 2, /* EMACIO6 */
18 18 2, /* EMACIO7 */
19 19 2, /* EMACIO8 */
20   - 3, /* EMACIO9 */
  20 + 0, /* EMACIO9 */
21 21 2, /* EMACIO10 */
22 22 2, /* EMACIO11 */
23 23 2, /* EMACIO12 */
24 24  
... ... @@ -32,27 +32,27 @@
32 32 0, /* FLASHIO1 */
33 33 3, /* FLASHIO2 */
34 34 3, /* FLASHIO3 */
35   - 3, /* FLASHIO4 */
36   - 3, /* FLASHIO5 */
37   - 3, /* FLASHIO6 */
38   - 3, /* FLASHIO7 */
  35 + 0, /* FLASHIO4 */
  36 + 0, /* FLASHIO5 */
  37 + 0, /* FLASHIO6 */
  38 + 0, /* FLASHIO7 */
39 39 0, /* FLASHIO8 */
40 40 3, /* FLASHIO9 */
41 41 3, /* FLASHIO10 */
42 42 3, /* FLASHIO11 */
43   - 0, /* GENERALIO0 */
44   - 1, /* GENERALIO1 */
45   - 1, /* GENERALIO2 */
46   - 0, /* GENERALIO3 */
47   - 0, /* GENERALIO4 */
48   - 1, /* GENERALIO5 */
49   - 1, /* GENERALIO6 */
50   - 1, /* GENERALIO7 */
51   - 1, /* GENERALIO8 */
52   - 0, /* GENERALIO9 */
53   - 0, /* GENERALIO10 */
54   - 0, /* GENERALIO11 */
55   - 0, /* GENERALIO12 */
  43 + 3, /* GENERALIO0 */
  44 + 3, /* GENERALIO1 */
  45 + 3, /* GENERALIO2 */
  46 + 3, /* GENERALIO3 */
  47 + 3, /* GENERALIO4 */
  48 + 3, /* GENERALIO5 */
  49 + 3, /* GENERALIO6 */
  50 + 3, /* GENERALIO7 */
  51 + 3, /* GENERALIO8 */
  52 + 3, /* GENERALIO9 */
  53 + 3, /* GENERALIO10 */
  54 + 3, /* GENERALIO11 */
  55 + 3, /* GENERALIO12 */
56 56 2, /* GENERALIO13 */
57 57 2, /* GENERALIO14 */
58 58 3, /* GENERALIO15 */
board/altera/cyclone5-socdk/qts/pll_config.h
Diff comments   View file @ 5f25a39
... ... @@ -10,13 +10,13 @@
10 10 #define CONFIG_HPS_DBCTRL_STAYOSC1 1
11 11  
12 12 #define CONFIG_HPS_MAINPLLGRP_VCO_DENOM 0
13   -#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 63
  13 +#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 73
14 14 #define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0
15 15 #define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0
16 16 #define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0
17   -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 3
  17 +#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 4
18 18 #define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511
19   -#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15
  19 +#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 14
20 20 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1
21 21 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1
22 22 #define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1
23 23  
24 24  
25 25  
26 26  
... ... @@ -27,26 +27,26 @@
27 27 #define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP 1
28 28 #define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP 1
29 29  
30   -#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 1
31   -#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 79
  30 +#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 0
  31 +#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 39
32 32 #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
33   -#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3
  33 +#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 511
34 34 #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
35 35 #define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
36 36 #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
37 37 #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4
38 38 #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511
39 39 #define CONFIG_HPS_PERPLLGRP_DIV_USBCLK 0
40   -#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 4
  40 +#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 0
41 41 #define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK 1
42   -#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 1
  42 +#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 4
43 43 #define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK 6249
44 44 #define CONFIG_HPS_PERPLLGRP_SRC_SDMMC 2
45 45 #define CONFIG_HPS_PERPLLGRP_SRC_NAND 2
46 46 #define CONFIG_HPS_PERPLLGRP_SRC_QSPI 1
47 47  
48   -#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 2
49   -#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 79
  48 +#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 0
  49 +#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 31
50 50 #define CONFIG_HPS_SDRPLLGRP_VCO_SSRC 0
51 51 #define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT 1
52 52 #define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE 0
53 53  
54 54  
55 55  
56 56  
... ... @@ -61,25 +61,25 @@
61 61 #define CONFIG_HPS_CLK_OSC2_HZ 25000000
62 62 #define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0
63 63 #define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0
64   -#define CONFIG_HPS_CLK_MAINVCO_HZ 1600000000
  64 +#define CONFIG_HPS_CLK_MAINVCO_HZ 1850000000
65 65 #define CONFIG_HPS_CLK_PERVCO_HZ 1000000000
66   -#define CONFIG_HPS_CLK_SDRVCO_HZ 666666666
67   -#define CONFIG_HPS_CLK_EMAC0_HZ 250000000
  66 +#define CONFIG_HPS_CLK_SDRVCO_HZ 800000000
  67 +#define CONFIG_HPS_CLK_EMAC0_HZ 1953125
68 68 #define CONFIG_HPS_CLK_EMAC1_HZ 250000000
69 69 #define CONFIG_HPS_CLK_USBCLK_HZ 200000000
70 70 #define CONFIG_HPS_CLK_NAND_HZ 50000000
71 71 #define CONFIG_HPS_CLK_SDMMC_HZ 200000000
72   -#define CONFIG_HPS_CLK_QSPI_HZ 400000000
  72 +#define CONFIG_HPS_CLK_QSPI_HZ 370000000
73 73 #define CONFIG_HPS_CLK_SPIM_HZ 200000000
74 74 #define CONFIG_HPS_CLK_CAN0_HZ 100000000
75   -#define CONFIG_HPS_CLK_CAN1_HZ 100000000
  75 +#define CONFIG_HPS_CLK_CAN1_HZ 12500000
76 76 #define CONFIG_HPS_CLK_GPIODB_HZ 32000
77 77 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000
78 78 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000
79 79  
80 80 #define CONFIG_HPS_ALTERAGRP_MPUCLK 1
81   -#define CONFIG_HPS_ALTERAGRP_MAINCLK 3
82   -#define CONFIG_HPS_ALTERAGRP_DBGATCLK 3
  81 +#define CONFIG_HPS_ALTERAGRP_MAINCLK 4
  82 +#define CONFIG_HPS_ALTERAGRP_DBGATCLK 4
83 83  
84 84  
85 85 #endif /* __SOCFPGA_PLL_CONFIG_H__ */
board/freescale/common/fsl_validate.c
Diff comments   View file @ 5f25a39
... ... @@ -812,9 +812,9 @@
812 812 }
813 813 /* haddr - Address of the header of image to be validated.
814 814 * arg_hash_str - Option hash string. If provided, this
815   - * overides the key hash in the SFP fuses.
  815 + * overrides the key hash in the SFP fuses.
816 816 * img_addr_ptr - Optional pointer to address of image to be validated.
817   - * If non zero addr, this overides the addr of image in header,
  817 + * If non zero addr, this overrides the addr of image in header,
818 818 * otherwise updated to image addr in header.
819 819 * Acts as both input and output of function.
820 820 * This pointer shouldn't be NULL.
board/freescale/mx28evk/README
Diff comments   View file @ 5f25a39
... ... @@ -45,7 +45,7 @@
45 45  
46 46 or
47 47  
48   -"make mx28evk_spi_config" - store enviroment variables into SPI NOR flash
  48 +"make mx28evk_spi_config" - store environment variables into SPI NOR flash
49 49  
50 50 Choose the target accordingly.
51 51  
board/nvidia/jetson-tk1/jetson-tk1.c
Diff comments   View file @ 5f25a39
... ... @@ -31,6 +31,9 @@
31 31  
32 32 pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
33 33 ARRAY_SIZE(jetson_tk1_drvgrps));
  34 +
  35 + pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps,
  36 + ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
34 37 }
35 38  
36 39 #ifdef CONFIG_PCI_TEGRA
board/nvidia/jetson-tk1/pinmux-config-jetson-tk1.h
Diff comments   View file @ 5f25a39
... ... @@ -276,7 +276,6 @@
276 276 PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
277 277 PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
278 278 PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
279   - PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL),
280 279 PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
281 280 PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT),
282 281 };
... ... @@ -294,6 +293,17 @@
294 293 }
295 294  
296 295 static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = {
  296 +};
  297 +
  298 +#define MIPIPADCTRLCFG(_grp, _mux) \
  299 + { \
  300 + .grp = PMUX_MIPIPADCTRLGRP_##_grp, \
  301 + .func = PMUX_FUNC_##_mux, \
  302 + }
  303 +
  304 +static const struct pmux_mipipadctrlgrp_config jetson_tk1_mipipadctrlgrps[] = {
  305 + /* grp, mux */
  306 + MIPIPADCTRLCFG(DSI_B, DSI_B),
297 307 };
298 308  
299 309 #endif /* PINMUX_CONFIG_JETSON_TK1_H */
... ... @@ -1055,7 +1055,7 @@
1055 1055 " <start> - addr of key blob\n"
1056 1056 " default gd->fdt_blob\n"
1057 1057 #endif
1058   - "NOTE: Dereference aliases by omiting the leading '/', "
  1058 + "NOTE: Dereference aliases by omitting the leading '/', "
1059 1059 "e.g. fdt print ethernet0.";
1060 1060 #endif
1061 1061  
... ... @@ -313,7 +313,7 @@
313 313 return CMD_RET_FAILURE;
314 314 }
315 315 /* Switch to the RPMB partition */
316   - original_part = mmc->block_dev.part_num;
  316 + original_part = mmc->block_dev.hwpart;
317 317 if (mmc_select_hwpart(curr_device, MMC_PART_RPMB) != 0)
318 318 return CMD_RET_FAILURE;
319 319 ret = cp->cmd(cmdtp, flag, argc, argv);
... ... @@ -1742,7 +1742,7 @@
1742 1742 debug("last_partition : %s\n", last_partition);
1743 1743 debug("env_partition : %s\n", current_partition);
1744 1744  
1745   - /* if mtdids varible is empty try to use defaults */
  1745 + /* if mtdids variable is empty try to use defaults */
1746 1746 if (!ids) {
1747 1747 if (mtdids_default) {
1748 1748 debug("mtdids variable not defined, using default\n");
... ... @@ -1064,7 +1064,7 @@
1064 1064  
1065 1065 int usb_select_config(struct usb_device *dev)
1066 1066 {
1067   - unsigned char *tmpbuf = 0;
  1067 + unsigned char *tmpbuf = NULL;
1068 1068 int err;
1069 1069  
1070 1070 err = get_descriptor_len(dev, USB_DT_DEVICE_SIZE, USB_DT_DEVICE_SIZE);
... ... @@ -1077,6 +1077,14 @@
1077 1077 le16_to_cpus(&dev->descriptor.idProduct);
1078 1078 le16_to_cpus(&dev->descriptor.bcdDevice);
1079 1079  
  1080 + /*
  1081 + * Kingston DT Ultimate 32GB USB 3.0 seems to be extremely sensitive
  1082 + * about this first Get Descriptor request. If there are any other
  1083 + * requests in the first microframe, the stick crashes. Wait about
  1084 + * one microframe duration here (1mS for USB 1.x , 125uS for USB 2.0).
  1085 + */
  1086 + mdelay(1);
  1087 +
1080 1088 /* only support for one config for now */
1081 1089 err = usb_get_configuration_len(dev, 0);
1082 1090 if (err >= 0) {
... ... @@ -1107,6 +1115,14 @@
1107 1115 "len %d, status %lX\n", dev->act_len, dev->status);
1108 1116 return err;
1109 1117 }
  1118 +
  1119 + /*
  1120 + * Wait until the Set Configuration request gets processed by the
  1121 + * device. This is required by at least SanDisk Cruzer Pop USB 2.0
  1122 + * and Kingston DT Ultimate 32GB USB 3.0 on DWC2 OTG controller.
  1123 + */
  1124 + mdelay(10);
  1125 +
1110 1126 debug("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\n",
1111 1127 dev->descriptor.iManufacturer, dev->descriptor.iProduct,
1112 1128 dev->descriptor.iSerialNumber);
... ... @@ -402,6 +402,7 @@
402 402 free(usb_scan);
403 403 return 0;
404 404 }
  405 + return 0;
405 406 }
406 407  
407 408 portstatus = le16_to_cpu(portsts->wPortStatus);
configs/CHIP_defconfig
Diff comments   View file @ 5f25a39
... ... @@ -29,4 +29,5 @@
29 29 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
30 30 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
31 31 CONFIG_G_DNL_PRODUCT_NUM=0x1010
  32 +CONFIG_USB_EHCI_HCD=y
configs/socfpga_socrates_defconfig
Diff comments   View file @ 5f25a39
... ... @@ -27,6 +27,7 @@
27 27 CONFIG_CMD_MII=y
28 28 CONFIG_CMD_PING=y
29 29 CONFIG_CMD_CACHE=y
  30 +CONFIG_CMD_TIME=y
30 31 CONFIG_CMD_EXT4=y
31 32 CONFIG_CMD_EXT4_WRITE=y
32 33 CONFIG_CMD_FAT=y
configs/warp7_defconfig
Diff comments   View file @ 5f25a39
... ... @@ -22,4 +22,5 @@
22 22 CONFIG_CMD_EXT4=y
23 23 CONFIG_CMD_EXT4_WRITE=y
24 24 CONFIG_CMD_FAT=y
  25 +CONFIG_OF_LIBFDT=y
doc/README.commands.spl
Diff comments   View file @ 5f25a39
... ... @@ -10,7 +10,7 @@
10 10 fdt: exports the FDT
11 11  
12 12 Call is:
13   -spl export <ftd|atags> [kernel_addr] [initrd_addr] [fdt_addr if fdt]
  13 +spl export <fdt|atags> [kernel_addr] [initrd_addr] [fdt_addr if fdt]
14 14  
15 15  
16 16 TYPICAL CALL
doc/README.marubun-pcmcia
Diff comments   View file @ 5f25a39
... ... @@ -34,7 +34,7 @@
34 34 ex. #define CONFIG_PCMCIA_SLOT_A 1
35 35  
36 36 * CONFIG_SYS_MARUBUN_MRSHPC
37   - This is MR-SHPC-01 PCMCIA controler base address.
  37 + This is MR-SHPC-01 PCMCIA controller base address.
38 38 You should do the setting matched to your environment.
39 39 ex. #define CONFIG_SYS_MARUBUN_MRSHPC 0xb03fffe0
40 40 ( for MS7722SE01 environment )
... ... @@ -219,7 +219,7 @@
219 219  
220 220 This script expects a working TFTP server containing the file
221 221 "u-boot.nand" in it's root directory. This can be changed by
222   - adjusting the "update_nand_full_filename" varible.
  222 + adjusting the "update_nand_full_filename" variable.
223 223  
224 224 To update the system, run the following in U-Boot prompt:
225 225  
... ... @@ -242,7 +242,7 @@
242 242  
243 243 This script expects a working TFTP server containing the file
244 244 "u-boot.sb" in it's root directory. This can be changed by
245   - adjusting the "update_nand_firmware_filename" varible.
  245 + adjusting the "update_nand_firmware_filename" variable.
246 246  
247 247 To update the system, run the following in U-Boot prompt:
248 248  
doc/SPI/README.sandbox-spi
Diff comments   View file @ 5f25a39
1 1 Sandbox SPI/SPI Flash Implementation
2 2 ====================================
3 3  
4   -U-Boot supports SPI and SPI flash emuation in sandbox. This must be enabled
  4 +U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled
5 5 using the --spi_sf paramter when starting U-Boot.
6 6  
7 7 For example:
doc/SPI/README.ti_qspi_flash
Diff comments   View file @ 5f25a39
... ... @@ -31,7 +31,7 @@
31 31 Memory mapped read mode
32 32 -----------------------
33 33 In this, SPI controller is configured using configuration port and then
34   -controler is switched to memory mapped port for data read.
  34 +controller is switched to memory mapped port for data read.
35 35  
36 36 Driver
37 37 ------
drivers/bios_emulator/x86emu/decode.c
Diff comments   View file @ 5f25a39
... ... @@ -241,7 +241,7 @@
241 241 addresses relative to SS (ie: on the stack). So, at the minimum, all
242 242 decodings of addressing modes would have to set/clear a bit describing
243 243 whether the access is relative to DS or SS. That is the function of the
244   -cpu-state-varible M.x86.mode. There are several potential states:
  244 +cpu-state-variable M.x86.mode. There are several potential states:
245 245  
246 246 repe prefix seen (handled elsewhere)
247 247 repne prefix seen (ditto)
... ... @@ -3,9 +3,9 @@
3 3 config DFU_TFTP
4 4 bool "DFU via TFTP"
5 5 help
6   - This option allows performing update of DFU managed medium with data
7   - send via TFTP boot.
8   - Detailed description of this feature can be found at ./doc/README.dfutftp
  6 + This option allows performing update of DFU-managed medium with data
  7 + sent via TFTP boot.
9 8  
  9 + Detailed description of this feature can be found at ./doc/README.dfutftp
10 10 endmenu
... ... @@ -468,8 +468,10 @@
468 468 s = strsep(&env, ";");
469 469 ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface,
470 470 devstr);
471   - if (ret)
  471 + if (ret) {
  472 + free(dfu);
472 473 return -1;
  474 + }
473 475  
474 476 list_add_tail(&dfu[i].list, &dfu_list);
475 477 alt_num_cnt++;
... ... @@ -120,7 +120,7 @@
120 120 static int gem_is_gigabit_capable(struct macb_device *macb)
121 121 {
122 122 /*
123   - * The GEM controllers embeded in SAMA5D2 and SAMA5D4 are
  123 + * The GEM controllers embedded in SAMA5D2 and SAMA5D4 are
124 124 * configured to support only 10/100.
125 125 */
126 126 return macb_is_gem(macb) && !cpu_is_sama5d2() && !cpu_is_sama5d4();
drivers/net/sh_eth.c
Diff comments   View file @ 5f25a39
1 1 /*
2   - * sh_eth.c - Driver for Renesas ethernet controler.
  2 + * sh_eth.c - Driver for Renesas ethernet controller.
3 3 *
4 4 * Copyright (C) 2008, 2011 Renesas Solutions Corp.
5 5 * Copyright (c) 2008, 2011, 2014 2014 Nobuhiro Iwamatsu
drivers/net/sh_eth.h
Diff comments   View file @ 5f25a39
1 1 /*
2   - * sh_eth.h - Driver for Renesas SuperH ethernet controler.
  2 + * sh_eth.h - Driver for Renesas SuperH ethernet controller.
3 3 *
4 4 * Copyright (C) 2008 - 2012 Renesas Solutions Corp.
5 5 * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu
drivers/pci/pci_tegra.c
Diff comments   View file @ 5f25a39
... ... @@ -275,12 +275,17 @@
275 275 return 0;
276 276 }
277 277 }
  278 + return -EFAULT;
278 279 } else {
  280 +#ifdef CONFIG_TEGRA20
  281 + unsigned int dev = PCI_DEV(bdf);
  282 + if (dev != 0)
  283 + return -EFAULT;
  284 +#endif
  285 +
279 286 *address = pcie->cs.start + tegra_pcie_conf_offset(bdf, where);
280 287 return 0;
281 288 }
282   -
283   - return -EFAULT;
284 289 }
285 290  
286 291 static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf,
287 292  
288 293  
... ... @@ -299,13 +304,15 @@
299 304  
300 305 value = readl(address);
301 306  
  307 +#ifdef CONFIG_TEGRA20
302 308 /* fixup root port class */
303 309 if (PCI_BUS(bdf) == 0) {
304   - if (offset == PCI_CLASS_REVISION) {
  310 + if ((offset & ~3) == PCI_CLASS_REVISION) {
305 311 value &= ~0x00ff0000;
306 312 value |= PCI_CLASS_BRIDGE_PCI << 16;
307 313 }
308 314 }
  315 +#endif
309 316  
310 317 done:
311 318 *valuep = pci_conv_32_to_size(value, offset, size);
... ... @@ -1041,12 +1048,4 @@
1041 1048 .probe = pci_tegra_probe,
1042 1049 .priv_auto_alloc_size = sizeof(struct tegra_pcie),
1043 1050 };
1044   -
1045   -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
1046   -{
1047   - if (PCI_BUS(dev) != 0 && PCI_DEV(dev) > 0)
1048   - return 1;
1049   -
1050   - return 0;
1051   -}
drivers/spi/cadence_qspi_apb.c
Diff comments   View file @ 5f25a39
... ... @@ -29,6 +29,7 @@
29 29 #include <asm/io.h>
30 30 #include <asm/errno.h>
31 31 #include <spi.h>
  32 +#include <wait_bit.h>
32 33 #include "cadence_qspi.h"
33 34  
34 35 #define CQSPI_REG_POLL_US (1) /* 1us */
... ... @@ -192,128 +193,6 @@
192 193 return addr;
193 194 }
194 195  
195   -static void cadence_qspi_apb_read_fifo_data(void *dest,
196   - const void *src_ahb_addr, unsigned int bytes)
197   -{
198   - unsigned int temp;
199   - int remaining = bytes;
200   - unsigned int *dest_ptr = (unsigned int *)dest;
201   - unsigned int *src_ptr = (unsigned int *)src_ahb_addr;
202   -
203   - while (remaining >= sizeof(dest_ptr)) {
204   - *dest_ptr = readl(src_ptr);
205   - remaining -= sizeof(src_ptr);
206   - dest_ptr++;
207   - }
208   - if (remaining) {
209   - /* dangling bytes */
210   - temp = readl(src_ptr);
211   - memcpy(dest_ptr, &temp, remaining);
212   - }
213   -
214   - return;
215   -}
216   -
217   -static void cadence_qspi_apb_write_fifo_data(const void *dest_ahb_addr,
218   - const void *src, unsigned int bytes)
219   -{
220   - unsigned int temp = 0;
221   - int i;
222   - int remaining = bytes;
223   - unsigned int *dest_ptr = (unsigned int *)dest_ahb_addr;
224   - unsigned int *src_ptr = (unsigned int *)src;
225   -
226   - while (remaining >= CQSPI_FIFO_WIDTH) {
227   - for (i = CQSPI_FIFO_WIDTH/sizeof(src_ptr) - 1; i >= 0; i--)
228   - writel(*(src_ptr+i), dest_ptr+i);
229   - src_ptr += CQSPI_FIFO_WIDTH/sizeof(src_ptr);
230   - remaining -= CQSPI_FIFO_WIDTH;
231   - }
232   - if (remaining) {
233   - /* dangling bytes */
234   - i = remaining/sizeof(dest_ptr);
235   - memcpy(&temp, src_ptr+i, remaining % sizeof(dest_ptr));
236   - writel(temp, dest_ptr+i);
237   - for (--i; i >= 0; i--)
238   - writel(*(src_ptr+i), dest_ptr+i);
239   - }
240   - return;
241   -}
242   -
243   -/* Read from SRAM FIFO with polling SRAM fill level. */
244   -static int qspi_read_sram_fifo_poll(const void *reg_base, void *dest_addr,
245   - const void *src_addr, unsigned int num_bytes)
246   -{
247   - unsigned int remaining = num_bytes;
248   - unsigned int retry;
249   - unsigned int sram_level = 0;
250   - unsigned char *dest = (unsigned char *)dest_addr;
251   -
252   - while (remaining > 0) {
253   - retry = CQSPI_REG_RETRY;
254   - while (retry--) {
255   - sram_level = CQSPI_GET_RD_SRAM_LEVEL(reg_base);
256   - if (sram_level)
257   - break;
258   - udelay(1);
259   - }
260   -
261   - if (!retry) {
262   - printf("QSPI: No receive data after polling for %d times\n",
263   - CQSPI_REG_RETRY);
264   - return -1;
265   - }
266   -
267   - sram_level *= CQSPI_FIFO_WIDTH;
268   - sram_level = sram_level > remaining ? remaining : sram_level;
269   -
270   - /* Read data from FIFO. */
271   - cadence_qspi_apb_read_fifo_data(dest, src_addr, sram_level);
272   - dest += sram_level;
273   - remaining -= sram_level;
274   - udelay(1);
275   - }
276   - return 0;
277   -}
278   -
279   -/* Write to SRAM FIFO with polling SRAM fill level. */
280   -static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat,
281   - const void *src_addr, unsigned int num_bytes)
282   -{
283   - const void *reg_base = plat->regbase;
284   - void *dest_addr = plat->ahbbase;
285   - unsigned int retry = CQSPI_REG_RETRY;
286   - unsigned int sram_level;
287   - unsigned int wr_bytes;
288   - unsigned char *src = (unsigned char *)src_addr;
289   - int remaining = num_bytes;
290   - unsigned int page_size = plat->page_size;
291   - unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS;
292   -
293   - while (remaining > 0) {
294   - retry = CQSPI_REG_RETRY;
295   - while (retry--) {
296   - sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base);
297   - if (sram_level <= sram_threshold_words)
298   - break;
299   - }
300   - if (!retry) {
301   - printf("QSPI: SRAM fill level (0x%08x) not hit lower expected level (0x%08x)",
302   - sram_level, sram_threshold_words);
303   - return -1;
304   - }
305   - /* Write a page or remaining bytes. */
306   - wr_bytes = (remaining > page_size) ?
307   - page_size : remaining;
308   -
309   - cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes);
310   - src += wr_bytes;
311   - remaining -= wr_bytes;
312   - }
313   -
314   - return 0;
315   -}
316   -
317 196 void cadence_qspi_apb_controller_enable(void *reg_base)
318 197 {
319 198 unsigned int reg;
320 199  
321 200  
322 201  
323 202  
324 203  
325 204  
326 205  
... ... @@ -741,40 +620,84 @@
741 620 return 0;
742 621 }
743 622  
  623 +static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_platdata *plat)
  624 +{
  625 + u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL);
  626 + reg >>= CQSPI_REG_SDRAMLEVEL_RD_LSB;
  627 + return reg & CQSPI_REG_SDRAMLEVEL_RD_MASK;
  628 +}
  629 +
  630 +static int cadence_qspi_wait_for_data(struct cadence_spi_platdata *plat)
  631 +{
  632 + unsigned int timeout = 10000;
  633 + u32 reg;
  634 +
  635 + while (timeout--) {
  636 + reg = cadence_qspi_get_rd_sram_level(plat);
  637 + if (reg)
  638 + return reg;
  639 + udelay(1);
  640 + }
  641 +
  642 + return -ETIMEDOUT;
  643 +}
  644 +
744 645 int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
745   - unsigned int rxlen, u8 *rxbuf)
  646 + unsigned int n_rx, u8 *rxbuf)
746 647 {
747   - unsigned int reg;
  648 + unsigned int remaining = n_rx;
  649 + unsigned int bytes_to_read = 0;
  650 + int ret;
748 651  
749   - writel(rxlen, plat->regbase + CQSPI_REG_INDIRECTRDBYTES);
  652 + writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES);
750 653  
751 654 /* Start the indirect read transfer */
752 655 writel(CQSPI_REG_INDIRECTRD_START_MASK,
753 656 plat->regbase + CQSPI_REG_INDIRECTRD);
754 657  
755   - if (qspi_read_sram_fifo_poll(plat->regbase, (void *)rxbuf,
756   - (const void *)plat->ahbbase, rxlen))
757   - goto failrd;
  658 + while (remaining > 0) {
  659 + ret = cadence_qspi_wait_for_data(plat);
  660 + if (ret < 0) {
  661 + printf("Indirect write timed out (%i)\n", ret);
  662 + goto failrd;
  663 + }
758 664  
759   - /* Check flash indirect controller */
760   - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD);
761   - if (!(reg & CQSPI_REG_INDIRECTRD_DONE_MASK)) {
762   - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD);
763   - printf("QSPI: indirect completion status error with reg 0x%08x\n",
764   - reg);
  665 + bytes_to_read = ret;
  666 +
  667 + while (bytes_to_read != 0) {
  668 + bytes_to_read *= CQSPI_FIFO_WIDTH;
  669 + bytes_to_read = bytes_to_read > remaining ?
  670 + remaining : bytes_to_read;
  671 + /* Handle non-4-byte aligned access to avoid data abort. */
  672 + if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4))
  673 + readsb(plat->ahbbase, rxbuf, bytes_to_read);
  674 + else
  675 + readsl(plat->ahbbase, rxbuf, bytes_to_read >> 2);
  676 + rxbuf += bytes_to_read;
  677 + remaining -= bytes_to_read;
  678 + bytes_to_read = cadence_qspi_get_rd_sram_level(plat);
  679 + }
  680 + }
  681 +
  682 + /* Check indirect done status */
  683 + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTRD,
  684 + CQSPI_REG_INDIRECTRD_DONE_MASK, 1, 10, 0);
  685 + if (ret) {
  686 + printf("Indirect read completion error (%i)\n", ret);
765 687 goto failrd;
766 688 }
767 689  
768 690 /* Clear indirect completion status */
769 691 writel(CQSPI_REG_INDIRECTRD_DONE_MASK,
770 692 plat->regbase + CQSPI_REG_INDIRECTRD);
  693 +
771 694 return 0;
772 695  
773 696 failrd:
774 697 /* Cancel the indirect read */
775 698 writel(CQSPI_REG_INDIRECTRD_CANCEL_MASK,
776 699 plat->regbase + CQSPI_REG_INDIRECTRD);
777   - return -1;
  700 + return ret;
778 701 }
779 702  
780 703 /* Opcode + Address (3/4 bytes) */
781 704  
782 705  
783 706  
784 707  
785 708  
786 709  
787 710  
... ... @@ -809,51 +732,48 @@
809 732 }
810 733  
811 734 int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
812   - unsigned int txlen, const u8 *txbuf)
  735 + unsigned int n_tx, const u8 *txbuf)
813 736 {
814   - unsigned int reg = 0;
815   - unsigned int retry;
  737 + unsigned int page_size = plat->page_size;
  738 + unsigned int remaining = n_tx;
  739 + unsigned int write_bytes;
  740 + int ret;
816 741  
817 742 /* Configure the indirect read transfer bytes */
818   - writel(txlen, plat->regbase + CQSPI_REG_INDIRECTWRBYTES);
  743 + writel(n_tx, plat->regbase + CQSPI_REG_INDIRECTWRBYTES);
819 744  
820 745 /* Start the indirect write transfer */
821 746 writel(CQSPI_REG_INDIRECTWR_START_MASK,
822 747 plat->regbase + CQSPI_REG_INDIRECTWR);
823 748  
824   - if (qpsi_write_sram_fifo_push(plat, (const void *)txbuf, txlen))
825   - goto failwr;
  749 + while (remaining > 0) {
  750 + write_bytes = remaining > page_size ? page_size : remaining;
  751 + /* Handle non-4-byte aligned access to avoid data abort. */
  752 + if (((uintptr_t)txbuf % 4) || (write_bytes % 4))
  753 + writesb(plat->ahbbase, txbuf, write_bytes);
  754 + else
  755 + writesl(plat->ahbbase, txbuf, write_bytes >> 2);
826 756  
827   - /* Wait until last write is completed (FIFO empty) */
828   - retry = CQSPI_REG_RETRY;
829   - while (retry--) {
830   - reg = CQSPI_GET_WR_SRAM_LEVEL(plat->regbase);
831   - if (reg == 0)
832   - break;
  757 + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_SDRAMLEVEL,
  758 + CQSPI_REG_SDRAMLEVEL_WR_MASK <<
  759 + CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0);
  760 + if (ret) {
  761 + printf("Indirect write timed out (%i)\n", ret);
  762 + goto failwr;
  763 + }
833 764  
834   - udelay(1);
  765 + txbuf += write_bytes;
  766 + remaining -= write_bytes;
835 767 }
836 768  
837   - if (reg != 0) {
838   - printf("QSPI: timeout for indirect write\n");
  769 + /* Check indirect done status */
  770 + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTWR,
  771 + CQSPI_REG_INDIRECTWR_DONE_MASK, 1, 10, 0);
  772 + if (ret) {
  773 + printf("Indirect write completion error (%i)\n", ret);
839 774 goto failwr;
840 775 }
841 776  
842   - /* Check flash indirect controller status */
843   - retry = CQSPI_REG_RETRY;
844   - while (retry--) {
845   - reg = readl(plat->regbase + CQSPI_REG_INDIRECTWR);
846   - if (reg & CQSPI_REG_INDIRECTWR_DONE_MASK)
847   - break;
848   - udelay(1);
849   - }
850   -
851   - if (!(reg & CQSPI_REG_INDIRECTWR_DONE_MASK)) {
852   - printf("QSPI: indirect completion status error with reg 0x%08x\n",
853   - reg);
854   - goto failwr;
855   - }
856   -
857 777 /* Clear indirect completion status */
858 778 writel(CQSPI_REG_INDIRECTWR_DONE_MASK,
859 779 plat->regbase + CQSPI_REG_INDIRECTWR);
... ... @@ -863,7 +783,7 @@
863 783 /* Cancel the indirect write */
864 784 writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK,
865 785 plat->regbase + CQSPI_REG_INDIRECTWR);
866   - return -1;
  786 + return ret;
867 787 }
868 788  
869 789 void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy)
drivers/thermal/Kconfig
Diff comments   View file @ 5f25a39
1 1 config DM_THERMAL
2 2 bool "Driver support for thermal devices"
3 3 help
4   - Enable support for temporary-sensing devices. Some SoCs have on-chip
  4 + Enable support for temperature-sensing devices. Some SoCs have on-chip
5 5 temperature sensors to permit warnings, speed throttling or even
6 6 automatic power-off when the temperature gets too high or low. Other
7 7 devices may be discrete but connected on a suitable bus.
drivers/usb/gadget/f_dfu.c
Diff comments   View file @ 5f25a39
... ... @@ -636,7 +636,7 @@
636 636  
637 637 f_dfu->strings = calloc(sizeof(struct usb_string), n + 1);
638 638 if (!f_dfu->strings)
639   - goto enomem;
  639 + return -ENOMEM;
640 640  
641 641 for (i = 0; i < n; ++i) {
642 642 de = dfu_get_entity(i);
... ... @@ -647,14 +647,6 @@
647 647 f_dfu->strings[i].s = NULL;
648 648  
649 649 return 0;
650   -
651   -enomem:
652   - while (i)
653   - f_dfu->strings[--i].s = NULL;
654   -
655   - free(f_dfu->strings);
656   -
657   - return -ENOMEM;
658 650 }
659 651  
660 652 static int dfu_prepare_function(struct f_dfu *f_dfu, int n)
drivers/usb/host/dwc2.c
Diff comments   View file @ 5f25a39
... ... @@ -1088,6 +1088,15 @@
1088 1088 }
1089 1089 }
1090 1090  
  1091 + /*
  1092 + * Add a 1 second delay here. This gives the host controller
  1093 + * a bit time before the comminucation with the USB devices
  1094 + * is started (the bus is scanned) and fixes the USB detection
  1095 + * problems with some problematic USB keys.
  1096 + */
  1097 + if (readl(&regs->gintsts) & DWC2_GINTSTS_CURMODE_HOST)
  1098 + mdelay(1000);
  1099 +
1091 1100 return 0;
1092 1101 }
1093 1102  
drivers/usb/host/ehci-mx6.c
Diff comments   View file @ 5f25a39
... ... @@ -254,7 +254,7 @@
254 254 }
255 255  
256 256 /**
257   - * board_ehci_hcd_init - override usb phy mode
  257 + * board_usb_phy_mode - override usb phy mode
258 258 * @port: usb host/otg port
259 259 *
260 260 * Target board specific, override usb_phy_mode.
... ... @@ -310,6 +310,7 @@
310 310 #endif
311 311 struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
312 312 (controller_spacing * index));
  313 + int ret;
313 314  
314 315 if (index > 3)
315 316 return -EINVAL;
... ... @@ -317,7 +318,9 @@
317 318 mdelay(1);
318 319  
319 320 /* Do board specific initialization */
320   - board_ehci_hcd_init(index);
  321 + ret = board_ehci_hcd_init(index);
  322 + if (ret)
  323 + return ret;
321 324  
322 325 usb_power_config(index);
323 326 usb_oc_config(index);
include/configs/duovero.h
Diff comments   View file @ 5f25a39
... ... @@ -22,6 +22,7 @@
22 22 #include <configs/ti_omap4_common.h>
23 23  
24 24 #undef CONFIG_SPL_OS_BOOT
  25 +#undef CONFIG_EFI_PARTITION
25 26  
26 27 #undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
27 28 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
include/configs/hikey.h
Diff comments   View file @ 5f25a39
... ... @@ -121,7 +121,7 @@
121 121 "initrd_high=0xffffffffffffffff\0" \
122 122 BOOTENV
123 123  
124   -/* Preserve enviroment on sd card */
  124 +/* Preserve environment on sd card */
125 125 #define CONFIG_COMMAND_HISTORY
126 126  
127 127 #define CONFIG_ENV_SIZE 0x1000
include/configs/omap3_logic.h
Diff comments   View file @ 5f25a39
... ... @@ -140,7 +140,7 @@
140 140 #define CONFIG_PREBOOT \
141 141 "echo ======================NOTICE============================;"\
142 142 "echo \"The u-boot environment is not set.\";" \
143   - "echo \"If using a display a valid display varible for your panel\";" \
  143 + "echo \"If using a display a valid display variable for your panel\";" \
144 144 "echo \"needs to be set.\";" \
145 145 "echo \"Valid display options are:\";" \
146 146 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
include/configs/pengwyn.h
Diff comments   View file @ 5f25a39
... ... @@ -102,7 +102,7 @@
102 102 "run mmcboot;" \
103 103 "run nandboot;"
104 104  
105   -/* NS16550 Configuration: primary UART via FDTI */
  105 +/* NS16550 Configuration: primary UART via FTDI */
106 106 #define CONFIG_SYS_NS16550_COM1 0x44e09000
107 107 #define CONFIG_BAUDRATE 115200
108 108  
include/configs/ti_omap4_common.h
Diff comments   View file @ 5f25a39
... ... @@ -122,7 +122,10 @@
122 122 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
123 123 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
124 124 "run args_mmc; " \
125   - "bootz ${loadaddr} - ${fdtaddr}\0" \
  125 + "if run loadimage; then " \
  126 + "run loadfdt; " \
  127 + "bootz ${loadaddr} - ${fdtaddr}; " \
  128 + "fi;\0" \
126 129 "uimageboot=echo Booting from mmc${mmcdev} ...; " \
127 130 "run args_mmc; " \
128 131 "bootm ${loadaddr}\0" \
... ... @@ -570,7 +570,7 @@
570 570 * @param id Compatible ID to look for
571 571 * @param node_list Place to put list of found nodes
572 572 * @param maxcount Maximum number of nodes to find
573   - * @return number of nodes found on success, FTD_ERR_... on error
  573 + * @return number of nodes found on success, FDT_ERR_... on error
574 574 */
575 575 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
576 576 enum fdt_compat_id id, int *node_list, int maxcount);
test/py/tests/test_dfu.py
Diff comments   View file @ 5f25a39
... ... @@ -136,6 +136,8 @@
136 136 Nothing.
137 137 """
138 138  
  139 + u_boot_utils.wait_until_file_open_fails(
  140 + env__usb_dev_port['host_usb_dev_node'], True)
139 141 fh = u_boot_utils.attempt_to_open_file(
140 142 env__usb_dev_port['host_usb_dev_node'])
141 143 if fh:
test/py/u_boot_utils.py
Diff comments   View file @ 5f25a39
... ... @@ -7,6 +7,7 @@
7 7 import hashlib
8 8 import os
9 9 import os.path
  10 +import pytest
10 11 import sys
11 12 import time
12 13  
... ... @@ -273,12 +273,12 @@
273 273 color_text(color_enabled, color, msg) + '\n'
274 274  
275 275 def update_cross_compile():
276   - """Update per-arch CROSS_COMPILE via enviroment variables
  276 + """Update per-arch CROSS_COMPILE via environment variables
277 277  
278 278 The default CROSS_COMPILE values are available
279 279 in the CROSS_COMPILE list above.
280 280  
281   - You can override them via enviroment variables
  281 + You can override them via environment variables
282 282 CROSS_COMPILE_{ARCH}.
283 283  
284 284 For example, if you want to override toolchain prefixes
... ... @@ -92,6 +92,16 @@
92 92  
93 93 It is possible to switch in a single TC between board states.
94 94  
  95 +- Events
  96 + tbot creates while executing testcases so called events.
  97 + After tbot ended with the testcase it can call event_backends,
  98 + which convert the events to different formats. more info:
  99 +
  100 + https://github.com/hsdenx/tbot/blob/master/doc/README.event
  101 +
  102 + demo for a event backend:
  103 + http://xeidos.ddns.net/tests/test_db_auslesen.php
  104 +
95 105 - tbot cmdline parameters:
96 106  
97 107 $ python2.7 src/common/tbot.py --help
tools/tbot/README.install
Diff comments   View file @ 5f25a39
... ... @@ -93,12 +93,6 @@
93 93 cp src/tc/tc_lab_denx_connect_to_board.py src/tc/tc_lab_denx_connect_to_board_XXX.py
94 94 and adapt the commands to your needs.
95 95  
96   - As this TC powers on the board for all your boards in your VL,
97   - you can differ between the boards through the tbot class
98   - variable "tb.boardlabname" (which is in the default case the
99   - same as "tb.boardname"), but you may need to name the power target
100   - with an other name than boardname, so you can configure this case.
101   -
102 96 If connect fails end this TC with "tb.end_tc(False)"
103 97 else call "tb.end_tc(True)"
104 98  
... ... @@ -150,12 +144,6 @@
150 144 if (user == 'root'):
151 145 password = ''
152 146  
153   - In the above example passwords for logging into the Lab PC tbot finds
154   - through:
155   - if (board == 'lab'):
156   - user = 'name':
157   - password = 'gnlmpf' # password 'gnlmpf' for login of user 'name'
158   -
159 147 - prepare board config file
160 148 Each board which is found in the VL needs a tbot configuration file
161 149 pass the config file name with the option '-c' to tbot, tbot searches
162 150  
... ... @@ -187,13 +175,8 @@
187 175 keepalive message.
188 176 line 14: channel_timeout: passed to paramiko
189 177 line 15: loglevel: tbots loglevel for adding entries into the logfile.
190   - line 16: lap_api: used lap API (currently only 'ssh_std')
191   - Should be declared as standard -> this line would be not needed
192   - longer.
193 178 line 17: wdt_timeout: timeout in seconds for tbots watchdog.
194 179 Watchdog gets triggered if prompt get read.
195   - line 20,21: include 'ssh_std' api
196   - should be removed.
197 180 line 24: tc_lab_denx_connect_to_board_tc: Which TC is used for
198 181 connecting to the boards console the TC, here:
199 182 https://github.com/hsdenx/tbot/blob/master/src/tc/tc_workfd_connect_with_kermit.py
200 183  
201 184  
202 185  
203 186  
204 187  
205 188  
206 189  
... ... @@ -215,157 +198,114 @@
215 198 u-boot:tools/tbot/README.create_a_new_testcase
216 199  
217 200 Heiko Schocher <hs@denx.de>
218   -v1 2016.01.22
  201 +v2 2016.04.26
219 202  
220 203 --------------
221 204  
222 205 [1] tbot Dokumentation:
223 206 [2] u-boot:/tools/tbot/README
224 207 https://github.com/hsdenx/tbot/blob/master/README.md
  208 + tbot-devel@googlegroups.com
225 209  
226 210 [3] Example for a first U-Boot TC which should always work:
227 211 (with commandline option "-v" for verbose output):
228   -
229   -hs@localhost:tbot [master] $ python2.7 src/common/tbot.py -c tbot_dxr2.cfg -t tc_ub_setenv.py -v -l log/tbot.log
  212 +hs@localhost:tbot [event-devel] $ python2.7 src/common/tbot.py -c tbot_dxr2.cfg -t tc_ub_setenv.py -v -l log/tbot.log
230 213 **** option cfg: tbot_dxr2.cfg log: log/tbot.log tc: tc_ub_setenv.py v 1
231 214 ('CUR WORK PATH: ', '/home/hs/data/Entwicklung/tbot')
232 215 ('CFGFILE ', 'tbot_dxr2.cfg')
233 216 ('LOGFILE ', '/home/hs/data/Entwicklung/tbot/log/tbot.log')
234   -(<denx.tbot_lab_api object at 0x7f53ac1808d0>, <tbotlib.tbot object at 0x7f53a45fd410>, True)
235   -(<denx.tbot_lab_api object at 0x7f53ac1808d0>, <tbotlib.tbot object at 0x7f53a45fd410>, True)
236   -read 0: Last login: Fri Jan 22 12:20:12 2016 from 87.97.28.177
237   -read 0:
238   -read 0: *************************************************************
239   -read 0: BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET)
240   -read 0: bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250
241   -read 0: bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s
242   -read 0: bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand
243   -read 0: bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos
244   -read 0: bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo
245   -read 0: bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony
246   -read 0: bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3
247   -read 0: bdi98 => - bdi99 => - bdi0 => -
248   -read 0: Please power off unused systems when you leave! Thanks, wd.
249   -read 0: *************************************************************
250   -read no ret 0:
251   -pollux:~ hs $
252   -write 0: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
253   -read 0: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
254   -read 0: hs@pollux [12:21:00] ttbott >
255   -read 1: Last login: Fri Jan 22 12:20:59 2016 from 87.97.28.177
256   -read 1:
257   -read 1: *************************************************************
258   -read 1: BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET)
259   -read 1: bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250
260   -read 1: bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s
261   -read 1: bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand
262   -read 1: bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos
263   -read 1: bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo
264   -read 1: bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony
265   -read 1: bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3
266   -read 1: bdi98 => - bdi99 => - bdi0 => -
267   -read 1: Please power off unused systems when you leave! Thanks, wd.
268   -read 1: *************************************************************
269   -read no ret 1:
270   -pollux:~ hs $
271   -write 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
272   -read 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
273   -read 1: hs@pollux [12:21:02] ttbott >
274   -write 0: remote_power dxr2 -l
275   -read 0: hs@pollux [12:21:00] ttbott >remote_power dxr2 -l
276   -read 0: dxr2 ON
277   -read 0: hs@pollux [12:21:02] ttbott >
278   -read no ret 1:
279   -hs@pollux [12:21:02] ttbott >
280   -write 1: ssh hs@lena
281   -read 1: ssh hs@lena
282   -read no ret 1:
283   -hs@lena's password:
284   -read 1:
285   -read 1: Last login: Fri Jan 22 12:20:17 2016 from 192.168.1.1
286   -read 1:
287   -read no ret 1:
288   -[hs@lena ~]$
289   -write 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
290   -read 1: export PS1="\u@\h [\$(date +%k:%M:%S)] ttbott >"
291   -read 1: hs@lena [12:21:07] ttbott >
292   -read no ret 1:
293   -hs@lena [12:21:07] ttbott >
294   -write 1: stty cols 200
295   -read 1: stty cols 200
296   -read 1: hs@lena [12:21:08] ttbott >
297   -write 1: export TERM=vt200
298   -read 1: hs@lena [12:21:08] ttbott >export TERM=vt200
299   -read 1: hs@lena [12:21:08] ttbott >
300   -write 1: echo $COLUMNS
301   -read 1: hs@lena [12:21:08] ttbott >echo $COLUMNS
302   -read 1: 200
303   -read 1: hs@lena [12:21:08] ttbott >
304   -write 1: kermit
305   -read 1: hs@lena [12:21:08] ttbott >kermit
306   -read 1: C-Kermit 8.0.211, 10 Apr 2004, for Linux
307   -read 1:
308   -read 1: Copyright (C) 1985, 2004,
309   -read 1: Trustees of Columbia University in the City of New York.
310   -read 1: Type ? or HELP for help.
311   -read 1:
312   -read 1: (/home/hs/) C-Kermit>
313   -read 1:
314   -read no ret 1: (/home/hs/) C-Kermit>
315   -write 1: set line /dev/ttyUSB0
316   -read 1: set line /dev/ttyUSB0
317   -read 1:
318   -read 1: (/home/hs/) C-Kermit>
319   -write 1: set speed 115200
320   -read 1:
321   -read 1: (/home/hs/) C-Kermit>set speed 115200
322   -read 1: /dev/ttyUSB0, 115200 bps
323   -read 1:
324   -read 1: (/home/hs/) C-Kermit>
325   -write 1: set flow-control none
326   -read 1:
327   -read 1: (/home/hs/) C-Kermit>set flow-control none
328   -read 1:
329   -read 1: (/home/hs/) C-Kermit>
330   -write 1: set carrier-watch off
331   -read 1:
332   -read 1: (/home/hs/) C-Kermit>set carrier-watch off
333   -read 1:
334   -read 1: (/home/hs/) C-Kermit>
335   -write 1: connect
336   -read 1:
337   -read 1: (/home/hs/) C-Kermit>connect
338   -read 1: Connecting to /dev/ttyUSB0, speed 115200
339   -read 1:
340   -read 1: Escape character: Ctrl-\ (ASCII 28, FS): enabled
341   -read 1:
342   -read 1: Type the escape character followed by C to get back,
343   -read 1:
344   -read 1: or followed by ? to see other options.
345   -read 1:
346   -read 1: ----------------------------------------------------
347   -read no ret 1:
348   -
349   -write no ret 1:
350   -
351   -read 1:
352   -read 1: Heiko=Schocher
353   -read no ret 1:
  217 +tb_ctrl: Last login: Mon Apr 25 14:52:42 2016 from 87.97.29.27
  218 +*************************************************************
  219 +BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET)
  220 +bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250
  221 +bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s
  222 +bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand
  223 +bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos
  224 +bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo
  225 +bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony
  226 +bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3
  227 +bdi98 => - bdi99 => - bdi0 => -
  228 +Please power off unused systems when you leave! Thanks, wd.
  229 +*************************************************************
  230 +tb_ctrl: pollux:~ hs $
  231 +tb_ctrl: export PS1=ttbott
  232 +ttbott
  233 +tb_ctrl: stty cols 200
  234 +ttbott
  235 +tb_ctrl: export TERM=vt200
  236 +ttbott
  237 +tb_ctrl: echo $COLUMNS
  238 +200
  239 +ttbott
  240 +tb_con: Last login: Tue Apr 26 06:28:59 2016 from 87.97.29.27
  241 +*************************************************************
  242 +BDI2000 Assignment: (last updated: 2015-11-20 12:30 MET)
  243 +bdi1 => techem bdi2 => cetec_mx25 bdi3 => lpc3250
  244 +bdi4 => - bdi5 => --Rev.B!-- bdi6 => tqm5200s
  245 +bdi7 => [stefano] bdi8 => smartweb bdi9 => sigmatek-nand
  246 +bdi10 => pcm052 bdi11 => socrates bdi12 => aristainetos
  247 +bdi13 => imx53 bdi14 => ib8315 bdi15 => cairo
  248 +bdi16 => g2c1 bdi17 => lwe090 bdi18 => symphony
  249 +bdi19 => dxr2 bdi20 => ima3-mx6 bdi21 => sama5d3
  250 +bdi98 => - bdi99 => - bdi0 => -
  251 +Please power off unused systems when you leave! Thanks, wd.
  252 +*************************************************************
  253 +tb_con: pollux:~ hs $
  254 +tb_con: export PS1=ttbot
  255 +tb_con: t
  256 +ttbott
  257 +tb_con: stty cols 200
  258 +ttbott
  259 +tb_con: export TERM=vt200
  260 +ttbott
  261 +tb_con: echo $COLUMNS
  262 +200
  263 +ttbott
  264 +tb_con: ssh hs@lena
  265 +tb_con: hs@lena's password:
  266 +tb_con:
  267 +tb_con: Last login: Mon Apr 25 07:03:29 2016 from 192.168.1.1
  268 +tb_con: [hs@lena ~]$
  269 +tb_con: export PS1=ttbott
  270 +ttbott
  271 +tb_con: stty cols 200
  272 +ttbott
  273 +tb_con: export TERM=vt200
  274 +ttbott
  275 +tb_con: echo $COLUMNS
  276 +200
  277 +ttbott
  278 +tb_con: kermit
  279 +C-Kermit 8.0.211, 10 Apr 2004, for Linux
  280 + Copyright (C) 1985, 2004,
  281 + Trustees of Columbia University in the City of New York.
  282 +Type ? or HELP for help.
  283 +(/home/hs/) C-Kermit>
  284 +tb_con: set line /dev/ttyUSB0
  285 +(/home/hs/) C-Kermit>
  286 +tb_con: set speed 115200
  287 +/dev/ttyUSB0, 115200 bps
  288 +(/home/hs/) C-Kermit>
  289 +tb_con: set flow-control none
  290 +(/home/hs/) C-Kermit>
  291 +tb_con: set carrier-watch off
  292 +(/home/hs/) C-Kermit>
  293 +tb_con: connect
  294 +Connecting to /dev/ttyUSB0, speed 115200
  295 + Escape character: Ctrl-\ (ASCII 28, FS): enabled
  296 +Type the escape character followed by C to get back,
  297 +or followed by ? to see other options.
  298 +----------------------------------------------------
  299 +tb_con: <INTERRUPT>
354 300 U-Boot#
355   -write no ret 1:
356   -write no ret 1:
357   -
358   -read 1: <INTERRUPT>
359   -read 1: U-Boot#
360   -write 1: setenv Heiko Schocher
361   -read 1: U-Boot# setenv Heiko Schocher
362   -read no ret 1:
  301 +tb_con: U-Boot#
363 302 U-Boot#
364   -write 1: printenv Heiko
365   -read 1: printenv Heiko
366   -read 1: Heiko=Schocher
367   -read no ret 1:
  303 +tb_con: setenv Heiko Schocher
368 304 U-Boot#
  305 +tb_con: printenv Heiko
  306 +Heiko=Schocher
  307 +U-Boot#
  308 +[('tc_workfd_ssh.py', 1, 0), ('tc_workfd_connect_with_kermit.py', 1, 0), ('tc_ub_setenv.py', 1, 0)]
369 309 End of TBOT: success
370   -hs@localhost:tbot [master] $
  310 +hs@localhost:tbot [event-devel] $