Commit 7fb5dfba06d7338cc1871152708935388d3b80fa
Committed by
Lokesh Vutla
Lokesh Vutla
1 parent
5ba6616130
Exists in
v2016.05-smarct4x
and in
3 other branches
ARM: DRA7: Revise DSP/IVA clock frequency update logic
The commit 539982820939 ("ARM: DRA7: Fixup DSPEVE and IVA clock frequencies based on OPP") only updates the 'assigned-clock-rates' property and expects that the 'assigned-clocks' property is already defined in the existing DTBs. The kernel clock init configuration logic requires both these properties to be defined in a clock node inorder to properly update the clock frequencies. Enhance the current frequency update logic to also add the 'assigned-clocks' property so that the DSPEVE and IVA DPLLs are configured properly even for kernels that do not have the OPP_NOM DPLL clock rate configuration in the DTBs. The additional logic is a no-op for kernels that do use DTBs with corresponding 'assigned-clocks' property. Signed-off-by: Suman Anna <s-anna@ti.com>
Showing 1 changed file with 36 additions and 13 deletions Side-by-side Diff
arch/arm/cpu/armv7/omap5/fdt.c
| ... | ... | @@ -177,14 +177,14 @@ |
| 177 | 177 | #define OPP_IVA_CLK_NUM 2 |
| 178 | 178 | |
| 179 | 179 | const char *dra7_opp_dsp_clk_names[OPP_DSP_CLK_NUM] = { |
| 180 | - "/ocp/l4@4a000000/cm_core_aon@5000/clocks/dpll_dsp_ck", | |
| 181 | - "/ocp/l4@4a000000/cm_core_aon@5000/clocks/dpll_dsp_m2_ck", | |
| 182 | - "/ocp/l4@4a000000/cm_core_aon@5000/clocks/dpll_dsp_m3x2_ck", | |
| 180 | + "dpll_dsp_ck", | |
| 181 | + "dpll_dsp_m2_ck", | |
| 182 | + "dpll_dsp_m3x2_ck", | |
| 183 | 183 | }; |
| 184 | 184 | |
| 185 | 185 | const char *dra7_opp_iva_clk_names[OPP_IVA_CLK_NUM] = { |
| 186 | - "/ocp/l4@4a000000/cm_core_aon@5000/clocks/dpll_iva_ck", | |
| 187 | - "/ocp/l4@4a000000/cm_core_aon@5000/clocks/dpll_iva_m2_ck", | |
| 186 | + "dpll_iva_ck", | |
| 187 | + "dpll_iva_m2_ck", | |
| 188 | 188 | }; |
| 189 | 189 | |
| 190 | 190 | /* DSPEVE voltage domain */ |
| 191 | 191 | |
| 192 | 192 | |
| 193 | 193 | |
| 194 | 194 | |
| 195 | 195 | |
| ... | ... | @@ -217,23 +217,46 @@ |
| 217 | 217 | }; |
| 218 | 218 | #endif |
| 219 | 219 | |
| 220 | -static int ft_fixup_clocks(void *fdt, const char **paths, u32 *rates, int num) | |
| 220 | +static int ft_fixup_clocks(void *fdt, const char **names, u32 *rates, int num) | |
| 221 | 221 | { |
| 222 | - int offs, ret, i; | |
| 222 | + int offs, node_offs, ret, i; | |
| 223 | + uint32_t phandle; | |
| 223 | 224 | |
| 225 | + offs = fdt_path_offset(fdt, "/ocp/l4@4a000000/cm_core_aon@5000/clocks"); | |
| 226 | + if (offs < 0) { | |
| 227 | + debug("Could not find cm_core_aon clocks node path offset : %s\n", | |
| 228 | + fdt_strerror(offs)); | |
| 229 | + return offs; | |
| 230 | + } | |
| 231 | + | |
| 224 | 232 | for (i = 0; i < num; i++) { |
| 225 | - offs = fdt_path_offset(fdt, paths[i]); | |
| 226 | - if (offs < 0) { | |
| 227 | - debug("Could not find node path offset %s: %s\n", | |
| 228 | - paths[i], fdt_strerror(offs)); | |
| 233 | + node_offs = fdt_subnode_offset(fdt, offs, names[i]); | |
| 234 | + if (node_offs < 0) { | |
| 235 | + debug("Could not find clock sub-node %s: %s\n", | |
| 236 | + names[i], fdt_strerror(node_offs)); | |
| 229 | 237 | return offs; |
| 230 | 238 | } |
| 231 | 239 | |
| 232 | - ret = fdt_setprop_u32(fdt, offs, "assigned-clock-rates", | |
| 240 | + phandle = fdt_get_phandle(fdt, node_offs); | |
| 241 | + if (!phandle) { | |
| 242 | + debug("Could not find phandle for clock %s\n", | |
| 243 | + names[i]); | |
| 244 | + return -1; | |
| 245 | + } | |
| 246 | + | |
| 247 | + ret = fdt_setprop_u32(fdt, node_offs, "assigned-clocks", | |
| 248 | + phandle); | |
| 249 | + if (ret < 0) { | |
| 250 | + debug("Could not add assigned-clocks property to clock node %s: %s\n", | |
| 251 | + names[i], fdt_strerror(ret)); | |
| 252 | + return ret; | |
| 253 | + } | |
| 254 | + | |
| 255 | + ret = fdt_setprop_u32(fdt, node_offs, "assigned-clock-rates", | |
| 233 | 256 | rates[i]); |
| 234 | 257 | if (ret < 0) { |
| 235 | 258 | debug("Could not add assigned-clock-rates property to clock node %s: %s\n", |
| 236 | - paths[i], fdt_strerror(ret)); | |
| 259 | + names[i], fdt_strerror(ret)); | |
| 237 | 260 | return ret; |
| 238 | 261 | } |
| 239 | 262 | } |