Commit 68128e0a86810c9ea9bebcb69451aeabfd44c491

Authored by pekon gupta
Committed by Tom Rini
1 parent b80a660338

omap3: remove remnant macros GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT

OMAP3 used GPMC_NAND_ECC_LP_x8_LAYOUT and GPMC_NAND_ECC_LP_x16_LAYOUT macros
to configure GPMC controller for x7 or x8 bit device connected to its interface.
Now this information is encoded in CONFIG_SYS_NAND_DEVICE_WIDTH macro, so above
macros can be completely removed.

Signed-off-by: Pekon Gupta <pekon@ti.com>

Showing 8 changed files with 6 additions and 31 deletions Side-by-side Diff

arch/arm/cpu/armv7/omap3/mem.c
... ... @@ -21,18 +21,7 @@
21 21 struct gpmc *gpmc_cfg;
22 22  
23 23 #if defined(CONFIG_CMD_NAND)
24   -#if defined(GPMC_NAND_ECC_SP_x8_LAYOUT) || defined(GPMC_NAND_ECC_LP_x8_LAYOUT)
25 24 static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
26   - SMNAND_GPMC_CONFIG1,
27   - SMNAND_GPMC_CONFIG2,
28   - SMNAND_GPMC_CONFIG3,
29   - SMNAND_GPMC_CONFIG4,
30   - SMNAND_GPMC_CONFIG5,
31   - SMNAND_GPMC_CONFIG6,
32   - 0,
33   -};
34   -#else
35   -static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
36 25 M_NAND_GPMC_CONFIG1,
37 26 M_NAND_GPMC_CONFIG2,
38 27 M_NAND_GPMC_CONFIG3,
... ... @@ -40,7 +29,6 @@
40 29 M_NAND_GPMC_CONFIG5,
41 30 M_NAND_GPMC_CONFIG6, 0
42 31 };
43   -#endif
44 32 #endif /* CONFIG_CMD_NAND */
45 33  
46 34 #if defined(CONFIG_CMD_ONENAND)
arch/arm/include/asm/arch-omap3/mem.h
... ... @@ -354,14 +354,6 @@
354 354  
355 355 #define GPMC_CS_ENABLE 0x1
356 356  
357   -#define SMNAND_GPMC_CONFIG1 0x00000800
358   -#define SMNAND_GPMC_CONFIG2 0x00141400
359   -#define SMNAND_GPMC_CONFIG3 0x00141400
360   -#define SMNAND_GPMC_CONFIG4 0x0F010F01
361   -#define SMNAND_GPMC_CONFIG5 0x010C1414
362   -#define SMNAND_GPMC_CONFIG6 0x1F0F0A80
363   -#define SMNAND_GPMC_CONFIG7 0x00000C44
364   -
365 357 #define M_NAND_GPMC_CONFIG1 0x00001800
366 358 #define M_NAND_GPMC_CONFIG2 0x00141400
367 359 #define M_NAND_GPMC_CONFIG3 0x00141400
board/compulab/cm_t35/cm_t35.c
... ... @@ -54,12 +54,12 @@
54 54 };
55 55  
56 56 static u32 gpmc_nand_config[GPMC_MAX_REG] = {
57   - SMNAND_GPMC_CONFIG1,
58   - SMNAND_GPMC_CONFIG2,
59   - SMNAND_GPMC_CONFIG3,
60   - SMNAND_GPMC_CONFIG4,
61   - SMNAND_GPMC_CONFIG5,
62   - SMNAND_GPMC_CONFIG6,
  57 + M_NAND_GPMC_CONFIG1,
  58 + M_NAND_GPMC_CONFIG2,
  59 + M_NAND_GPMC_CONFIG3,
  60 + M_NAND_GPMC_CONFIG4,
  61 + M_NAND_GPMC_CONFIG5,
  62 + M_NAND_GPMC_CONFIG6,
63 63 0,
64 64 };
65 65  
include/configs/cm_t335.h
... ... @@ -141,7 +141,6 @@
141 141 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
142 142  
143 143 #define CONFIG_CMD_NAND
144   -#define GPMC_NAND_ECC_LP_x8_LAYOUT
145 144 #define MTDIDS_DEFAULT "nand0=nand"
146 145 #define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \
147 146 "1m(u-boot),1m(u-boot-env)," \
include/configs/cm_t35.h
... ... @@ -158,7 +158,6 @@
158 158 /* CS0 */
159 159 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
160 160 /* devices */
161   -#define GPMC_NAND_ECC_LP_x8_LAYOUT
162 161  
163 162 /* Environment information */
164 163 #define CONFIG_BOOTDELAY 3
include/configs/pengwyn.h
... ... @@ -149,7 +149,6 @@
149 149 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
150 150 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
151 151  
152   -#define GPMC_NAND_ECC_LP_x8_LAYOUT 1
153 152 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
154 153 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \
155 154 "128k(SPL.backup1)," \
include/configs/tao3530.h
... ... @@ -137,7 +137,6 @@
137 137 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
138 138 /* to access nand at */
139 139 /* CS0 */
140   -#define GPMC_NAND_ECC_LP_x16_LAYOUT
141 140  
142 141 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
143 142 /* devices */
include/configs/tseries.h
... ... @@ -157,7 +157,6 @@
157 157 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
158 158 #define CONFIG_NAND_OMAP_ELM
159 159 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
160   -#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
161 160 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
162 161 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
163 162 #define CONFIG_SYS_NAND_PAGE_SIZE 2048