pxa: move i2c driver to the common place

For better sharing with other platform other than pxa's, it is more convenient to put the driver to the common place. Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Lei Wen <leiwen@marvell.com>

pxa: move i2c driver to the common place
For better sharing with other platform other than pxa's, it is more convenient to put the driver to the common place. Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Lei Wen <leiwen@marvell.com>
Lei Wen · Albert ARIBAUD
1 parent 776784908c
Showing 6 changed files with 455 additions and 470 deletions Side-by-side Diff
arch/arm/cpu/pxa/Makefile
arch/arm/cpu/pxa/i2c.c
drivers/i2c/Makefile
drivers/i2c/mv_i2c.c
include/configs/innokom.h
include/configs/xm250.h
@@ -28,7 +28,6 @@
 START	= start.o
  
 COBJS	+= cpu.o
-COBJS	+= i2c.o
 COBJS	+= pxafb.o
 COBJS	+= timer.o
 COBJS	+= usb.o
-/*
- * (C) Copyright 2000
- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
- *
- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2003 Pengutronix e.K.
- * Robert Schwebel <r.schwebel@pengutronix.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Back ported to the 8xx platform (from the 8260 platform) by
- * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
- */
-
-/* FIXME: this file is PXA255 specific! What about other XScales? */
-
-#include <common.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_HARD_I2C
-
-/*
- *	- CONFIG_SYS_I2C_SPEED
- *	- I2C_PXA_SLAVE_ADDR
- */
-
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa-regs.h>
-#include <i2c.h>
-
-/*#define	DEBUG_I2C	1	/###* activate local debugging output  */
-#define I2C_PXA_SLAVE_ADDR	0x1	/* slave pxa unit address           */
-
-#if (CONFIG_SYS_I2C_SPEED == 400000)
-#define I2C_ICR_INIT	(ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-#else
-#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-#endif
-
-#define I2C_ISR_INIT		0x7FF
-
-#ifdef DEBUG_I2C
-#define PRINTD(x) printf x
-#else
-#define PRINTD(x)
-#endif
-
-
-/* Shall the current transfer have a start/stop condition? */
-#define I2C_COND_NORMAL		0
-#define I2C_COND_START		1
-#define I2C_COND_STOP		2
-
-/* Shall the current transfer be ack/nacked or being waited for it? */
-#define I2C_ACKNAK_WAITACK	1
-#define I2C_ACKNAK_SENDACK	2
-#define I2C_ACKNAK_SENDNAK	4
-
-/* Specify who shall transfer the data (master or slave) */
-#define I2C_READ		0
-#define I2C_WRITE		1
-
-/* All transfers are described by this data structure */
-struct i2c_msg {
-	u8 condition;
-	u8 acknack;
-	u8 direction;
-	u8 data;
-};
-
-
-/**
- * i2c_pxa_reset: - reset the host controller
- *
- */
-
-static void i2c_reset( void )
-{
-	writel(readl(ICR) & ~ICR_IUE, ICR);	/* disable unit */
-	writel(readl(ICR) | ICR_UR, ICR);	/* reset the unit */
-	udelay(100);
-	writel(readl(ICR) & ~ICR_IUE, ICR);	/* disable unit */
-#ifdef CONFIG_CPU_MONAHANS
-	/* | CKENB_1_PWM1 | CKENB_0_PWM0); */
-	writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
-#else /* CONFIG_CPU_MONAHANS */
-	/* set the global I2C clock on */
-	writel(readl(CKEN) | CKEN14_I2C, CKEN);
-#endif
-	writel(I2C_PXA_SLAVE_ADDR, ISAR);	/* set our slave address */
-	writel(I2C_ICR_INIT, ICR);		/* set control reg values */
-	writel(I2C_ISR_INIT, ISR);		/* set clear interrupt bits */
-	writel(readl(ICR) | ICR_IUE, ICR);	/* enable unit */
-	udelay(100);
-}
-
-
-/**
- * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
- *	                  are set and cleared
- *
- * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
- */
-static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
-{
-	int timeout = 10000;
-
-	while( ((ISR & set_mask)!=set_mask) || ((ISR & cleared_mask)!=0) ){
-		udelay( 10 );
-		if( timeout-- < 0 ) return 0;
-	}
-
-	return 1;
-}
-
-
-/**
- * i2c_transfer: - Transfer one byte over the i2c bus
- *
- * This function can tranfer a byte over the i2c bus in both directions.
- * It is used by the public API functions.
- *
- * @return:  0: transfer successful
- *          -1: message is empty
- *          -2: transmit timeout
- *          -3: ACK missing
- *          -4: receive timeout
- *          -5: illegal parameters
- *          -6: bus is busy and couldn't be aquired
- */
-int i2c_transfer(struct i2c_msg *msg)
-{
-	int ret;
-
-	if (!msg)
-		goto transfer_error_msg_empty;
-
-	switch(msg->direction) {
-
-	case I2C_WRITE:
-
-		/* check if bus is not busy */
-		if (!i2c_isr_set_cleared(0,ISR_IBB))
-			goto transfer_error_bus_busy;
-
-		/* start transmission */
-		writel(readl(ICR) & ~ICR_START, ICR);
-		writel(readl(ICR) & ~ICR_STOP, ICR);
-		writel(msg->data, IDBR);
-		if (msg->condition == I2C_COND_START)
-			writel(readl(ICR) | ICR_START, ICR);
-		if (msg->condition == I2C_COND_STOP)
-			writel(readl(ICR) | ICR_STOP, ICR);
-		if (msg->acknack == I2C_ACKNAK_SENDNAK)
-			writel(readl(ICR) | ICR_ACKNAK, ICR);
-		if (msg->acknack == I2C_ACKNAK_SENDACK)
-			writel(readl(ICR) & ~ICR_ACKNAK, ICR);
-		writel(readl(ICR) & ~ICR_ALDIE, ICR);
-		writel(readl(ICR) | ICR_TB, ICR);
-
-		/* transmit register empty? */
-		if (!i2c_isr_set_cleared(ISR_ITE,0))
-			goto transfer_error_transmit_timeout;
-
-		/* clear 'transmit empty' state */
-		writel(readl(ISR) | ISR_ITE, ISR);
-
-		/* wait for ACK from slave */
-		if (msg->acknack == I2C_ACKNAK_WAITACK)
-			if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
-				goto transfer_error_ack_missing;
-		break;
-
-	case I2C_READ:
-
-		/* check if bus is not busy */
-		if (!i2c_isr_set_cleared(0,ISR_IBB))
-			goto transfer_error_bus_busy;
-
-		/* start receive */
-		writel(readl(ICR) & ~ICR_START, ICR);
-		writel(readl(ICR) & ~ICR_STOP, ICR);
-		if (msg->condition == I2C_COND_START)
-			writel(readl(ICR) | ICR_START, ICR);
-		if (msg->condition == I2C_COND_STOP)
-			writel(readl(ICR) | ICR_STOP, ICR);
-		if (msg->acknack == I2C_ACKNAK_SENDNAK)
-			writel(readl(ICR) | ICR_ACKNAK, ICR);
-		if (msg->acknack == I2C_ACKNAK_SENDACK)
-			writel(readl(ICR) & ~ICR_ACKNAK, ICR);
-		writel(readl(ICR) & ~ICR_ALDIE, ICR);
-		writel(readl(ICR) | ICR_TB, ICR);
-
-		/* receive register full? */
-		if (!i2c_isr_set_cleared(ISR_IRF,0))
-			goto transfer_error_receive_timeout;
-
-		msg->data = readl(IDBR);
-
-		/* clear 'receive empty' state */
-		writel(readl(ISR) | ISR_IRF, ISR);
-
-		break;
-
-	default:
-
-		goto transfer_error_illegal_param;
-
-	}
-
-	return 0;
-
-transfer_error_msg_empty:
-		PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
-		ret = -1; goto i2c_transfer_finish;
-
-transfer_error_transmit_timeout:
-		PRINTD(("i2c_transfer: error: transmit timeout\n"));
-		ret = -2; goto i2c_transfer_finish;
-
-transfer_error_ack_missing:
-		PRINTD(("i2c_transfer: error: ACK missing\n"));
-		ret = -3; goto i2c_transfer_finish;
-
-transfer_error_receive_timeout:
-		PRINTD(("i2c_transfer: error: receive timeout\n"));
-		ret = -4; goto i2c_transfer_finish;
-
-transfer_error_illegal_param:
-		PRINTD(("i2c_transfer: error: illegal parameters\n"));
-		ret = -5; goto i2c_transfer_finish;
-
-transfer_error_bus_busy:
-		PRINTD(("i2c_transfer: error: bus is busy\n"));
-		ret = -6; goto i2c_transfer_finish;
-
-i2c_transfer_finish:
-		PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR));
-		i2c_reset();
-		return ret;
-
-}
-
-/* ------------------------------------------------------------------------ */
-/* API Functions                                                            */
-/* ------------------------------------------------------------------------ */
-
-void i2c_init(int speed, int slaveaddr)
-{
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-	/* call board specific i2c bus reset routine before accessing the   */
-	/* environment, which might be in a chip on that bus. For details   */
-	/* about this problem see doc/I2C_Edge_Conditions.                  */
-	i2c_init_board();
-#endif
-}
-
-
-/**
- * i2c_probe: - Test if a chip answers for a given i2c address
- *
- * @chip:	address of the chip which is searched for
- * @return:	0 if a chip was found, -1 otherwhise
- */
-
-int i2c_probe(uchar chip)
-{
-	struct i2c_msg msg;
-
-	i2c_reset();
-
-	msg.condition = I2C_COND_START;
-	msg.acknack   = I2C_ACKNAK_WAITACK;
-	msg.direction = I2C_WRITE;
-	msg.data      = (chip << 1) + 1;
-	if (i2c_transfer(&msg)) return -1;
-
-	msg.condition = I2C_COND_STOP;
-	msg.acknack   = I2C_ACKNAK_SENDNAK;
-	msg.direction = I2C_READ;
-	msg.data      = 0x00;
-	if (i2c_transfer(&msg)) return -1;
-
-	return 0;
-}
-
-
-/**
- * i2c_read: - Read multiple bytes from an i2c device
- *
- * The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
- *
- * @chip:	address of the chip which is to be read
- * @addr:	i2c data address within the chip
- * @alen:	length of the i2c data address (1..2 bytes)
- * @buffer:	where to write the data
- * @len:	how much byte do we want to read
- * @return:	0 in case of success
- */
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-	struct i2c_msg msg;
-	u8 addr_bytes[3]; /* lowest...highest byte of data address */
-	int ret;
-
-	PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
-
-	i2c_reset();
-
-	/* dummy chip address write */
-	PRINTD(("i2c_read: dummy chip address write\n"));
-	msg.condition = I2C_COND_START;
-	msg.acknack   = I2C_ACKNAK_WAITACK;
-	msg.direction = I2C_WRITE;
-	msg.data      = (chip << 1);
-	msg.data     &= 0xFE;
-	if ((ret=i2c_transfer(&msg))) return -1;
-
-	/*
-	 * send memory address bytes;
-	 * alen defines how much bytes we have to send.
-	 */
-	/*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
-	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
-	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
-	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
-
-	while (--alen >= 0) {
-
-		PRINTD(("i2c_read: send memory word address byte %1d\n",alen));
-		msg.condition = I2C_COND_NORMAL;
-		msg.acknack   = I2C_ACKNAK_WAITACK;
-		msg.direction = I2C_WRITE;
-		msg.data      = addr_bytes[alen];
-		if ((ret=i2c_transfer(&msg))) return -1;
-	}
-
-
-	/* start read sequence */
-	PRINTD(("i2c_read: start read sequence\n"));
-	msg.condition = I2C_COND_START;
-	msg.acknack   = I2C_ACKNAK_WAITACK;
-	msg.direction = I2C_WRITE;
-	msg.data      = (chip << 1);
-	msg.data     |= 0x01;
-	if ((ret=i2c_transfer(&msg))) return -1;
-
-	/* read bytes; send NACK at last byte */
-	while (len--) {
-
-		if (len==0) {
-			msg.condition = I2C_COND_STOP;
-			msg.acknack   = I2C_ACKNAK_SENDNAK;
-		} else {
-			msg.condition = I2C_COND_NORMAL;
-			msg.acknack   = I2C_ACKNAK_SENDACK;
-		}
-
-		msg.direction = I2C_READ;
-		msg.data      = 0x00;
-		if ((ret=i2c_transfer(&msg))) return -1;
-
-		*buffer = msg.data;
-		PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
-		buffer++;
-
-	}
-
-	i2c_reset();
-
-	return 0;
-}
-
-
-/**
- * i2c_write: -  Write multiple bytes to an i2c device
- *
- * The higher level routines take into account that this function is only
- * called with len < page length of the device (see configuration file)
- *
- * @chip:	address of the chip which is to be written
- * @addr:	i2c data address within the chip
- * @alen:	length of the i2c data address (1..2 bytes)
- * @buffer:	where to find the data to be written
- * @len:	how much byte do we want to read
- * @return:	0 in case of success
- */
-
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
-{
-	struct i2c_msg msg;
-	u8 addr_bytes[3]; /* lowest...highest byte of data address */
-
-	PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
-
-	i2c_reset();
-
-	/* chip address write */
-	PRINTD(("i2c_write: chip address write\n"));
-	msg.condition = I2C_COND_START;
-	msg.acknack   = I2C_ACKNAK_WAITACK;
-	msg.direction = I2C_WRITE;
-	msg.data      = (chip << 1);
-	msg.data     &= 0xFE;
-	if (i2c_transfer(&msg)) return -1;
-
-	/*
-	 * send memory address bytes;
-	 * alen defines how much bytes we have to send.
-	 */
-	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
-	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
-	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
-
-	while (--alen >= 0) {
-
-		PRINTD(("i2c_write: send memory word address\n"));
-		msg.condition = I2C_COND_NORMAL;
-		msg.acknack   = I2C_ACKNAK_WAITACK;
-		msg.direction = I2C_WRITE;
-		msg.data      = addr_bytes[alen];
-		if (i2c_transfer(&msg)) return -1;
-	}
-
-	/* write bytes; send NACK at last byte */
-	while (len--) {
-
-		PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
-
-		if (len==0)
-			msg.condition = I2C_COND_STOP;
-		else
-			msg.condition = I2C_COND_NORMAL;
-
-		msg.acknack   = I2C_ACKNAK_WAITACK;
-		msg.direction = I2C_WRITE;
-		msg.data      = *(buffer++);
-
-		if (i2c_transfer(&msg)) return -1;
-
-	}
-
-	i2c_reset();
-
-	return 0;
-
-}
-
-#endif	/* CONFIG_HARD_I2C */
@@ -29,6 +29,7 @@
 COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
 COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
 COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
+COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
 COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
+/*
+ * (C) Copyright 2000
+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
+ *
+ * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2003 Pengutronix e.K.
+ * Robert Schwebel <r.schwebel@pengutronix.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Back ported to the 8xx platform (from the 8260 platform) by
+ * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_HARD_I2C
+
+/*
+ *	- CONFIG_SYS_I2C_SPEED
+ *	- I2C_PXA_SLAVE_ADDR
+ */
+
+#include <asm/arch/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <i2c.h>
+
+#if (CONFIG_SYS_I2C_SPEED == 400000)
+#define I2C_ICR_INIT	(ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD \
+			| ICR_SCLE)
+#else
+#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
+#endif
+
+#define I2C_ISR_INIT		0x7FF
+
+#ifdef DEBUG_I2C
+#define PRINTD(x) printf x
+#else
+#define PRINTD(x)
+#endif
+
+/* Shall the current transfer have a start/stop condition? */
+#define I2C_COND_NORMAL		0
+#define I2C_COND_START		1
+#define I2C_COND_STOP		2
+
+/* Shall the current transfer be ack/nacked or being waited for it? */
+#define I2C_ACKNAK_WAITACK	1
+#define I2C_ACKNAK_SENDACK	2
+#define I2C_ACKNAK_SENDNAK	4
+
+/* Specify who shall transfer the data (master or slave) */
+#define I2C_READ		0
+#define I2C_WRITE		1
+
+/* All transfers are described by this data structure */
+struct i2c_msg {
+	u8 condition;
+	u8 acknack;
+	u8 direction;
+	u8 data;
+};
+
+/*
+ * i2c_pxa_reset: - reset the host controller
+ *
+ */
+static void i2c_reset(void)
+{
+	writel(readl(ICR) & ~ICR_IUE, ICR);	/* disable unit */
+	writel(readl(ICR) | ICR_UR, ICR);	/* reset the unit */
+	udelay(100);
+	writel(readl(ICR) & ~ICR_IUE, ICR);	/* disable unit */
+#ifdef CONFIG_CPU_MONAHANS
+	/* | CKENB_1_PWM1 | CKENB_0_PWM0); */
+	writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
+#else /* CONFIG_CPU_MONAHANS */
+	/* set the global I2C clock on */
+	writel(readl(CKEN) | CKEN14_I2C, CKEN);
+#endif
+	writel(I2C_PXA_SLAVE_ADDR, ISAR);	/* set our slave address */
+	writel(I2C_ICR_INIT, ICR);		/* set control reg values */
+	writel(I2C_ISR_INIT, ISR);		/* set clear interrupt bits */
+	writel(readl(ICR) | ICR_IUE, ICR);	/* enable unit */
+	udelay(100);
+}
+
+/*
+ * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
+ *	                  are set and cleared
+ *
+ * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
+ */
+static int i2c_isr_set_cleared(unsigned long set_mask,
+			       unsigned long cleared_mask)
+{
+	int timeout = 10000;
+
+	while (((ISR & set_mask) != set_mask) || ((ISR & cleared_mask) != 0)) {
+		udelay(10);
+		if (timeout-- < 0)
+			return 0;
+	}
+
+	return 1;
+}
+
+/*
+ * i2c_transfer: - Transfer one byte over the i2c bus
+ *
+ * This function can tranfer a byte over the i2c bus in both directions.
+ * It is used by the public API functions.
+ *
+ * @return:  0: transfer successful
+ *          -1: message is empty
+ *          -2: transmit timeout
+ *          -3: ACK missing
+ *          -4: receive timeout
+ *          -5: illegal parameters
+ *          -6: bus is busy and couldn't be aquired
+ */
+int i2c_transfer(struct i2c_msg *msg)
+{
+	int ret;
+
+	if (!msg)
+		goto transfer_error_msg_empty;
+
+	switch (msg->direction) {
+	case I2C_WRITE:
+		/* check if bus is not busy */
+		if (!i2c_isr_set_cleared(0, ISR_IBB))
+			goto transfer_error_bus_busy;
+
+		/* start transmission */
+		writel(readl(ICR) & ~ICR_START, ICR);
+		writel(readl(ICR) & ~ICR_STOP, ICR);
+		writel(msg->data, IDBR);
+		if (msg->condition == I2C_COND_START)
+			writel(readl(ICR) | ICR_START, ICR);
+		if (msg->condition == I2C_COND_STOP)
+			writel(readl(ICR) | ICR_STOP, ICR);
+		if (msg->acknack == I2C_ACKNAK_SENDNAK)
+			writel(readl(ICR) | ICR_ACKNAK, ICR);
+		if (msg->acknack == I2C_ACKNAK_SENDACK)
+			writel(readl(ICR) & ~ICR_ACKNAK, ICR);
+		writel(readl(ICR) & ~ICR_ALDIE, ICR);
+		writel(readl(ICR) | ICR_TB, ICR);
+
+		/* transmit register empty? */
+		if (!i2c_isr_set_cleared(ISR_ITE, 0))
+			goto transfer_error_transmit_timeout;
+
+		/* clear 'transmit empty' state */
+		writel(readl(ISR) | ISR_ITE, ISR);
+
+		/* wait for ACK from slave */
+		if (msg->acknack == I2C_ACKNAK_WAITACK)
+			if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
+				goto transfer_error_ack_missing;
+		break;
+
+	case I2C_READ:
+
+		/* check if bus is not busy */
+		if (!i2c_isr_set_cleared(0, ISR_IBB))
+			goto transfer_error_bus_busy;
+
+		/* start receive */
+		writel(readl(ICR) & ~ICR_START, ICR);
+		writel(readl(ICR) & ~ICR_STOP, ICR);
+		if (msg->condition == I2C_COND_START)
+			writel(readl(ICR) | ICR_START, ICR);
+		if (msg->condition == I2C_COND_STOP)
+			writel(readl(ICR) | ICR_STOP, ICR);
+		if (msg->acknack == I2C_ACKNAK_SENDNAK)
+			writel(readl(ICR) | ICR_ACKNAK, ICR);
+		if (msg->acknack == I2C_ACKNAK_SENDACK)
+			writel(readl(ICR) & ~ICR_ACKNAK, ICR);
+		writel(readl(ICR) & ~ICR_ALDIE, ICR);
+		writel(readl(ICR) | ICR_TB, ICR);
+
+		/* receive register full? */
+		if (!i2c_isr_set_cleared(ISR_IRF, 0))
+			goto transfer_error_receive_timeout;
+
+		msg->data = readl(IDBR);
+
+		/* clear 'receive empty' state */
+		writel(readl(ISR) | ISR_IRF, ISR);
+
+		break;
+	default:
+		goto transfer_error_illegal_param;
+	}
+
+	return 0;
+
+transfer_error_msg_empty:
+		PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
+		ret = -1; goto i2c_transfer_finish;
+
+transfer_error_transmit_timeout:
+		PRINTD(("i2c_transfer: error: transmit timeout\n"));
+		ret = -2; goto i2c_transfer_finish;
+
+transfer_error_ack_missing:
+		PRINTD(("i2c_transfer: error: ACK missing\n"));
+		ret = -3; goto i2c_transfer_finish;
+
+transfer_error_receive_timeout:
+		PRINTD(("i2c_transfer: error: receive timeout\n"));
+		ret = -4; goto i2c_transfer_finish;
+
+transfer_error_illegal_param:
+		PRINTD(("i2c_transfer: error: illegal parameters\n"));
+		ret = -5; goto i2c_transfer_finish;
+
+transfer_error_bus_busy:
+		PRINTD(("i2c_transfer: error: bus is busy\n"));
+		ret = -6; goto i2c_transfer_finish;
+
+i2c_transfer_finish:
+		PRINTD(("i2c_transfer: ISR: 0x%04x\n", ISR));
+		i2c_reset();
+		return ret;
+}
+
+/* ------------------------------------------------------------------------ */
+/* API Functions                                                            */
+/* ------------------------------------------------------------------------ */
+void i2c_init(int speed, int slaveaddr)
+{
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+	/* call board specific i2c bus reset routine before accessing the   */
+	/* environment, which might be in a chip on that bus. For details   */
+	/* about this problem see doc/I2C_Edge_Conditions.                  */
+	i2c_init_board();
+#endif
+}
+
+/*
+ * i2c_probe: - Test if a chip answers for a given i2c address
+ *
+ * @chip:	address of the chip which is searched for
+ * @return:	0 if a chip was found, -1 otherwhise
+ */
+int i2c_probe(uchar chip)
+{
+	struct i2c_msg msg;
+
+	i2c_reset();
+
+	msg.condition = I2C_COND_START;
+	msg.acknack   = I2C_ACKNAK_WAITACK;
+	msg.direction = I2C_WRITE;
+	msg.data      = (chip << 1) + 1;
+	if (i2c_transfer(&msg))
+		return -1;
+
+	msg.condition = I2C_COND_STOP;
+	msg.acknack   = I2C_ACKNAK_SENDNAK;
+	msg.direction = I2C_READ;
+	msg.data      = 0x00;
+	if (i2c_transfer(&msg))
+		return -1;
+
+	return 0;
+}
+
+/*
+ * i2c_read: - Read multiple bytes from an i2c device
+ *
+ * The higher level routines take into account that this function is only
+ * called with len < page length of the device (see configuration file)
+ *
+ * @chip:	address of the chip which is to be read
+ * @addr:	i2c data address within the chip
+ * @alen:	length of the i2c data address (1..2 bytes)
+ * @buffer:	where to write the data
+ * @len:	how much byte do we want to read
+ * @return:	0 in case of success
+ */
+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+	struct i2c_msg msg;
+	u8 addr_bytes[3]; /* lowest...highest byte of data address */
+
+	PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
+		"len=0x%02x)\n", chip, addr, alen, len));
+
+	i2c_reset();
+
+	/* dummy chip address write */
+	PRINTD(("i2c_read: dummy chip address write\n"));
+	msg.condition = I2C_COND_START;
+	msg.acknack   = I2C_ACKNAK_WAITACK;
+	msg.direction = I2C_WRITE;
+	msg.data = (chip << 1);
+	msg.data &= 0xFE;
+	if (i2c_transfer(&msg))
+		return -1;
+
+	/*
+	 * send memory address bytes;
+	 * alen defines how much bytes we have to send.
+	 */
+	/*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
+	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
+	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
+	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
+
+	while (--alen >= 0) {
+		PRINTD(("i2c_read: send memory word address byte %1d\n", alen));
+		msg.condition = I2C_COND_NORMAL;
+		msg.acknack   = I2C_ACKNAK_WAITACK;
+		msg.direction = I2C_WRITE;
+		msg.data      = addr_bytes[alen];
+		if (i2c_transfer(&msg))
+			return -1;
+	}
+
+	/* start read sequence */
+	PRINTD(("i2c_read: start read sequence\n"));
+	msg.condition = I2C_COND_START;
+	msg.acknack   = I2C_ACKNAK_WAITACK;
+	msg.direction = I2C_WRITE;
+	msg.data      = (chip << 1);
+	msg.data     |= 0x01;
+	if (i2c_transfer(&msg))
+		return -1;
+
+	/* read bytes; send NACK at last byte */
+	while (len--) {
+		if (len == 0) {
+			msg.condition = I2C_COND_STOP;
+			msg.acknack   = I2C_ACKNAK_SENDNAK;
+		} else {
+			msg.condition = I2C_COND_NORMAL;
+			msg.acknack   = I2C_ACKNAK_SENDACK;
+		}
+
+		msg.direction = I2C_READ;
+		msg.data      = 0x00;
+		if (i2c_transfer(&msg))
+			return -1;
+
+		*buffer = msg.data;
+		PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",
+			(unsigned int)buffer, *buffer));
+		buffer++;
+	}
+
+	i2c_reset();
+
+	return 0;
+}
+
+/*
+ * i2c_write: -  Write multiple bytes to an i2c device
+ *
+ * The higher level routines take into account that this function is only
+ * called with len < page length of the device (see configuration file)
+ *
+ * @chip:	address of the chip which is to be written
+ * @addr:	i2c data address within the chip
+ * @alen:	length of the i2c data address (1..2 bytes)
+ * @buffer:	where to find the data to be written
+ * @len:	how much byte do we want to read
+ * @return:	0 in case of success
+ */
+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+{
+	struct i2c_msg msg;
+	u8 addr_bytes[3]; /* lowest...highest byte of data address */
+
+	PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
+		"len=0x%02x)\n", chip, addr, alen, len));
+
+	i2c_reset();
+
+	/* chip address write */
+	PRINTD(("i2c_write: chip address write\n"));
+	msg.condition = I2C_COND_START;
+	msg.acknack   = I2C_ACKNAK_WAITACK;
+	msg.direction = I2C_WRITE;
+	msg.data = (chip << 1);
+	msg.data &= 0xFE;
+	if (i2c_transfer(&msg))
+		return -1;
+
+	/*
+	 * send memory address bytes;
+	 * alen defines how much bytes we have to send.
+	 */
+	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
+	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
+	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
+
+	while (--alen >= 0) {
+		PRINTD(("i2c_write: send memory word address\n"));
+		msg.condition = I2C_COND_NORMAL;
+		msg.acknack   = I2C_ACKNAK_WAITACK;
+		msg.direction = I2C_WRITE;
+		msg.data      = addr_bytes[alen];
+		if (i2c_transfer(&msg))
+			return -1;
+	}
+
+	/* write bytes; send NACK at last byte */
+	while (len--) {
+		PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",
+			(unsigned int)buffer, *buffer));
+
+		if (len == 0)
+			msg.condition = I2C_COND_STOP;
+		else
+			msg.condition = I2C_COND_NORMAL;
+
+		msg.acknack   = I2C_ACKNAK_WAITACK;
+		msg.direction = I2C_WRITE;
+		msg.data      = *(buffer++);
+
+		if (i2c_transfer(&msg))
+			return -1;
+	}
+
+	i2c_reset();
+
+	return 0;
+}
+#endif	/* CONFIG_HARD_I2C */
@@ -140,6 +140,7 @@
 /*
  * I2C bus
  */
+#define CONFIG_I2C_MV			1
 #define CONFIG_HARD_I2C			1
 #define CONFIG_SYS_I2C_SPEED			50000
 #define CONFIG_SYS_I2C_SLAVE			0xfe
@@ -61,6 +61,7 @@
 /*
  * I2C bus
  */
+#define CONFIG_I2C_MV			1
 #define CONFIG_HARD_I2C			1
 #define CONFIG_SYS_I2C_SPEED			50000
 #define CONFIG_SYS_I2C_SLAVE			0xfe
...	...	@@ -28,7 +28,6 @@
28	28	START = start.o
29	29
30	30	COBJS += cpu.o
31		-COBJS += i2c.o
32	31	COBJS += pxafb.o
33	32	COBJS += timer.o
34	33	COBJS += usb.o
1		-/*
2		- * (C) Copyright 2000
3		- * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4		- *
5		- * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6		- * Marius Groeger <mgroeger@sysgo.de>
7		- *
8		- * (C) Copyright 2003 Pengutronix e.K.
9		- * Robert Schwebel <r.schwebel@pengutronix.de>
10		- *
11		- * See file CREDITS for list of people who contributed to this
12		- * project.
13		- *
14		- * This program is free software; you can redistribute it and/or
15		- * modify it under the terms of the GNU General Public License as
16		- * published by the Free Software Foundation; either version 2 of
17		- * the License, or (at your option) any later version.
18		- *
19		- * This program is distributed in the hope that it will be useful,
20		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
21		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22		- * GNU General Public License for more details.
23		- *
24		- * You should have received a copy of the GNU General Public License
25		- * along with this program; if not, write to the Free Software
26		- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27		- * MA 02111-1307 USA
28		- *
29		- * Back ported to the 8xx platform (from the 8260 platform) by
30		- * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
31		- */
32		-
33		-/* FIXME: this file is PXA255 specific! What about other XScales? */
34		-
35		-#include <common.h>
36		-#include <asm/io.h>
37		-
38		-#ifdef CONFIG_HARD_I2C
39		-
40		-/*
41		- * - CONFIG_SYS_I2C_SPEED
42		- * - I2C_PXA_SLAVE_ADDR
43		- */
44		-
45		-#include <asm/arch/hardware.h>
46		-#include <asm/arch/pxa-regs.h>
47		-#include <i2c.h>
48		-
49		-/#define DEBUG_I2C 1 /### activate local debugging output */
50		-#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
51		-
52		-#if (CONFIG_SYS_I2C_SPEED == 400000)
53		-#define I2C_ICR_INIT (ICR_FM \| ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \| ICR_SCLE)
54		-#else
55		-#define I2C_ICR_INIT (ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \| ICR_SCLE)
56		-#endif
57		-
58		-#define I2C_ISR_INIT 0x7FF
59		-
60		-#ifdef DEBUG_I2C
61		-#define PRINTD(x) printf x
62		-#else
63		-#define PRINTD(x)
64		-#endif
65		-
66		-
67		-/* Shall the current transfer have a start/stop condition? */
68		-#define I2C_COND_NORMAL 0
69		-#define I2C_COND_START 1
70		-#define I2C_COND_STOP 2
71		-
72		-/* Shall the current transfer be ack/nacked or being waited for it? */
73		-#define I2C_ACKNAK_WAITACK 1
74		-#define I2C_ACKNAK_SENDACK 2
75		-#define I2C_ACKNAK_SENDNAK 4
76		-
77		-/* Specify who shall transfer the data (master or slave) */
78		-#define I2C_READ 0
79		-#define I2C_WRITE 1
80		-
81		-/* All transfers are described by this data structure */
82		-struct i2c_msg {
83		- u8 condition;
84		- u8 acknack;
85		- u8 direction;
86		- u8 data;
87		-};
88		-
89		-
90		-/**
91		- * i2c_pxa_reset: - reset the host controller
92		- *
93		- */
94		-
95		-static void i2c_reset( void )
96		-{
97		- writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
98		- writel(readl(ICR) \| ICR_UR, ICR); /* reset the unit */
99		- udelay(100);
100		- writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
101		-#ifdef CONFIG_CPU_MONAHANS
102		- /* \| CKENB_1_PWM1 \| CKENB_0_PWM0); */
103		- writel(readl(CKENB) \| (CKENB_4_I2C), CKENB);
104		-#else /* CONFIG_CPU_MONAHANS */
105		- /* set the global I2C clock on */
106		- writel(readl(CKEN) \| CKEN14_I2C, CKEN);
107		-#endif
108		- writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */
109		- writel(I2C_ICR_INIT, ICR); /* set control reg values */
110		- writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */
111		- writel(readl(ICR) \| ICR_IUE, ICR); /* enable unit */
112		- udelay(100);
113		-}
114		-
115		-
116		-/**
117		- * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
118		- * are set and cleared
119		- *
120		- * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
121		- */
122		-static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
123		-{
124		- int timeout = 10000;
125		-
126		- while( ((ISR & set_mask)!=set_mask) \|\| ((ISR & cleared_mask)!=0) ){
127		- udelay( 10 );
128		- if( timeout-- < 0 ) return 0;
129		- }
130		-
131		- return 1;
132		-}
133		-
134		-
135		-/**
136		- * i2c_transfer: - Transfer one byte over the i2c bus
137		- *
138		- * This function can tranfer a byte over the i2c bus in both directions.
139		- * It is used by the public API functions.
140		- *
141		- * @return: 0: transfer successful
142		- * -1: message is empty
143		- * -2: transmit timeout
144		- * -3: ACK missing
145		- * -4: receive timeout
146		- * -5: illegal parameters
147		- * -6: bus is busy and couldn't be aquired
148		- */
149		-int i2c_transfer(struct i2c_msg *msg)
150		-{
151		- int ret;
152		-
153		- if (!msg)
154		- goto transfer_error_msg_empty;
155		-
156		- switch(msg->direction) {
157		-
158		- case I2C_WRITE:
159		-
160		- /* check if bus is not busy */
161		- if (!i2c_isr_set_cleared(0,ISR_IBB))
162		- goto transfer_error_bus_busy;
163		-
164		- /* start transmission */
165		- writel(readl(ICR) & ~ICR_START, ICR);
166		- writel(readl(ICR) & ~ICR_STOP, ICR);
167		- writel(msg->data, IDBR);
168		- if (msg->condition == I2C_COND_START)
169		- writel(readl(ICR) \| ICR_START, ICR);
170		- if (msg->condition == I2C_COND_STOP)
171		- writel(readl(ICR) \| ICR_STOP, ICR);
172		- if (msg->acknack == I2C_ACKNAK_SENDNAK)
173		- writel(readl(ICR) \| ICR_ACKNAK, ICR);
174		- if (msg->acknack == I2C_ACKNAK_SENDACK)
175		- writel(readl(ICR) & ~ICR_ACKNAK, ICR);
176		- writel(readl(ICR) & ~ICR_ALDIE, ICR);
177		- writel(readl(ICR) \| ICR_TB, ICR);
178		-
179		- /* transmit register empty? */
180		- if (!i2c_isr_set_cleared(ISR_ITE,0))
181		- goto transfer_error_transmit_timeout;
182		-
183		- /* clear 'transmit empty' state */
184		- writel(readl(ISR) \| ISR_ITE, ISR);
185		-
186		- /* wait for ACK from slave */
187		- if (msg->acknack == I2C_ACKNAK_WAITACK)
188		- if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
189		- goto transfer_error_ack_missing;
190		- break;
191		-
192		- case I2C_READ:
193		-
194		- /* check if bus is not busy */
195		- if (!i2c_isr_set_cleared(0,ISR_IBB))
196		- goto transfer_error_bus_busy;
197		-
198		- /* start receive */
199		- writel(readl(ICR) & ~ICR_START, ICR);
200		- writel(readl(ICR) & ~ICR_STOP, ICR);
201		- if (msg->condition == I2C_COND_START)
202		- writel(readl(ICR) \| ICR_START, ICR);
203		- if (msg->condition == I2C_COND_STOP)
204		- writel(readl(ICR) \| ICR_STOP, ICR);
205		- if (msg->acknack == I2C_ACKNAK_SENDNAK)
206		- writel(readl(ICR) \| ICR_ACKNAK, ICR);
207		- if (msg->acknack == I2C_ACKNAK_SENDACK)
208		- writel(readl(ICR) & ~ICR_ACKNAK, ICR);
209		- writel(readl(ICR) & ~ICR_ALDIE, ICR);
210		- writel(readl(ICR) \| ICR_TB, ICR);
211		-
212		- /* receive register full? */
213		- if (!i2c_isr_set_cleared(ISR_IRF,0))
214		- goto transfer_error_receive_timeout;
215		-
216		- msg->data = readl(IDBR);
217		-
218		- /* clear 'receive empty' state */
219		- writel(readl(ISR) \| ISR_IRF, ISR);
220		-
221		- break;
222		-
223		- default:
224		-
225		- goto transfer_error_illegal_param;
226		-
227		- }
228		-
229		- return 0;
230		-
231		-transfer_error_msg_empty:
232		- PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
233		- ret = -1; goto i2c_transfer_finish;
234		-
235		-transfer_error_transmit_timeout:
236		- PRINTD(("i2c_transfer: error: transmit timeout\n"));
237		- ret = -2; goto i2c_transfer_finish;
238		-
239		-transfer_error_ack_missing:
240		- PRINTD(("i2c_transfer: error: ACK missing\n"));
241		- ret = -3; goto i2c_transfer_finish;
242		-
243		-transfer_error_receive_timeout:
244		- PRINTD(("i2c_transfer: error: receive timeout\n"));
245		- ret = -4; goto i2c_transfer_finish;
246		-
247		-transfer_error_illegal_param:
248		- PRINTD(("i2c_transfer: error: illegal parameters\n"));
249		- ret = -5; goto i2c_transfer_finish;
250		-
251		-transfer_error_bus_busy:
252		- PRINTD(("i2c_transfer: error: bus is busy\n"));
253		- ret = -6; goto i2c_transfer_finish;
254		-
255		-i2c_transfer_finish:
256		- PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR));
257		- i2c_reset();
258		- return ret;
259		-
260		-}
261		-
262		-/* ------------------------------------------------------------------------ */
263		-/* API Functions */
264		-/* ------------------------------------------------------------------------ */
265		-
266		-void i2c_init(int speed, int slaveaddr)
267		-{
268		-#ifdef CONFIG_SYS_I2C_INIT_BOARD
269		- /* call board specific i2c bus reset routine before accessing the */
270		- /* environment, which might be in a chip on that bus. For details */
271		- /* about this problem see doc/I2C_Edge_Conditions. */
272		- i2c_init_board();
273		-#endif
274		-}
275		-
276		-
277		-/**
278		- * i2c_probe: - Test if a chip answers for a given i2c address
279		- *
280		- * @chip: address of the chip which is searched for
281		- * @return: 0 if a chip was found, -1 otherwhise
282		- */
283		-
284		-int i2c_probe(uchar chip)
285		-{
286		- struct i2c_msg msg;
287		-
288		- i2c_reset();
289		-
290		- msg.condition = I2C_COND_START;
291		- msg.acknack = I2C_ACKNAK_WAITACK;
292		- msg.direction = I2C_WRITE;
293		- msg.data = (chip << 1) + 1;
294		- if (i2c_transfer(&msg)) return -1;
295		-
296		- msg.condition = I2C_COND_STOP;
297		- msg.acknack = I2C_ACKNAK_SENDNAK;
298		- msg.direction = I2C_READ;
299		- msg.data = 0x00;
300		- if (i2c_transfer(&msg)) return -1;
301		-
302		- return 0;
303		-}
304		-
305		-
306		-/**
307		- * i2c_read: - Read multiple bytes from an i2c device
308		- *
309		- * The higher level routines take into account that this function is only
310		- * called with len < page length of the device (see configuration file)
311		- *
312		- * @chip: address of the chip which is to be read
313		- * @addr: i2c data address within the chip
314		- * @alen: length of the i2c data address (1..2 bytes)
315		- * @buffer: where to write the data
316		- * @len: how much byte do we want to read
317		- * @return: 0 in case of success
318		- */
319		-
320		-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
321		-{
322		- struct i2c_msg msg;
323		- u8 addr_bytes[3]; /* lowest...highest byte of data address */
324		- int ret;
325		-
326		- PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
327		-
328		- i2c_reset();
329		-
330		- /* dummy chip address write */
331		- PRINTD(("i2c_read: dummy chip address write\n"));
332		- msg.condition = I2C_COND_START;
333		- msg.acknack = I2C_ACKNAK_WAITACK;
334		- msg.direction = I2C_WRITE;
335		- msg.data = (chip << 1);
336		- msg.data &= 0xFE;
337		- if ((ret=i2c_transfer(&msg))) return -1;
338		-
339		- /*
340		- * send memory address bytes;
341		- * alen defines how much bytes we have to send.
342		- */
343		- /addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); /
344		- addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
345		- addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
346		- addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
347		-
348		- while (--alen >= 0) {
349		-
350		- PRINTD(("i2c_read: send memory word address byte %1d\n",alen));
351		- msg.condition = I2C_COND_NORMAL;
352		- msg.acknack = I2C_ACKNAK_WAITACK;
353		- msg.direction = I2C_WRITE;
354		- msg.data = addr_bytes[alen];
355		- if ((ret=i2c_transfer(&msg))) return -1;
356		- }
357		-
358		-
359		- /* start read sequence */
360		- PRINTD(("i2c_read: start read sequence\n"));
361		- msg.condition = I2C_COND_START;
362		- msg.acknack = I2C_ACKNAK_WAITACK;
363		- msg.direction = I2C_WRITE;
364		- msg.data = (chip << 1);
365		- msg.data \|= 0x01;
366		- if ((ret=i2c_transfer(&msg))) return -1;
367		-
368		- /* read bytes; send NACK at last byte */
369		- while (len--) {
370		-
371		- if (len==0) {
372		- msg.condition = I2C_COND_STOP;
373		- msg.acknack = I2C_ACKNAK_SENDNAK;
374		- } else {
375		- msg.condition = I2C_COND_NORMAL;
376		- msg.acknack = I2C_ACKNAK_SENDACK;
377		- }
378		-
379		- msg.direction = I2C_READ;
380		- msg.data = 0x00;
381		- if ((ret=i2c_transfer(&msg))) return -1;
382		-
383		- *buffer = msg.data;
384		- PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
385		- buffer++;
386		-
387		- }
388		-
389		- i2c_reset();
390		-
391		- return 0;
392		-}
393		-
394		-
395		-/**
396		- * i2c_write: - Write multiple bytes to an i2c device
397		- *
398		- * The higher level routines take into account that this function is only
399		- * called with len < page length of the device (see configuration file)
400		- *
401		- * @chip: address of the chip which is to be written
402		- * @addr: i2c data address within the chip
403		- * @alen: length of the i2c data address (1..2 bytes)
404		- * @buffer: where to find the data to be written
405		- * @len: how much byte do we want to read
406		- * @return: 0 in case of success
407		- */
408		-
409		-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
410		-{
411		- struct i2c_msg msg;
412		- u8 addr_bytes[3]; /* lowest...highest byte of data address */
413		-
414		- PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
415		-
416		- i2c_reset();
417		-
418		- /* chip address write */
419		- PRINTD(("i2c_write: chip address write\n"));
420		- msg.condition = I2C_COND_START;
421		- msg.acknack = I2C_ACKNAK_WAITACK;
422		- msg.direction = I2C_WRITE;
423		- msg.data = (chip << 1);
424		- msg.data &= 0xFE;
425		- if (i2c_transfer(&msg)) return -1;
426		-
427		- /*
428		- * send memory address bytes;
429		- * alen defines how much bytes we have to send.
430		- */
431		- addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
432		- addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
433		- addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
434		-
435		- while (--alen >= 0) {
436		-
437		- PRINTD(("i2c_write: send memory word address\n"));
438		- msg.condition = I2C_COND_NORMAL;
439		- msg.acknack = I2C_ACKNAK_WAITACK;
440		- msg.direction = I2C_WRITE;
441		- msg.data = addr_bytes[alen];
442		- if (i2c_transfer(&msg)) return -1;
443		- }
444		-
445		- /* write bytes; send NACK at last byte */
446		- while (len--) {
447		-
448		- PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
449		-
450		- if (len==0)
451		- msg.condition = I2C_COND_STOP;
452		- else
453		- msg.condition = I2C_COND_NORMAL;
454		-
455		- msg.acknack = I2C_ACKNAK_WAITACK;
456		- msg.direction = I2C_WRITE;
457		- msg.data = *(buffer++);
458		-
459		- if (i2c_transfer(&msg)) return -1;
460		-
461		- }
462		-
463		- i2c_reset();
464		-
465		- return 0;
466		-
467		-}
468		-
469		-#endif /* CONFIG_HARD_I2C */
...	...	@@ -29,6 +29,7 @@
29	29	COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
30	30	COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o
31	31	COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
	32	+COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
32	33	COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
33	34	COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
34	35	COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
	1	+/*
	2	+ * (C) Copyright 2000
	3	+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
	4	+ *
	5	+ * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	6	+ * Marius Groeger <mgroeger@sysgo.de>
	7	+ *
	8	+ * (C) Copyright 2003 Pengutronix e.K.
	9	+ * Robert Schwebel <r.schwebel@pengutronix.de>
	10	+ *
	11	+ * See file CREDITS for list of people who contributed to this
	12	+ * project.
	13	+ *
	14	+ * This program is free software; you can redistribute it and/or
	15	+ * modify it under the terms of the GNU General Public License as
	16	+ * published by the Free Software Foundation; either version 2 of
	17	+ * the License, or (at your option) any later version.
	18	+ *
	19	+ * This program is distributed in the hope that it will be useful,
	20	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	+ * GNU General Public License for more details.
	23	+ *
	24	+ * You should have received a copy of the GNU General Public License
	25	+ * along with this program; if not, write to the Free Software
	26	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	27	+ * MA 02111-1307 USA
	28	+ *
	29	+ * Back ported to the 8xx platform (from the 8260 platform) by
	30	+ * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
	31	+ */
	32	+
	33	+#include <common.h>
	34	+#include <asm/io.h>
	35	+
	36	+#ifdef CONFIG_HARD_I2C
	37	+
	38	+/*
	39	+ * - CONFIG_SYS_I2C_SPEED
	40	+ * - I2C_PXA_SLAVE_ADDR
	41	+ */
	42	+
	43	+#include <asm/arch/hardware.h>
	44	+#include <asm/arch/pxa-regs.h>
	45	+#include <i2c.h>
	46	+
	47	+#if (CONFIG_SYS_I2C_SPEED == 400000)
	48	+#define I2C_ICR_INIT (ICR_FM \| ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \
	49	+ \| ICR_SCLE)
	50	+#else
	51	+#define I2C_ICR_INIT (ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \| ICR_SCLE)
	52	+#endif
	53	+
	54	+#define I2C_ISR_INIT 0x7FF
	55	+
	56	+#ifdef DEBUG_I2C
	57	+#define PRINTD(x) printf x
	58	+#else
	59	+#define PRINTD(x)
	60	+#endif
	61	+
	62	+/* Shall the current transfer have a start/stop condition? */
	63	+#define I2C_COND_NORMAL 0
	64	+#define I2C_COND_START 1
	65	+#define I2C_COND_STOP 2
	66	+
	67	+/* Shall the current transfer be ack/nacked or being waited for it? */
	68	+#define I2C_ACKNAK_WAITACK 1
	69	+#define I2C_ACKNAK_SENDACK 2
	70	+#define I2C_ACKNAK_SENDNAK 4
	71	+
	72	+/* Specify who shall transfer the data (master or slave) */
	73	+#define I2C_READ 0
	74	+#define I2C_WRITE 1
	75	+
	76	+/* All transfers are described by this data structure */
	77	+struct i2c_msg {
	78	+ u8 condition;
	79	+ u8 acknack;
	80	+ u8 direction;
	81	+ u8 data;
	82	+};
	83	+
	84	+/*
	85	+ * i2c_pxa_reset: - reset the host controller
	86	+ *
	87	+ */
	88	+static void i2c_reset(void)
	89	+{
	90	+ writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
	91	+ writel(readl(ICR) \| ICR_UR, ICR); /* reset the unit */
	92	+ udelay(100);
	93	+ writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
	94	+#ifdef CONFIG_CPU_MONAHANS
	95	+ /* \| CKENB_1_PWM1 \| CKENB_0_PWM0); */
	96	+ writel(readl(CKENB) \| (CKENB_4_I2C), CKENB);
	97	+#else /* CONFIG_CPU_MONAHANS */
	98	+ /* set the global I2C clock on */
	99	+ writel(readl(CKEN) \| CKEN14_I2C, CKEN);
	100	+#endif
	101	+ writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */
	102	+ writel(I2C_ICR_INIT, ICR); /* set control reg values */
	103	+ writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */
	104	+ writel(readl(ICR) \| ICR_IUE, ICR); /* enable unit */
	105	+ udelay(100);
	106	+}
	107	+
	108	+/*
	109	+ * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
	110	+ * are set and cleared
	111	+ *
	112	+ * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
	113	+ */
	114	+static int i2c_isr_set_cleared(unsigned long set_mask,
	115	+ unsigned long cleared_mask)
	116	+{
	117	+ int timeout = 10000;
	118	+
	119	+ while (((ISR & set_mask) != set_mask) \|\| ((ISR & cleared_mask) != 0)) {
	120	+ udelay(10);
	121	+ if (timeout-- < 0)
	122	+ return 0;
	123	+ }
	124	+
	125	+ return 1;
	126	+}
	127	+
	128	+/*
	129	+ * i2c_transfer: - Transfer one byte over the i2c bus
	130	+ *
	131	+ * This function can tranfer a byte over the i2c bus in both directions.
	132	+ * It is used by the public API functions.
	133	+ *
	134	+ * @return: 0: transfer successful
	135	+ * -1: message is empty
	136	+ * -2: transmit timeout
	137	+ * -3: ACK missing
	138	+ * -4: receive timeout
	139	+ * -5: illegal parameters
	140	+ * -6: bus is busy and couldn't be aquired
	141	+ */
	142	+int i2c_transfer(struct i2c_msg *msg)
	143	+{
	144	+ int ret;
	145	+
	146	+ if (!msg)
	147	+ goto transfer_error_msg_empty;
	148	+
	149	+ switch (msg->direction) {
	150	+ case I2C_WRITE:
	151	+ /* check if bus is not busy */
	152	+ if (!i2c_isr_set_cleared(0, ISR_IBB))
	153	+ goto transfer_error_bus_busy;
	154	+
	155	+ /* start transmission */
	156	+ writel(readl(ICR) & ~ICR_START, ICR);
	157	+ writel(readl(ICR) & ~ICR_STOP, ICR);
	158	+ writel(msg->data, IDBR);
	159	+ if (msg->condition == I2C_COND_START)
	160	+ writel(readl(ICR) \| ICR_START, ICR);
	161	+ if (msg->condition == I2C_COND_STOP)
	162	+ writel(readl(ICR) \| ICR_STOP, ICR);
	163	+ if (msg->acknack == I2C_ACKNAK_SENDNAK)
	164	+ writel(readl(ICR) \| ICR_ACKNAK, ICR);
	165	+ if (msg->acknack == I2C_ACKNAK_SENDACK)
	166	+ writel(readl(ICR) & ~ICR_ACKNAK, ICR);
	167	+ writel(readl(ICR) & ~ICR_ALDIE, ICR);
	168	+ writel(readl(ICR) \| ICR_TB, ICR);
	169	+
	170	+ /* transmit register empty? */
	171	+ if (!i2c_isr_set_cleared(ISR_ITE, 0))
	172	+ goto transfer_error_transmit_timeout;
	173	+
	174	+ /* clear 'transmit empty' state */
	175	+ writel(readl(ISR) \| ISR_ITE, ISR);
	176	+
	177	+ /* wait for ACK from slave */
	178	+ if (msg->acknack == I2C_ACKNAK_WAITACK)
	179	+ if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
	180	+ goto transfer_error_ack_missing;
	181	+ break;
	182	+
	183	+ case I2C_READ:
	184	+
	185	+ /* check if bus is not busy */
	186	+ if (!i2c_isr_set_cleared(0, ISR_IBB))
	187	+ goto transfer_error_bus_busy;
	188	+
	189	+ /* start receive */
	190	+ writel(readl(ICR) & ~ICR_START, ICR);
	191	+ writel(readl(ICR) & ~ICR_STOP, ICR);
	192	+ if (msg->condition == I2C_COND_START)
	193	+ writel(readl(ICR) \| ICR_START, ICR);
	194	+ if (msg->condition == I2C_COND_STOP)
	195	+ writel(readl(ICR) \| ICR_STOP, ICR);
	196	+ if (msg->acknack == I2C_ACKNAK_SENDNAK)
	197	+ writel(readl(ICR) \| ICR_ACKNAK, ICR);
	198	+ if (msg->acknack == I2C_ACKNAK_SENDACK)
	199	+ writel(readl(ICR) & ~ICR_ACKNAK, ICR);
	200	+ writel(readl(ICR) & ~ICR_ALDIE, ICR);
	201	+ writel(readl(ICR) \| ICR_TB, ICR);
	202	+
	203	+ /* receive register full? */
	204	+ if (!i2c_isr_set_cleared(ISR_IRF, 0))
	205	+ goto transfer_error_receive_timeout;
	206	+
	207	+ msg->data = readl(IDBR);
	208	+
	209	+ /* clear 'receive empty' state */
	210	+ writel(readl(ISR) \| ISR_IRF, ISR);
	211	+
	212	+ break;
	213	+ default:
	214	+ goto transfer_error_illegal_param;
	215	+ }
	216	+
	217	+ return 0;
	218	+
	219	+transfer_error_msg_empty:
	220	+ PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
	221	+ ret = -1; goto i2c_transfer_finish;
	222	+
	223	+transfer_error_transmit_timeout:
	224	+ PRINTD(("i2c_transfer: error: transmit timeout\n"));
	225	+ ret = -2; goto i2c_transfer_finish;
	226	+
	227	+transfer_error_ack_missing:
	228	+ PRINTD(("i2c_transfer: error: ACK missing\n"));
	229	+ ret = -3; goto i2c_transfer_finish;
	230	+
	231	+transfer_error_receive_timeout:
	232	+ PRINTD(("i2c_transfer: error: receive timeout\n"));
	233	+ ret = -4; goto i2c_transfer_finish;
	234	+
	235	+transfer_error_illegal_param:
	236	+ PRINTD(("i2c_transfer: error: illegal parameters\n"));
	237	+ ret = -5; goto i2c_transfer_finish;
	238	+
	239	+transfer_error_bus_busy:
	240	+ PRINTD(("i2c_transfer: error: bus is busy\n"));
	241	+ ret = -6; goto i2c_transfer_finish;
	242	+
	243	+i2c_transfer_finish:
	244	+ PRINTD(("i2c_transfer: ISR: 0x%04x\n", ISR));
	245	+ i2c_reset();
	246	+ return ret;
	247	+}
	248	+
	249	+/* ------------------------------------------------------------------------ */
	250	+/* API Functions */
	251	+/* ------------------------------------------------------------------------ */
	252	+void i2c_init(int speed, int slaveaddr)
	253	+{
	254	+#ifdef CONFIG_SYS_I2C_INIT_BOARD
	255	+ /* call board specific i2c bus reset routine before accessing the */
	256	+ /* environment, which might be in a chip on that bus. For details */
	257	+ /* about this problem see doc/I2C_Edge_Conditions. */
	258	+ i2c_init_board();
	259	+#endif
	260	+}
	261	+
	262	+/*
	263	+ * i2c_probe: - Test if a chip answers for a given i2c address
	264	+ *
	265	+ * @chip: address of the chip which is searched for
	266	+ * @return: 0 if a chip was found, -1 otherwhise
	267	+ */
	268	+int i2c_probe(uchar chip)
	269	+{
	270	+ struct i2c_msg msg;
	271	+
	272	+ i2c_reset();
	273	+
	274	+ msg.condition = I2C_COND_START;
	275	+ msg.acknack = I2C_ACKNAK_WAITACK;
	276	+ msg.direction = I2C_WRITE;
	277	+ msg.data = (chip << 1) + 1;
	278	+ if (i2c_transfer(&msg))
	279	+ return -1;
	280	+
	281	+ msg.condition = I2C_COND_STOP;
	282	+ msg.acknack = I2C_ACKNAK_SENDNAK;
	283	+ msg.direction = I2C_READ;
	284	+ msg.data = 0x00;
	285	+ if (i2c_transfer(&msg))
	286	+ return -1;
	287	+
	288	+ return 0;
	289	+}
	290	+
	291	+/*
	292	+ * i2c_read: - Read multiple bytes from an i2c device
	293	+ *
	294	+ * The higher level routines take into account that this function is only
	295	+ * called with len < page length of the device (see configuration file)
	296	+ *
	297	+ * @chip: address of the chip which is to be read
	298	+ * @addr: i2c data address within the chip
	299	+ * @alen: length of the i2c data address (1..2 bytes)
	300	+ * @buffer: where to write the data
	301	+ * @len: how much byte do we want to read
	302	+ * @return: 0 in case of success
	303	+ */
	304	+int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
	305	+{
	306	+ struct i2c_msg msg;
	307	+ u8 addr_bytes[3]; /* lowest...highest byte of data address */
	308	+
	309	+ PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
	310	+ "len=0x%02x)\n", chip, addr, alen, len));
	311	+
	312	+ i2c_reset();
	313	+
	314	+ /* dummy chip address write */
	315	+ PRINTD(("i2c_read: dummy chip address write\n"));
	316	+ msg.condition = I2C_COND_START;
	317	+ msg.acknack = I2C_ACKNAK_WAITACK;
	318	+ msg.direction = I2C_WRITE;
	319	+ msg.data = (chip << 1);
	320	+ msg.data &= 0xFE;
	321	+ if (i2c_transfer(&msg))
	322	+ return -1;
	323	+
	324	+ /*
	325	+ * send memory address bytes;
	326	+ * alen defines how much bytes we have to send.
	327	+ */
	328	+ /addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); /
	329	+ addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
	330	+ addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
	331	+ addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
	332	+
	333	+ while (--alen >= 0) {
	334	+ PRINTD(("i2c_read: send memory word address byte %1d\n", alen));
	335	+ msg.condition = I2C_COND_NORMAL;
	336	+ msg.acknack = I2C_ACKNAK_WAITACK;
	337	+ msg.direction = I2C_WRITE;
	338	+ msg.data = addr_bytes[alen];
	339	+ if (i2c_transfer(&msg))
	340	+ return -1;
	341	+ }
	342	+
	343	+ /* start read sequence */
	344	+ PRINTD(("i2c_read: start read sequence\n"));
	345	+ msg.condition = I2C_COND_START;
	346	+ msg.acknack = I2C_ACKNAK_WAITACK;
	347	+ msg.direction = I2C_WRITE;
	348	+ msg.data = (chip << 1);
	349	+ msg.data \|= 0x01;
	350	+ if (i2c_transfer(&msg))
	351	+ return -1;
	352	+
	353	+ /* read bytes; send NACK at last byte */
	354	+ while (len--) {
	355	+ if (len == 0) {
	356	+ msg.condition = I2C_COND_STOP;
	357	+ msg.acknack = I2C_ACKNAK_SENDNAK;
	358	+ } else {
	359	+ msg.condition = I2C_COND_NORMAL;
	360	+ msg.acknack = I2C_ACKNAK_SENDACK;
	361	+ }
	362	+
	363	+ msg.direction = I2C_READ;
	364	+ msg.data = 0x00;
	365	+ if (i2c_transfer(&msg))
	366	+ return -1;
	367	+
	368	+ *buffer = msg.data;
	369	+ PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",
	370	+ (unsigned int)buffer, *buffer));
	371	+ buffer++;
	372	+ }
	373	+
	374	+ i2c_reset();
	375	+
	376	+ return 0;
	377	+}
	378	+
	379	+/*
	380	+ * i2c_write: - Write multiple bytes to an i2c device
	381	+ *
	382	+ * The higher level routines take into account that this function is only
	383	+ * called with len < page length of the device (see configuration file)
	384	+ *
	385	+ * @chip: address of the chip which is to be written
	386	+ * @addr: i2c data address within the chip
	387	+ * @alen: length of the i2c data address (1..2 bytes)
	388	+ * @buffer: where to find the data to be written
	389	+ * @len: how much byte do we want to read
	390	+ * @return: 0 in case of success
	391	+ */
	392	+int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
	393	+{
	394	+ struct i2c_msg msg;
	395	+ u8 addr_bytes[3]; /* lowest...highest byte of data address */
	396	+
	397	+ PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
	398	+ "len=0x%02x)\n", chip, addr, alen, len));
	399	+
	400	+ i2c_reset();
	401	+
	402	+ /* chip address write */
	403	+ PRINTD(("i2c_write: chip address write\n"));
	404	+ msg.condition = I2C_COND_START;
	405	+ msg.acknack = I2C_ACKNAK_WAITACK;
	406	+ msg.direction = I2C_WRITE;
	407	+ msg.data = (chip << 1);
	408	+ msg.data &= 0xFE;
	409	+ if (i2c_transfer(&msg))
	410	+ return -1;
	411	+
	412	+ /*
	413	+ * send memory address bytes;
	414	+ * alen defines how much bytes we have to send.
	415	+ */
	416	+ addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
	417	+ addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
	418	+ addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
	419	+
	420	+ while (--alen >= 0) {
	421	+ PRINTD(("i2c_write: send memory word address\n"));
	422	+ msg.condition = I2C_COND_NORMAL;
	423	+ msg.acknack = I2C_ACKNAK_WAITACK;
	424	+ msg.direction = I2C_WRITE;
	425	+ msg.data = addr_bytes[alen];
	426	+ if (i2c_transfer(&msg))
	427	+ return -1;
	428	+ }
	429	+
	430	+ /* write bytes; send NACK at last byte */
	431	+ while (len--) {
	432	+ PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",
	433	+ (unsigned int)buffer, *buffer));
	434	+
	435	+ if (len == 0)
	436	+ msg.condition = I2C_COND_STOP;
	437	+ else
	438	+ msg.condition = I2C_COND_NORMAL;
	439	+
	440	+ msg.acknack = I2C_ACKNAK_WAITACK;
	441	+ msg.direction = I2C_WRITE;
	442	+ msg.data = *(buffer++);
	443	+
	444	+ if (i2c_transfer(&msg))
	445	+ return -1;
	446	+ }
	447	+
	448	+ i2c_reset();
	449	+
	450	+ return 0;
	451	+}
	452	+#endif /* CONFIG_HARD_I2C */
...	...	@@ -140,6 +140,7 @@
140	140	/*
141	141	* I2C bus
142	142	*/
	143	+#define CONFIG_I2C_MV 1
143	144	#define CONFIG_HARD_I2C 1
144	145	#define CONFIG_SYS_I2C_SPEED 50000
145	146	#define CONFIG_SYS_I2C_SLAVE 0xfe
...	...	@@ -61,6 +61,7 @@
61	61	/*
62	62	* I2C bus
63	63	*/
	64	+#define CONFIG_I2C_MV 1
64	65	#define CONFIG_HARD_I2C 1
65	66	#define CONFIG_SYS_I2C_SPEED 50000
66	67	#define CONFIG_SYS_I2C_SLAVE 0xfe