Commit 77cd89e75563742aa32cf3d216ac9ff649d1d70e

Authored by pekon gupta
Committed by Tom Rini
1 parent 8c16dd6fa7

ARM: omap: fix GPMC address-map size for NAND and NOR devices

Fixes commit a0a37183bd75e74608bc78c8d0e2a34454f95a91
    ARM: omap: merge GPMC initialization code for all platform

1) NAND device are not directly memory-mapped to CPU address-space, they are
 indirectly accessed via following GPMC registers:
 - GPMC_NAND_COMMAND_x
 - GPMC_NAND_ADDRESS_x
 - GPMC_NAND_DATA_x
 Therefore from CPU's point of view, NAND address-map can be limited to just
 above register addresses. But GPMC chip-select address-map can be configured
 in granularity of 16MB only.
 So this patch uses GPMC_SIZE_16M for all NAND devices.

2) NOR device are directly memory-mapped to CPU address-space, so its
 address-map size depends on actual addressable region in NOR FLASH device.
 So this patch uses CONFIG_SYS_FLASH_SIZE to derive GPMC chip-select address-map
 size configuration.

Signed-off-by: Pekon Gupta <pekon@ti.com>

Showing 2 changed files with 8 additions and 2 deletions Side-by-side Diff

arch/arm/cpu/armv7/omap-common/mem-common.c
... ... @@ -87,8 +87,12 @@
87 87 STNOR_GPMC_CONFIG6,
88 88 STNOR_GPMC_CONFIG7
89 89 };
90   - u32 size = GPMC_SIZE_16M;
91 90 u32 base = CONFIG_SYS_FLASH_BASE;
  91 + u32 size = (CONFIG_SYS_FLASH_SIZE > 0x08000000) ? GPMC_SIZE_256M :
  92 + /* > 64MB */ ((CONFIG_SYS_FLASH_SIZE > 0x04000000) ? GPMC_SIZE_128M :
  93 + /* > 32MB */ ((CONFIG_SYS_FLASH_SIZE > 0x02000000) ? GPMC_SIZE_64M :
  94 + /* > 16MB */ ((CONFIG_SYS_FLASH_SIZE > 0x01000000) ? GPMC_SIZE_32M :
  95 + /* min 16MB */ GPMC_SIZE_16M)));
92 96 #elif defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
93 97 /* configure GPMC for NAND */
94 98 const u32 gpmc_regs[GPMC_MAX_REG] = { M_NAND_GPMC_CONFIG1,
95 99  
... ... @@ -99,8 +103,9 @@
99 103 M_NAND_GPMC_CONFIG6,
100 104 0
101 105 };
102   - u32 size = GPMC_SIZE_256M;
103 106 u32 base = CONFIG_SYS_NAND_BASE;
  107 + u32 size = GPMC_SIZE_16M;
  108 +
104 109 #elif defined(CONFIG_CMD_ONENAND)
105 110 const u32 gpmc_regs[GPMC_MAX_REG] = { ONENAND_GPMC_CONFIG1,
106 111 ONENAND_GPMC_CONFIG2,
include/configs/am335x_evm.h
... ... @@ -453,6 +453,7 @@
453 453 #define CONFIG_SYS_MAX_FLASH_BANKS 1
454 454 #define CONFIG_SYS_FLASH_BASE (0x08000000)
455 455 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  456 +#define CONFIG_SYS_FLASH_SIZE 0x01000000
456 457 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
457 458 /* Reduce SPL size by removing unlikey targets */
458 459 #ifdef CONFIG_NOR_BOOT