Commit 7da765125165c172078489336117f95de2904322

Authored by Inderpal Singh
Committed by Marek Vasut
1 parent 16f9480dfc

usb: exynos5: arndale: Add network support

Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.

This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>

Showing 3 changed files with 27 additions and 0 deletions Side-by-side Diff

board/samsung/arndale/arndale.c
... ... @@ -5,11 +5,32 @@
5 5 */
6 6  
7 7 #include <common.h>
  8 +#include <usb.h>
8 9 #include <asm/arch/pinmux.h>
9 10 #include <asm/arch/dwmmc.h>
  11 +#include <asm/arch/gpio.h>
10 12 #include <asm/arch/power.h>
11 13  
12 14 DECLARE_GLOBAL_DATA_PTR;
  15 +
  16 +#ifdef CONFIG_USB_EHCI_EXYNOS
  17 +int board_usb_init(int index, enum usb_init_type init)
  18 +{
  19 + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
  20 + samsung_get_base_gpio_part1();
  21 +
  22 + /* Configure gpios for usb 3503 hub:
  23 + * disconnect, toggle reset and connect
  24 + */
  25 + s5p_gpio_direction_output(&gpio->d1, 7, 0);
  26 + s5p_gpio_direction_output(&gpio->x3, 5, 0);
  27 +
  28 + s5p_gpio_direction_output(&gpio->x3, 5, 1);
  29 + s5p_gpio_direction_output(&gpio->d1, 7, 1);
  30 +
  31 + return 0;
  32 +}
  33 +#endif
13 34  
14 35 int board_init(void)
15 36 {
drivers/usb/host/ehci-exynos.c
... ... @@ -203,6 +203,8 @@
203 203  
204 204 setup_usb_phy(ctx->usb);
205 205  
  206 + board_usb_init(index, init);
  207 +
206 208 *hccr = ctx->hcd;
207 209 *hcor = (struct ehci_hcor *)((uint32_t) *hccr
208 210 + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
include/configs/arndale.h
... ... @@ -117,6 +117,10 @@
117 117 #define CONFIG_USB_EHCI_EXYNOS
118 118 #define CONFIG_USB_STORAGE
119 119  
  120 +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  121 +#define CONFIG_USB_HOST_ETHER
  122 +#define CONFIG_USB_ETHER_ASIX
  123 +
120 124 /* MMC SPL */
121 125 #define CONFIG_EXYNOS_SPL
122 126 #define CONFIG_SPL