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Commit 819216ddfab1e81430086fd0c8e7f187c38dd81a

Authored by Simon Glass
Committed by Tom Rini
1 parent 7a2c1b13d7
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

arm: Remove otc570 board 

This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>

Showing 9 changed files with 0 additions and 700 deletions Side-by-side Diff

arch/arm/mach-at91/Kconfig
Diff comments   View file @ 819216d
... ... @@ -103,10 +103,6 @@
103 103 bool "Support meesc"
104 104 select CPU_ARM926EJS
105 105  
106   -config TARGET_OTC570
107   - bool "Support otc570"
108   - select CPU_ARM926EJS
109   -
110 106 config TARGET_CORVUS
111 107 bool "Support corvus"
112 108 select CPU_ARM926EJS
... ... @@ -144,7 +140,6 @@
144 140 source "board/calao/usb_a9263/Kconfig"
145 141 source "board/egnite/ethernut5/Kconfig"
146 142 source "board/esd/meesc/Kconfig"
147   -source "board/esd/otc570/Kconfig"
148 143 source "board/mini-box/picosam9g45/Kconfig"
149 144 source "board/ronetix/pm9261/Kconfig"
150 145 source "board/ronetix/pm9263/Kconfig"
board/esd/otc570/Kconfig
View file @ 819216d
1   -if TARGET_OTC570
2   -
3   -config SYS_BOARD
4   - default "otc570"
5   -
6   -config SYS_VENDOR
7   - default "esd"
8   -
9   -config SYS_CONFIG_NAME
10   - default "otc570"
11   -
12   -endif
board/esd/otc570/MAINTAINERS
View file @ 819216d
1   -OTC570 BOARD
2   -M: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
3   -S: Maintained
4   -F: board/esd/otc570/
5   -F: include/configs/otc570.h
6   -F: configs/otc570_defconfig
7   -F: configs/otc570_dataflash_defconfig
board/esd/otc570/Makefile
View file @ 819216d
1   -#
2   -# (C) Copyright 2003-2008
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# (C) Copyright 2008
6   -# Stelian Pop <stelian@popies.net>
7   -# Lead Tech Design <www.leadtechdesign.com>
8   -#
9   -# SPDX-License-Identifier: GPL-2.0+
10   -#
11   -
12   -obj-y += otc570.o
13   -obj-$(CONFIG_HAS_DATAFLASH) += partition.o
board/esd/otc570/otc570.c
View file @ 819216d
1   -/*
2   - * (C) Copyright 2010-2011
3   - * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
4   - * esd electronic system design gmbh <www.esd.eu>
5   - *
6   - * (C) Copyright 2007-2008
7   - * Stelian Pop <stelian@popies.net>
8   - * Lead Tech Design <www.leadtechdesign.com>
9   - *
10   - * SPDX-License-Identifier: GPL-2.0+
11   - */
12   -
13   -#include <common.h>
14   -#include <asm/io.h>
15   -#include <asm/gpio.h>
16   -#include <asm/arch/at91sam9_smc.h>
17   -#include <asm/arch/at91_common.h>
18   -#include <asm/arch/at91_pmc.h>
19   -#include <asm/arch/at91_rstc.h>
20   -#include <asm/arch/at91_matrix.h>
21   -#include <asm/arch/at91_pio.h>
22   -#include <asm/arch/clk.h>
23   -#include <netdev.h>
24   -#ifdef CONFIG_LCD
25   -# include <atmel_lcdc.h>
26   -# include <lcd.h>
27   -# ifdef CONFIG_LCD_INFO
28   -# include <nand.h>
29   -# include <version.h>
30   -# endif
31   -#endif
32   -
33   -DECLARE_GLOBAL_DATA_PTR;
34   -
35   -/*
36   - * Miscelaneous platform dependent initialisations
37   - */
38   -
39   -static int hw_rev = -1; /* hardware revision */
40   -
41   -int get_hw_rev(void)
42   -{
43   - if (hw_rev >= 0)
44   - return hw_rev;
45   -
46   - hw_rev = at91_get_pio_value(AT91_PIO_PORTB, 19);
47   - hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 20) << 1;
48   - hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 21) << 2;
49   - hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 22) << 3;
50   -
51   - if (hw_rev == 15)
52   - hw_rev = 0;
53   -
54   - return hw_rev;
55   -}
56   -
57   -#ifdef CONFIG_CMD_NAND
58   -static void otc570_nand_hw_init(void)
59   -{
60   - unsigned long csa;
61   - at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0;
62   - at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
63   -
64   - /* Enable CS3 */
65   - csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
66   - writel(csa, &matrix->csa[0]);
67   -
68   - /* Configure SMC CS3 for NAND/SmartMedia */
69   - writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
70   - AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2),
71   - &smc->cs[3].setup);
72   -
73   - writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
74   - AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
75   - &smc->cs[3].pulse);
76   -
77   - writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
78   - &smc->cs[3].cycle);
79   - writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
80   - AT91_SMC_MODE_EXNW_DISABLE |
81   - AT91_SMC_MODE_DBW_8 |
82   - AT91_SMC_MODE_TDF_CYCLE(12),
83   - &smc->cs[3].mode);
84   -
85   - /* Configure RDY/BSY */
86   - gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
87   -
88   - /* Enable NandFlash */
89   - gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
90   -}
91   -#endif /* CONFIG_CMD_NAND */
92   -
93   -#ifdef CONFIG_MACB
94   -static void otc570_macb_hw_init(void)
95   -{
96   - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
97   - /* Enable clock */
98   - writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
99   - at91_macb_hw_init();
100   -}
101   -#endif
102   -
103   -/*
104   - * Static memory controller initialization to enable Beckhoff ET1100 EtherCAT
105   - * controller debugging
106   - * The ET1100 is located at physical address 0x70000000
107   - * Its process memory is located at physical address 0x70001000
108   - */
109   -static void otc570_ethercat_hw_init(void)
110   -{
111   - at91_smc_t *smc1 = (at91_smc_t *) ATMEL_BASE_SMC1;
112   -
113   - /* Configure SMC EBI1_CS0 for EtherCAT */
114   - writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
115   - AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0),
116   - &smc1->cs[0].setup);
117   - writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(9) |
118   - AT91_SMC_PULSE_NRD(5) | AT91_SMC_PULSE_NCS_RD(9),
119   - &smc1->cs[0].pulse);
120   - writel(AT91_SMC_CYCLE_NWE(10) | AT91_SMC_CYCLE_NRD(6),
121   - &smc1->cs[0].cycle);
122   - /*
123   - * Configure behavior at external wait signal, byte-select mode, 16 bit
124   - * data bus width, none data float wait states and TDF optimization
125   - */
126   - writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_EXNW_READY |
127   - AT91_SMC_MODE_DBW_16 | AT91_SMC_MODE_TDF_CYCLE(0) |
128   - AT91_SMC_MODE_TDF, &smc1->cs[0].mode);
129   -
130   - /* Configure RDY/BSY */
131   - at91_set_b_periph(AT91_PIO_PORTE, 20, 0); /* EBI1_NWAIT */
132   -}
133   -
134   -#ifdef CONFIG_LCD
135   -/* Number of columns and rows, pixel clock in Hz and hsync/vsync polarity */
136   -vidinfo_t panel_info = {
137   - .vl_col = 640,
138   - .vl_row = 480,
139   - .vl_clk = 25175000,
140   - .vl_sync = ATMEL_LCDC_INVLINE_INVERTED |
141   - ATMEL_LCDC_INVFRAME_INVERTED,
142   -
143   - .vl_bpix = LCD_BPP,/* Bits per pixel, 0 = 1bit, 3 = 8bit */
144   - .vl_tft = 1, /* 0 = passive, 1 = TFT */
145   - .vl_vsync_len = 1, /* Length of vertical sync in NOL */
146   - .vl_upper_margin = 35, /* Idle lines at the frame start */
147   - .vl_lower_margin = 5, /* Idle lines at the end of the frame */
148   - .vl_hsync_len = 5, /* Width of the LCDHSYNC pulse */
149   - .vl_left_margin = 112, /* Idle cycles at the line beginning */
150   - .vl_right_margin = 1, /* Idle cycles at the end of the line */
151   -
152   - .mmio = ATMEL_BASE_LCDC,
153   -};
154   -
155   -void lcd_enable(void)
156   -{
157   - at91_set_pio_value(AT91_PIO_PORTA, 30, 0); /* power up */
158   -}
159   -
160   -void lcd_disable(void)
161   -{
162   - at91_set_pio_value(AT91_PIO_PORTA, 30, 1); /* power down */
163   -}
164   -
165   -static void otc570_lcd_hw_init(void)
166   -{
167   - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
168   -
169   - at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */
170   - at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */
171   - at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */
172   - at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */
173   - at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */
174   - at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */
175   - at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */
176   - at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */
177   - at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */
178   - at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */
179   - at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */
180   - at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */
181   - at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */
182   - at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */
183   - at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */
184   - at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */
185   - at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */
186   - at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */
187   - at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */
188   - at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */
189   - at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */
190   - at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */
191   - at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */
192   - at91_set_pio_output(AT91_PIO_PORTA, 30, 1); /* PCI */
193   -
194   - writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
195   -}
196   -
197   -#ifdef CONFIG_LCD_INFO
198   -void lcd_show_board_info(void)
199   -{
200   - ulong dram_size, nand_size;
201   - int i;
202   - char temp[32];
203   -
204   - dram_size = 0;
205   - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
206   - dram_size += gd->bd->bi_dram[i].size;
207   - nand_size = 0;
208   - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
209   - nand_size += nand_info[i].size;
210   -
211   - lcd_printf("\n%s\n", U_BOOT_VERSION);
212   - lcd_printf("CPU at %s MHz\n", strmhz(temp, get_cpu_clk_rate()));
213   - lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
214   - dram_size >> 20,
215   - nand_size >> 20 );
216   - lcd_printf(" Board : esd ARM9 HMI Panel - OTC570\n");
217   - lcd_printf(" Hardware-revision: 1.%d\n", get_hw_rev());
218   - lcd_printf(" Mach-type : %lu\n", gd->bd->bi_arch_number);
219   -}
220   -#endif /* CONFIG_LCD_INFO */
221   -#endif /* CONFIG_LCD */
222   -
223   -int dram_init(void)
224   -{
225   - gd->ram_size = get_ram_size(
226   - (void *)CONFIG_SYS_SDRAM_BASE,
227   - CONFIG_SYS_SDRAM_SIZE);
228   - return 0;
229   -}
230   -
231   -int board_eth_init(bd_t *bis)
232   -{
233   - int rc = 0;
234   -#ifdef CONFIG_MACB
235   - rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
236   -#endif
237   - return rc;
238   -}
239   -
240   -int checkboard(void)
241   -{
242   - char str[32];
243   -
244   - puts("Board : esd ARM9 HMI Panel - OTC570");
245   - if (getenv_f("serial#", str, sizeof(str)) > 0) {
246   - puts(", serial# ");
247   - puts(str);
248   - }
249   - printf("\n");
250   - printf("Hardware-revision: 1.%d\n", get_hw_rev());
251   - printf("Mach-type : %lu\n", gd->bd->bi_arch_number);
252   - return 0;
253   -}
254   -
255   -#ifdef CONFIG_SERIAL_TAG
256   -void get_board_serial(struct tag_serialnr *serialnr)
257   -{
258   - char *str;
259   -
260   - char *serial = getenv("serial#");
261   - if (serial) {
262   - str = strchr(serial, '_');
263   - if (str && (strlen(str) >= 4)) {
264   - serialnr->high = (*(str + 1) << 8) | *(str + 2);
265   - serialnr->low = simple_strtoul(str + 3, NULL, 16);
266   - }
267   - } else {
268   - serialnr->high = 0;
269   - serialnr->low = 0;
270   - }
271   -}
272   -#endif
273   -
274   -#ifdef CONFIG_REVISION_TAG
275   -u32 get_board_rev(void)
276   -{
277   - return hw_rev | 0x100;
278   -}
279   -#endif
280   -
281   -#ifdef CONFIG_MISC_INIT_R
282   -int misc_init_r(void)
283   -{
284   - char str[64];
285   - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
286   -
287   - at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
288   - at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
289   - at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */
290   - writel(1 << ATMEL_ID_USART0, &pmc->pcer);
291   - /* Set USART_MODE = 1 (RS485) */
292   - writel(1, 0xFFF8C004);
293   -
294   - printf("USART0: ");
295   -
296   - if (getenv_f("usart0", str, sizeof(str)) == -1) {
297   - printf("No entry - assuming 1-wire\n");
298   - /* CTS pin, works as mode select pin (0 = 1-wire; 1 = RS485) */
299   - at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
300   - } else {
301   - if (strcmp(str, "1-wire") == 0) {
302   - printf("%s\n", str);
303   - at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
304   - } else if (strcmp(str, "rs485") == 0) {
305   - printf("%s\n", str);
306   - at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
307   - } else {
308   - printf("Wrong entry - assuming 1-wire ");
309   - printf("(valid values are '1-wire' or 'rs485')\n");
310   - at91_set_pio_output(AT91_PIO_PORTA, 29, 0);
311   - }
312   - }
313   -#ifdef CONFIG_LCD
314   - printf("Display memory address: 0x%08lX\n", gd->fb_base);
315   -#endif
316   -
317   - return 0;
318   -}
319   -#endif /* CONFIG_MISC_INIT_R */
320   -
321   -int board_early_init_f(void)
322   -{
323   - at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
324   -
325   - /* enable all clocks */
326   - writel((1 << ATMEL_ID_PIOA) |
327   - (1 << ATMEL_ID_PIOB) |
328   - (1 << ATMEL_ID_PIOCDE) |
329   - (1 << ATMEL_ID_TWI) |
330   - (1 << ATMEL_ID_SPI0) |
331   -#ifdef CONFIG_LCD
332   - (1 << ATMEL_ID_LCDC) |
333   -#endif
334   - (1 << ATMEL_ID_UHP),
335   - &pmc->pcer);
336   -
337   - at91_seriald_hw_init();
338   -
339   - /* arch number of OTC570-Board */
340   - gd->bd->bi_arch_number = MACH_TYPE_OTC570;
341   -
342   - return 0;
343   -}
344   -
345   -int board_init(void)
346   -{
347   - /* initialize ET1100 Controller */
348   - otc570_ethercat_hw_init();
349   -
350   - /* adress of boot parameters */
351   - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
352   -
353   -#ifdef CONFIG_CMD_NAND
354   - otc570_nand_hw_init();
355   -#endif
356   -#ifdef CONFIG_HAS_DATAFLASH
357   - at91_spi0_hw_init(1 << 0);
358   -#endif
359   -#ifdef CONFIG_MACB
360   - otc570_macb_hw_init();
361   -#endif
362   -#ifdef CONFIG_AT91_CAN
363   - at91_can_hw_init();
364   -#endif
365   -#ifdef CONFIG_USB_OHCI_NEW
366   - at91_uhp_hw_init();
367   -#endif
368   -#ifdef CONFIG_LCD
369   - otc570_lcd_hw_init();
370   -#endif
371   - return 0;
372   -}
board/esd/otc570/partition.c
View file @ 819216d
1   -/*
2   - * (C) Copyright 2008
3   - * Ulf Samuelsson <ulf@atmel.com>
4   - *
5   - * SPDX-License-Identifier: GPL-2.0+
6   - */
7   -#include <common.h>
8   -#include <config.h>
9   -#include <asm/hardware.h>
10   -#include <dataflash.h>
11   -
12   -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
13   -
14   -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
15   - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
16   -};
17   -
18   -/* define the area offsets */
19   -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
20   - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
21   - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
22   - {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
23   -};
configs/otc570_dataflash_defconfig
View file @ 819216d
1   -CONFIG_ARM=y
2   -CONFIG_ARCH_AT91=y
3   -CONFIG_TARGET_OTC570=y
4   -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
5   -# CONFIG_CMD_IMLS is not set
6   -# CONFIG_CMD_LOADS is not set
7   -# CONFIG_CMD_FPGA is not set
8   -# CONFIG_CMD_SETEXPR is not set
configs/otc570_defconfig
View file @ 819216d
1   -CONFIG_ARM=y
2   -CONFIG_ARCH_AT91=y
3   -CONFIG_TARGET_OTC570=y
4   -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
5   -# CONFIG_CMD_IMLS is not set
6   -# CONFIG_CMD_LOADS is not set
7   -# CONFIG_CMD_FPGA is not set
8   -# CONFIG_CMD_SETEXPR is not set
include/configs/otc570.h
View file @ 819216d
1   -/*
2   - * (C) Copyright 2010-2011
3   - * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
4   - * esd electronic system design gmbh <www.esd.eu>
5   - *
6   - * (C) Copyright 2007-2008
7   - * Stelian Pop <stelian@popies.net>
8   - * Lead Tech Design <www.leadtechdesign.com>
9   - *
10   - * Configuation settings for the esd OTC570 board.
11   - *
12   - * SPDX-License-Identifier: GPL-2.0+
13   - */
14   -
15   -#ifndef __CONFIG_H
16   -#define __CONFIG_H
17   -
18   -/*
19   - * SoC must be defined first, before hardware.h is included.
20   - * In this case SoC is defined in boards.cfg.
21   - */
22   -#include <asm/hardware.h>
23   -
24   -/*
25   - * Warning: changing CONFIG_SYS_TEXT_BASE requires
26   - * adapting the initial boot program.
27   - * Since the linker has to swallow that define, we must use a pure
28   - * hex number here!
29   - */
30   -#define CONFIG_SYS_TEXT_BASE 0x20002000
31   -
32   -/*
33   - * since a number of boards are not being listed in linux
34   - * arch/arm/tools/mach-types any more, the mach-types have to be
35   - * defined here
36   - */
37   -#define MACH_TYPE_OTC570 2166
38   -
39   -/* ARM asynchronous clock */
40   -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
41   -#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
42   -
43   -/* Misc CPU related */
44   -#define CONFIG_SKIP_LOWLEVEL_INIT
45   -#define CONFIG_ARCH_CPU_INIT
46   -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
47   -#define CONFIG_SETUP_MEMORY_TAGS
48   -#define CONFIG_INITRD_TAG
49   -#define CONFIG_SERIAL_TAG
50   -#define CONFIG_REVISION_TAG
51   -#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
52   -#define CONFIG_MISC_INIT_R /* Call misc_init_r */
53   -
54   -#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
55   -#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
56   -#define CONFIG_PREBOOT /* enable preboot variable */
57   -
58   -/*
59   - * Hardware drivers
60   - */
61   -
62   -/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
63   -#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
64   -
65   -/* general purpose I/O */
66   -#define CONFIG_AT91_GPIO
67   -
68   -/* Console output */
69   -#define CONFIG_ATMEL_USART
70   -#define CONFIG_USART_BASE ATMEL_BASE_DBGU
71   -#define CONFIG_USART_ID ATMEL_ID_SYS
72   -#define CONFIG_BAUDRATE 115200
73   -
74   -#define CONFIG_BOOTDELAY 3
75   -#define CONFIG_ZERO_BOOTDELAY_CHECK
76   -
77   -/* LCD */
78   -#define CONFIG_LCD
79   -#undef CONFIG_SPLASH_SCREEN
80   -
81   -#ifdef CONFIG_LCD
82   -# define LCD_BPP LCD_COLOR8
83   -
84   -# ifndef CONFIG_SPLASH_SCREEN
85   -# define CONFIG_LCD_LOGO
86   -# define CONFIG_LCD_INFO
87   -# undef CONFIG_LCD_INFO_BELOW_LOGO
88   -# endif /* CONFIG_SPLASH_SCREEN */
89   -
90   -# undef LCD_TEST_PATTERN
91   -# define CONFIG_SYS_WHITE_ON_BLACK
92   -# define CONFIG_ATMEL_LCD
93   -# define CONFIG_SYS_CONSOLE_IS_IN_ENV
94   -# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
95   -# define CONFIG_CMD_BMP
96   -#endif /* CONFIG_LCD */
97   -
98   -/* RTC and I2C stuff */
99   -#define CONFIG_RTC_DS1338
100   -#define CONFIG_SYS_I2C_RTC_ADDR 0x68
101   -
102   -#define CONFIG_SYS_I2C
103   -#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
104   -#ifdef CONFIG_SYS_I2C_SOFT
105   -#define CONFIG_SYS_I2C_SOFT_SPEED 100000
106   -#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
107   -
108   -/* Configure data and clock pins for pio */
109   -# define I2C_INIT { \
110   - at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
111   - at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
112   -}
113   -# define I2C_SOFT_DECLARATIONS
114   -/* Configure data pin as output */
115   -# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
116   -/* Configure data pin as input */
117   -# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
118   -/* Read data pin */
119   -# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
120   -/* Set data pin */
121   -# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
122   -/* Set clock pin */
123   -# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
124   -# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
125   -#endif /* CONFIG_SYS_I2C_SOFT */
126   -
127   -/*
128   - * BOOTP options
129   - */
130   -#define CONFIG_BOOTP_BOOTFILESIZE
131   -#define CONFIG_BOOTP_BOOTPATH
132   -#define CONFIG_BOOTP_GATEWAY
133   -#define CONFIG_BOOTP_HOSTNAME
134   -
135   -/*
136   - * Command line configuration.
137   - */
138   -#define CONFIG_CMD_PING
139   -#define CONFIG_CMD_DHCP
140   -#define CONFIG_CMD_NAND
141   -#define CONFIG_CMD_USB
142   -#define CONFIG_CMD_I2C
143   -#define CONFIG_CMD_DATE
144   -
145   -/* LED */
146   -#define CONFIG_AT91_LED
147   -
148   -/*
149   - * SDRAM: 1 bank, min 32, max 128 MB
150   - * Initialized before u-boot gets started.
151   - */
152   -#define CONFIG_NR_DRAM_BANKS 1
153   -#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
154   -#define CONFIG_SYS_SDRAM_SIZE 0x04000000
155   -
156   -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
157   -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
158   -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
159   -
160   -/*
161   - * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
162   - * leaving the correct space for initial global data structure above
163   - * that address while providing maximum stack area below.
164   - */
165   -#define CONFIG_SYS_INIT_SP_ADDR \
166   - (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
167   -
168   -/* DataFlash */
169   -#ifdef CONFIG_SYS_USE_DATAFLASH
170   -# define CONFIG_ATMEL_DATAFLASH_SPI
171   -# define CONFIG_HAS_DATAFLASH
172   -# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
173   -# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
174   -# define AT91_SPI_CLK 15000000
175   -# define DATAFLASH_TCSS (0x1a << 16)
176   -# define DATAFLASH_TCHS (0x1 << 24)
177   -#endif
178   -
179   -/* NOR flash is not populated, disable it */
180   -#define CONFIG_SYS_NO_FLASH
181   -
182   -/* NAND flash */
183   -#ifdef CONFIG_CMD_NAND
184   -# define CONFIG_NAND_ATMEL
185   -# define CONFIG_SYS_MAX_NAND_DEVICE 1
186   -# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
187   -# define CONFIG_SYS_NAND_DBW_8
188   -# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
189   -# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
190   -# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
191   -# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
192   -#endif
193   -
194   -/* Ethernet */
195   -#define CONFIG_MACB
196   -#define CONFIG_RMII
197   -#define CONFIG_FIT
198   -#define CONFIG_NET_RETRY_COUNT 20
199   -#undef CONFIG_RESET_PHY_R
200   -
201   -/* USB */
202   -#define CONFIG_USB_ATMEL
203   -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
204   -#define CONFIG_USB_OHCI_NEW
205   -#define CONFIG_DOS_PARTITION
206   -#define CONFIG_SYS_USB_OHCI_CPU_INIT
207   -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
208   -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
209   -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
210   -#define CONFIG_USB_STORAGE
211   -#define CONFIG_CMD_FAT
212   -
213   -/* CAN */
214   -#define CONFIG_AT91_CAN
215   -
216   -/* hw-controller addresses */
217   -#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
218   -
219   -#ifdef CONFIG_SYS_USE_DATAFLASH
220   -
221   -/* bootstrap + u-boot + env in dataflash on CS0 */
222   -# define CONFIG_ENV_IS_IN_DATAFLASH
223   -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
224   - 0x8400)
225   -# define CONFIG_ENV_OFFSET 0x4200
226   -# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
227   - CONFIG_ENV_OFFSET)
228   -# define CONFIG_ENV_SIZE 0x4200
229   -
230   -#elif CONFIG_SYS_USE_NANDFLASH
231   -
232   -/* bootstrap + u-boot + env + linux in nandflash */
233   -# define CONFIG_ENV_IS_IN_NAND 1
234   -# define CONFIG_ENV_OFFSET 0xC0000
235   -# define CONFIG_ENV_SIZE 0x20000
236   -
237   -#endif
238   -
239   -#define CONFIG_SYS_CBSIZE 512
240   -#define CONFIG_SYS_MAXARGS 16
241   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
242   - sizeof(CONFIG_SYS_PROMPT) + 16)
243   -#define CONFIG_SYS_LONGHELP
244   -#define CONFIG_CMDLINE_EDITING
245   -
246   -/*
247   - * Size of malloc() pool
248   - */
249   -#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
250   - 128*1024, 0x1000)
251   -
252   -#endif