armv8/cache: Flush D-cache, invalidate I-cache for relocation

If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>

armv8/cache: Flush D-cache, invalidate I-cache for relocation
If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
York Sun · Albert ARIBAUD
1 parent f5222cfd49
Showing 2 changed files with 19 additions and 6 deletions Side-by-side Diff
arch/arm/cpu/armv8/start.S
arch/arm/lib/relocate_64.S
@@ -122,12 +122,6 @@
 /*-----------------------------------------------------------------------*/
  
 ENTRY(c_runtime_cpu_setup)
-	/* If I-cache is enabled invalidate it */
-#ifndef CONFIG_SYS_ICACHE_OFF
-	ic	iallu			/* I+BTB cache invalidate */
-	isb	sy
-#endif
-
 	/* Relocate vBAR */
 	adr	x0, vectors
 	switch_el x1, 3f, 2f, 1f
@@ -11,6 +11,7 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <linux/linkage.h>
+#include <asm/macro.h>
  
 /*
  * void relocate_code (addr_moni)
@@ -19,6 +20,9 @@
  * x0 holds the destination address.
  */
 ENTRY(relocate_code)
+	stp	x29, x30, [sp, #-32]!	/* create a stack frame */
+	mov	x29, sp
+	str	x0, [sp, #16]
 	/*
 	 * Copy u-boot from flash to RAM
 	 */
@@ -32,6 +36,7 @@
 	stp	x10, x11, [x0], #16	/* copy to   target address [x0] */
 	cmp	x1, x2			/* until source end address [x2] */
 	b.lo	copy_loop
+	str	x0, [sp, #24]
  
 	/*
 	 * Fix .rela.dyn relocations
@@ -54,6 +59,20 @@
 	b.lo	fixloop
  
 relocate_done:
+	switch_el x1, 3f, 2f, 1f
+	bl	hang
+3:	mrs	x0, sctlr_el3
+	b	0f
+2:	mrs	x0, sctlr_el2
+	b	0f
+1:	mrs	x0, sctlr_el1
+0:	tbz	w0, #2, 5f	/* skip flushing cache if disabled */
+	tbz	w0, #12, 4f	/* invalide i-cache is enabled */
+	ic	iallu		/* i-cache invalidate all */
+	isb	sy
+4:	ldp	x0, x1, [sp, #16]
+	bl	__asm_flush_dcache_range
+5:	ldp	x29, x30, [sp],#16
 	ret
 ENDPROC(relocate_code)
...	...	@@ -122,12 +122,6 @@
122	122	/-----------------------------------------------------------------------/
123	123
124	124	ENTRY(c_runtime_cpu_setup)
125		- /* If I-cache is enabled invalidate it */
126		-#ifndef CONFIG_SYS_ICACHE_OFF
127		- ic iallu /* I+BTB cache invalidate */
128		- isb sy
129		-#endif
130		-
131	125	/* Relocate vBAR */
132	126	adr x0, vectors
133	127	switch_el x1, 3f, 2f, 1f
...	...	@@ -11,6 +11,7 @@
11	11	#include <asm-offsets.h>
12	12	#include <config.h>
13	13	#include <linux/linkage.h>
	14	+#include <asm/macro.h>
14	15
15	16	/*
16	17	* void relocate_code (addr_moni)
...	...	@@ -19,6 +20,9 @@
19	20	* x0 holds the destination address.
20	21	*/
21	22	ENTRY(relocate_code)
	23	+ stp x29, x30, [sp, #-32]! /* create a stack frame */
	24	+ mov x29, sp
	25	+ str x0, [sp, #16]
22	26	/*
23	27	* Copy u-boot from flash to RAM
24	28	*/
...	...	@@ -32,6 +36,7 @@
32	36	stp x10, x11, [x0], #16 /* copy to target address [x0] */
33	37	cmp x1, x2 /* until source end address [x2] */
34	38	b.lo copy_loop
	39	+ str x0, [sp, #24]
35	40
36	41	/*
37	42	* Fix .rela.dyn relocations
...	...	@@ -54,6 +59,20 @@
54	59	b.lo fixloop
55	60
56	61	relocate_done:
	62	+ switch_el x1, 3f, 2f, 1f
	63	+ bl hang
	64	+3: mrs x0, sctlr_el3
	65	+ b 0f
	66	+2: mrs x0, sctlr_el2
	67	+ b 0f
	68	+1: mrs x0, sctlr_el1
	69	+0: tbz w0, #2, 5f /* skip flushing cache if disabled */
	70	+ tbz w0, #12, 4f /* invalide i-cache is enabled */
	71	+ ic iallu /* i-cache invalidate all */
	72	+ isb sy
	73	+4: ldp x0, x1, [sp, #16]
	74	+ bl __asm_flush_dcache_range
	75	+5: ldp x29, x30, [sp],#16
57	76	ret
58	77	ENDPROC(relocate_code)