Commit 85dd18bf4a84eba574ec29b8f7fb567f557fdbdd
1 parent
98106db612
Exists in
v2013.10-smarct33
Fixed RMII Clock to be Sourced From Chip Pin
Showing 1 changed file with 2 additions and 1 deletions Side-by-side Diff
board/embedian/smarct335x/board.c
| ... | ... | @@ -483,6 +483,7 @@ |
| 483 | 483 | &ddr3_beagleblack_data, |
| 484 | 484 | &ddr3_beagleblack_cmd_ctrl_data, |
| 485 | 485 | &ddr3_beagleblack_emif_reg_data, 0); |
| 486 | + puts("Set DDR3 to 800MHz.\n"); | |
| 486 | 487 | } |
| 487 | 488 | else if (board_is_evm_15_or_later(&header)) |
| 488 | 489 | config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, |
| ... | ... | @@ -621,7 +622,7 @@ |
| 621 | 622 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 622 | 623 | PHY_INTERFACE_MODE_MII; |
| 623 | 624 | } else if (board_is_smarc_t335x(&header) || board_is_smarc_t335x_1g(&header)) { |
| 624 | - writel(RMII_MODE_ENABLE, &cdev->miisel); | |
| 625 | + writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); | |
| 625 | 626 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 626 | 627 | PHY_INTERFACE_MODE_RMII; |
| 627 | 628 | } else { |