ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.c

Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>

ARM: keystone: aemif: move aemif driver to drivers/memory/ti-aemif.c
Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan · Tom Rini
1 parent 3e01ed00da
Showing 10 changed files with 134 additions and 109 deletions Side-by-side Diff
arch/arm/cpu/armv7/keystone/Makefile
arch/arm/cpu/armv7/keystone/aemif.c
arch/arm/include/asm/arch-keystone/hardware-k2hk.h
arch/arm/include/asm/arch-keystone/hardware.h
arch/arm/include/asm/ti-common/ti-aemif.h
board/ti/k2hk_evm/board.c
drivers/Makefile
drivers/memory/Makefile
drivers/memory/ti-aemif.c
include/configs/k2hk_evm.h
@@ -5,7 +5,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
  
-obj-y	+= aemif.o
 obj-y	+= init.o
 obj-y	+= psc.o
 obj-y	+= clock.o
-/*
- * Keystone2: Asynchronous EMIF Configuration
- *
- * (C) Copyright 2012-2014
- *     Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/ti-common/davinci_nand.h>
-
-#define AEMIF_CFG_SELECT_STROBE(v)	((v) ? 1 << 31 : 0)
-#define AEMIF_CFG_EXTEND_WAIT(v)	((v) ? 1 << 30 : 0)
-#define AEMIF_CFG_WR_SETUP(v)		(((v) & 0x0f) << 26)
-#define AEMIF_CFG_WR_STROBE(v)		(((v) & 0x3f) << 20)
-#define AEMIF_CFG_WR_HOLD(v)		(((v) & 0x07) << 17)
-#define AEMIF_CFG_RD_SETUP(v)		(((v) & 0x0f) << 13)
-#define AEMIF_CFG_RD_STROBE(v)		(((v) & 0x3f) << 7)
-#define AEMIF_CFG_RD_HOLD(v)		(((v) & 0x07) << 4)
-#define AEMIF_CFG_TURN_AROUND(v)	(((v) & 0x03) << 2)
-#define AEMIF_CFG_WIDTH(v)		(((v) & 0x03) << 0)
-
-#define set_config_field(reg, field, val)			\
-	do {							\
-		if (val != -1) {				\
-			reg &= ~AEMIF_CFG_##field(0xffffffff);	\
-			reg |=	AEMIF_CFG_##field(val);		\
-		}						\
-	} while (0)
-
-void configure_async_emif(int cs, struct async_emif_config *cfg)
-{
-	unsigned long tmp;
-
-	if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
-		tmp = __raw_readl(&davinci_emif_regs->nandfcr);
-		tmp |= (1 << cs);
-		__raw_writel(tmp, &davinci_emif_regs->nandfcr);
-
-	} else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
-		tmp = __raw_readl(&davinci_emif_regs->one_nand_cr);
-		tmp |= (1 << cs);
-		__raw_writel(tmp, &davinci_emif_regs->one_nand_cr);
-	}
-
-	tmp = __raw_readl(&davinci_emif_regs->abncr[cs]);
-
-	set_config_field(tmp, SELECT_STROBE,	cfg->select_strobe);
-	set_config_field(tmp, EXTEND_WAIT,	cfg->extend_wait);
-	set_config_field(tmp, WR_SETUP,		cfg->wr_setup);
-	set_config_field(tmp, WR_STROBE,	cfg->wr_strobe);
-	set_config_field(tmp, WR_HOLD,		cfg->wr_hold);
-	set_config_field(tmp, RD_SETUP,		cfg->rd_setup);
-	set_config_field(tmp, RD_STROBE,	cfg->rd_strobe);
-	set_config_field(tmp, RD_HOLD,		cfg->rd_hold);
-	set_config_field(tmp, TURN_AROUND,	cfg->turn_around);
-	set_config_field(tmp, WIDTH,		cfg->width);
-
-	__raw_writel(tmp, &davinci_emif_regs->abncr[cs]);
-}
-
-void init_async_emif(int num_cs, struct async_emif_config *config)
-{
-	int cs;
-
-	for (cs = 0; cs < num_cs; cs++)
-		configure_async_emif(cs, config + cs);
-}
@@ -9,13 +9,6 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
  
-#define K2HK_ASYNC_EMIF_CNTRL_BASE      0x21000a00
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE   K2HK_ASYNC_EMIF_CNTRL_BASE
-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE   0x30000000
-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE   0x34000000
-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE   0x38000000
-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE   0x3c000000
-
 #define K2HK_PLL_CNTRL_BASE             0x02310000
 #define CLOCK_BASE                      K2HK_PLL_CNTRL_BASE
 #define KS2_RSTCTRL                     (K2HK_PLL_CNTRL_BASE + 0xe8)
@@ -22,32 +22,6 @@
 typedef volatile unsigned int   dv_reg;
 typedef volatile unsigned int   *dv_reg_p;
  
-#define ASYNC_EMIF_NUM_CS               4
-#define ASYNC_EMIF_MODE_NOR             0
-#define ASYNC_EMIF_MODE_NAND            1
-#define ASYNC_EMIF_MODE_ONENAND         2
-#define ASYNC_EMIF_PRESERVE             -1
-
-struct async_emif_config {
-	unsigned mode;
-	unsigned select_strobe;
-	unsigned extend_wait;
-	unsigned wr_setup;
-	unsigned wr_strobe;
-	unsigned wr_hold;
-	unsigned rd_setup;
-	unsigned rd_strobe;
-	unsigned rd_hold;
-	unsigned turn_around;
-	enum {
-		ASYNC_EMIF_8	= 0,
-		ASYNC_EMIF_16	= 1,
-		ASYNC_EMIF_32	= 2,
-	} width;
-};
-
-void init_async_emif(int num_cs, struct async_emif_config *config);
-
 struct ddr3_phy_config {
 	unsigned int pllcr;
 	unsigned int pgcr1_mask;
@@ -144,6 +118,10 @@
  
 #define KS2_UART0_BASE                	0x02530c00
 #define KS2_UART1_BASE                	0x02531000
+
+/* AEMIF */
+#define KS2_AEMIF_CNTRL_BASE       	0x21000a00
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE   KS2_AEMIF_CNTRL_BASE
  
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/hardware-k2hk.h>
+/*
+ * AEMIF definitions
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _AEMIF_H_
+#define _AEMIF_H_
+
+#define AEMIF_NUM_CS               4
+#define AEMIF_MODE_NOR             0
+#define AEMIF_MODE_NAND            1
+#define AEMIF_MODE_ONENAND         2
+#define AEMIF_PRESERVE             -1
+
+struct aemif_config {
+	unsigned mode;
+	unsigned select_strobe;
+	unsigned extend_wait;
+	unsigned wr_setup;
+	unsigned wr_strobe;
+	unsigned wr_hold;
+	unsigned rd_setup;
+	unsigned rd_strobe;
+	unsigned rd_hold;
+	unsigned turn_around;
+	enum {
+		AEMIF_WIDTH_8	= 0,
+		AEMIF_WIDTH_16	= 1,
+		AEMIF_WIDTH_32	= 2,
+	} width;
+};
+
+void aemif_init(int num_cs, struct aemif_config *config);
+
+#endif
@@ -18,6 +18,7 @@
 #include <asm/mach-types.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/psc_defs.h>
+#include <asm/ti-common/ti-aemif.h>
  
 DECLARE_GLOBAL_DATA_PTR;
  
  
@@ -39,9 +40,9 @@
 						what is that */
 };
  
-static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
+static struct aemif_config aemif_configs[] = {
 	{			/* CS0 */
-		.mode		= ASYNC_EMIF_MODE_NAND,
+		.mode		= AEMIF_MODE_NAND,
 		.wr_setup	= 0xf,
 		.wr_strobe	= 0x3f,
 		.wr_hold	= 7,
@@ -49,7 +50,7 @@
 		.rd_strobe	= 0x3f,
 		.rd_hold	= 7,
 		.turn_around	= 3,
-		.width		= ASYNC_EMIF_8,
+		.width		= AEMIF_WIDTH_8,
 	},
  
 };
@@ -66,7 +67,7 @@
  
 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
 				    CONFIG_MAX_RAM_BANK_SIZE);
-	init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
+	aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
 	return 0;
 }
  
@@ -14,4 +14,5 @@
 obj-y += video/
 obj-y += watchdog/
 obj-$(CONFIG_QE) += qe/
+obj-y += memory/
+obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
+/*
+ * Keystone2: Asynchronous EMIF Configuration
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/ti-common/ti-aemif.h>
+
+#define AEMIF_WAITCYCLE_CONFIG		(CONFIG_AEMIF_CNTRL_BASE + 0x4)
+#define AEMIF_NAND_CONTROL		(CONFIG_AEMIF_CNTRL_BASE + 0x60)
+#define AEMIF_ONENAND_CONTROL		(CONFIG_AEMIF_CNTRL_BASE + 0x5c)
+#define AEMIF_CONFIG(cs)		(CONFIG_AEMIF_CNTRL_BASE + 0x10 \
+					 + (cs * 4))
+
+#define AEMIF_CFG_SELECT_STROBE(v)	((v) ? 1 << 31 : 0)
+#define AEMIF_CFG_EXTEND_WAIT(v)	((v) ? 1 << 30 : 0)
+#define AEMIF_CFG_WR_SETUP(v)		(((v) & 0x0f) << 26)
+#define AEMIF_CFG_WR_STROBE(v)		(((v) & 0x3f) << 20)
+#define AEMIF_CFG_WR_HOLD(v)		(((v) & 0x07) << 17)
+#define AEMIF_CFG_RD_SETUP(v)		(((v) & 0x0f) << 13)
+#define AEMIF_CFG_RD_STROBE(v)		(((v) & 0x3f) << 7)
+#define AEMIF_CFG_RD_HOLD(v)		(((v) & 0x07) << 4)
+#define AEMIF_CFG_TURN_AROUND(v)	(((v) & 0x03) << 2)
+#define AEMIF_CFG_WIDTH(v)		(((v) & 0x03) << 0)
+
+#define set_config_field(reg, field, val)			\
+	do {							\
+		if (val != -1) {				\
+			reg &= ~AEMIF_CFG_##field(0xffffffff);	\
+			reg |=	AEMIF_CFG_##field(val);		\
+		}						\
+	} while (0)
+
+static void aemif_configure(int cs, struct aemif_config *cfg)
+{
+	unsigned long tmp;
+
+	if (cfg->mode == AEMIF_MODE_NAND) {
+		tmp = __raw_readl(AEMIF_NAND_CONTROL);
+		tmp |= (1 << cs);
+		__raw_writel(tmp, AEMIF_NAND_CONTROL);
+
+	} else if (cfg->mode == AEMIF_MODE_ONENAND) {
+		tmp = __raw_readl(AEMIF_ONENAND_CONTROL);
+		tmp |= (1 << cs);
+		__raw_writel(tmp, AEMIF_ONENAND_CONTROL);
+	}
+
+	tmp = __raw_readl(AEMIF_CONFIG(cs));
+
+	set_config_field(tmp, SELECT_STROBE,	cfg->select_strobe);
+	set_config_field(tmp, EXTEND_WAIT,	cfg->extend_wait);
+	set_config_field(tmp, WR_SETUP,		cfg->wr_setup);
+	set_config_field(tmp, WR_STROBE,	cfg->wr_strobe);
+	set_config_field(tmp, WR_HOLD,		cfg->wr_hold);
+	set_config_field(tmp, RD_SETUP,		cfg->rd_setup);
+	set_config_field(tmp, RD_STROBE,	cfg->rd_strobe);
+	set_config_field(tmp, RD_HOLD,		cfg->rd_hold);
+	set_config_field(tmp, TURN_AROUND,	cfg->turn_around);
+	set_config_field(tmp, WIDTH,		cfg->width);
+
+	__raw_writel(tmp, AEMIF_CONFIG(cs));
+}
+
+void aemif_init(int num_cs, struct aemif_config *config)
+{
+	int cs;
+
+	if (num_cs > AEMIF_NUM_CS) {
+		num_cs = AEMIF_NUM_CS;
+		printf("AEMIF: csnum has to be <= 5");
+	}
+
+	for (cs = 0; cs < num_cs; cs++)
+		aemif_configure(cs, config + cs);
+}
@@ -129,6 +129,10 @@
 #define CONFIG_SYS_SGMII_LINERATE_MHZ          1250
 #define CONFIG_SYS_SGMII_RATESCALE             2
  
+/* AEMIF */
+#define CONFIG_TI_AEMIF
+#define CONFIG_AEMIF_CNTRL_BASE		       KS2_AEMIF_CNTRL_BASE
+
 /* NAND Configuration */
 #define CONFIG_NAND_DAVINCI
 #define CONFIG_CMD_NAND_ECCLAYOUT
...	...	@@ -5,7 +5,6 @@
5	5	# SPDX-License-Identifier: GPL-2.0+
6	6	#
7	7
8		-obj-y += aemif.o
9	8	obj-y += init.o
10	9	obj-y += psc.o
11	10	obj-y += clock.o
1		-/*
2		- * Keystone2: Asynchronous EMIF Configuration
3		- *
4		- * (C) Copyright 2012-2014
5		- * Texas Instruments Incorporated, <www.ti.com>
6		- *
7		- * SPDX-License-Identifier: GPL-2.0+
8		- */
9		-
10		-#include <common.h>
11		-#include <asm/io.h>
12		-#include <asm/arch/clock.h>
13		-#include <asm/ti-common/davinci_nand.h>
14		-
15		-#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
16		-#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
17		-#define AEMIF_CFG_WR_SETUP(v) (((v) & 0x0f) << 26)
18		-#define AEMIF_CFG_WR_STROBE(v) (((v) & 0x3f) << 20)
19		-#define AEMIF_CFG_WR_HOLD(v) (((v) & 0x07) << 17)
20		-#define AEMIF_CFG_RD_SETUP(v) (((v) & 0x0f) << 13)
21		-#define AEMIF_CFG_RD_STROBE(v) (((v) & 0x3f) << 7)
22		-#define AEMIF_CFG_RD_HOLD(v) (((v) & 0x07) << 4)
23		-#define AEMIF_CFG_TURN_AROUND(v) (((v) & 0x03) << 2)
24		-#define AEMIF_CFG_WIDTH(v) (((v) & 0x03) << 0)
25		-
26		-#define set_config_field(reg, field, val) \
27		- do { \
28		- if (val != -1) { \
29		- reg &= ~AEMIF_CFG_##field(0xffffffff); \
30		- reg \|= AEMIF_CFG_##field(val); \
31		- } \
32		- } while (0)
33		-
34		-void configure_async_emif(int cs, struct async_emif_config *cfg)
35		-{
36		- unsigned long tmp;
37		-
38		- if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
39		- tmp = __raw_readl(&davinci_emif_regs->nandfcr);
40		- tmp \|= (1 << cs);
41		- __raw_writel(tmp, &davinci_emif_regs->nandfcr);
42		-
43		- } else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
44		- tmp = __raw_readl(&davinci_emif_regs->one_nand_cr);
45		- tmp \|= (1 << cs);
46		- __raw_writel(tmp, &davinci_emif_regs->one_nand_cr);
47		- }
48		-
49		- tmp = __raw_readl(&davinci_emif_regs->abncr[cs]);
50		-
51		- set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
52		- set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
53		- set_config_field(tmp, WR_SETUP, cfg->wr_setup);
54		- set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
55		- set_config_field(tmp, WR_HOLD, cfg->wr_hold);
56		- set_config_field(tmp, RD_SETUP, cfg->rd_setup);
57		- set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
58		- set_config_field(tmp, RD_HOLD, cfg->rd_hold);
59		- set_config_field(tmp, TURN_AROUND, cfg->turn_around);
60		- set_config_field(tmp, WIDTH, cfg->width);
61		-
62		- __raw_writel(tmp, &davinci_emif_regs->abncr[cs]);
63		-}
64		-
65		-void init_async_emif(int num_cs, struct async_emif_config *config)
66		-{
67		- int cs;
68		-
69		- for (cs = 0; cs < num_cs; cs++)
70		- configure_async_emif(cs, config + cs);
71		-}
...	...	@@ -9,13 +9,6 @@
9	9	#ifndef __ASM_ARCH_HARDWARE_K2HK_H
10	10	#define __ASM_ARCH_HARDWARE_K2HK_H
11	11
12		-#define K2HK_ASYNC_EMIF_CNTRL_BASE 0x21000a00
13		-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE K2HK_ASYNC_EMIF_CNTRL_BASE
14		-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
15		-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE 0x34000000
16		-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE 0x38000000
17		-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE 0x3c000000
18		-
19	12	#define K2HK_PLL_CNTRL_BASE 0x02310000
20	13	#define CLOCK_BASE K2HK_PLL_CNTRL_BASE
21	14	#define KS2_RSTCTRL (K2HK_PLL_CNTRL_BASE + 0xe8)
...	...	@@ -22,32 +22,6 @@
22	22	typedef volatile unsigned int dv_reg;
23	23	typedef volatile unsigned int *dv_reg_p;
24	24
25		-#define ASYNC_EMIF_NUM_CS 4
26		-#define ASYNC_EMIF_MODE_NOR 0
27		-#define ASYNC_EMIF_MODE_NAND 1
28		-#define ASYNC_EMIF_MODE_ONENAND 2
29		-#define ASYNC_EMIF_PRESERVE -1
30		-
31		-struct async_emif_config {
32		- unsigned mode;
33		- unsigned select_strobe;
34		- unsigned extend_wait;
35		- unsigned wr_setup;
36		- unsigned wr_strobe;
37		- unsigned wr_hold;
38		- unsigned rd_setup;
39		- unsigned rd_strobe;
40		- unsigned rd_hold;
41		- unsigned turn_around;
42		- enum {
43		- ASYNC_EMIF_8 = 0,
44		- ASYNC_EMIF_16 = 1,
45		- ASYNC_EMIF_32 = 2,
46		- } width;
47		-};
48		-
49		-void init_async_emif(int num_cs, struct async_emif_config *config);
50		-
51	25	struct ddr3_phy_config {
52	26	unsigned int pllcr;
53	27	unsigned int pgcr1_mask;
...	...	@@ -144,6 +118,10 @@
144	118
145	119	#define KS2_UART0_BASE 0x02530c00
146	120	#define KS2_UART1_BASE 0x02531000
	121	+
	122	+/* AEMIF */
	123	+#define KS2_AEMIF_CNTRL_BASE 0x21000a00
	124	+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
147	125
148	126	#ifdef CONFIG_SOC_K2HK
149	127	#include <asm/arch/hardware-k2hk.h>
	1	+/*
	2	+ * AEMIF definitions
	3	+ *
	4	+ * (C) Copyright 2012-2014
	5	+ * Texas Instruments Incorporated, <www.ti.com>
	6	+ *
	7	+ * SPDX-License-Identifier: GPL-2.0+
	8	+ */
	9	+
	10	+#ifndef _AEMIF_H_
	11	+#define _AEMIF_H_
	12	+
	13	+#define AEMIF_NUM_CS 4
	14	+#define AEMIF_MODE_NOR 0
	15	+#define AEMIF_MODE_NAND 1
	16	+#define AEMIF_MODE_ONENAND 2
	17	+#define AEMIF_PRESERVE -1
	18	+
	19	+struct aemif_config {
	20	+ unsigned mode;
	21	+ unsigned select_strobe;
	22	+ unsigned extend_wait;
	23	+ unsigned wr_setup;
	24	+ unsigned wr_strobe;
	25	+ unsigned wr_hold;
	26	+ unsigned rd_setup;
	27	+ unsigned rd_strobe;
	28	+ unsigned rd_hold;
	29	+ unsigned turn_around;
	30	+ enum {
	31	+ AEMIF_WIDTH_8 = 0,
	32	+ AEMIF_WIDTH_16 = 1,
	33	+ AEMIF_WIDTH_32 = 2,
	34	+ } width;
	35	+};
	36	+
	37	+void aemif_init(int num_cs, struct aemif_config *config);
	38	+
	39	+#endif
...	...	@@ -18,6 +18,7 @@
18	18	#include <asm/mach-types.h>
19	19	#include <asm/arch/emac_defs.h>
20	20	#include <asm/arch/psc_defs.h>
	21	+#include <asm/ti-common/ti-aemif.h>
21	22
22	23	DECLARE_GLOBAL_DATA_PTR;
23	24
24	25
...	...	@@ -39,9 +40,9 @@
39	40	what is that */
40	41	};
41	42
42		-static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
	43	+static struct aemif_config aemif_configs[] = {
43	44	{ /* CS0 */
44		- .mode = ASYNC_EMIF_MODE_NAND,
	45	+ .mode = AEMIF_MODE_NAND,
45	46	.wr_setup = 0xf,
46	47	.wr_strobe = 0x3f,
47	48	.wr_hold = 7,
...	...	@@ -49,7 +50,7 @@
49	50	.rd_strobe = 0x3f,
50	51	.rd_hold = 7,
51	52	.turn_around = 3,
52		- .width = ASYNC_EMIF_8,
	53	+ .width = AEMIF_WIDTH_8,
53	54	},
54	55
55	56	};
...	...	@@ -66,7 +67,7 @@
66	67
67	68	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
68	69	CONFIG_MAX_RAM_BANK_SIZE);
69		- init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
	70	+ aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
70	71	return 0;
71	72	}
72	73
...	...	@@ -14,4 +14,5 @@
14	14	obj-y += video/
15	15	obj-y += watchdog/
16	16	obj-$(CONFIG_QE) += qe/
	17	+obj-y += memory/
	1	+/*
	2	+ * Keystone2: Asynchronous EMIF Configuration
	3	+ *
	4	+ * (C) Copyright 2012-2014
	5	+ * Texas Instruments Incorporated, <www.ti.com>
	6	+ *
	7	+ * SPDX-License-Identifier: GPL-2.0+
	8	+ */
	9	+
	10	+#include <common.h>
	11	+#include <asm/ti-common/ti-aemif.h>
	12	+
	13	+#define AEMIF_WAITCYCLE_CONFIG (CONFIG_AEMIF_CNTRL_BASE + 0x4)
	14	+#define AEMIF_NAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x60)
	15	+#define AEMIF_ONENAND_CONTROL (CONFIG_AEMIF_CNTRL_BASE + 0x5c)
	16	+#define AEMIF_CONFIG(cs) (CONFIG_AEMIF_CNTRL_BASE + 0x10 \
	17	+ + (cs * 4))
	18	+
	19	+#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
	20	+#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
	21	+#define AEMIF_CFG_WR_SETUP(v) (((v) & 0x0f) << 26)
	22	+#define AEMIF_CFG_WR_STROBE(v) (((v) & 0x3f) << 20)
	23	+#define AEMIF_CFG_WR_HOLD(v) (((v) & 0x07) << 17)
	24	+#define AEMIF_CFG_RD_SETUP(v) (((v) & 0x0f) << 13)
	25	+#define AEMIF_CFG_RD_STROBE(v) (((v) & 0x3f) << 7)
	26	+#define AEMIF_CFG_RD_HOLD(v) (((v) & 0x07) << 4)
	27	+#define AEMIF_CFG_TURN_AROUND(v) (((v) & 0x03) << 2)
	28	+#define AEMIF_CFG_WIDTH(v) (((v) & 0x03) << 0)
	29	+
	30	+#define set_config_field(reg, field, val) \
	31	+ do { \
	32	+ if (val != -1) { \
	33	+ reg &= ~AEMIF_CFG_##field(0xffffffff); \
	34	+ reg \|= AEMIF_CFG_##field(val); \
	35	+ } \
	36	+ } while (0)
	37	+
	38	+static void aemif_configure(int cs, struct aemif_config *cfg)
	39	+{
	40	+ unsigned long tmp;
	41	+
	42	+ if (cfg->mode == AEMIF_MODE_NAND) {
	43	+ tmp = __raw_readl(AEMIF_NAND_CONTROL);
	44	+ tmp \|= (1 << cs);
	45	+ __raw_writel(tmp, AEMIF_NAND_CONTROL);
	46	+
	47	+ } else if (cfg->mode == AEMIF_MODE_ONENAND) {
	48	+ tmp = __raw_readl(AEMIF_ONENAND_CONTROL);
	49	+ tmp \|= (1 << cs);
	50	+ __raw_writel(tmp, AEMIF_ONENAND_CONTROL);
	51	+ }
	52	+
	53	+ tmp = __raw_readl(AEMIF_CONFIG(cs));
	54	+
	55	+ set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
	56	+ set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
	57	+ set_config_field(tmp, WR_SETUP, cfg->wr_setup);
	58	+ set_config_field(tmp, WR_STROBE, cfg->wr_strobe);
	59	+ set_config_field(tmp, WR_HOLD, cfg->wr_hold);
	60	+ set_config_field(tmp, RD_SETUP, cfg->rd_setup);
	61	+ set_config_field(tmp, RD_STROBE, cfg->rd_strobe);
	62	+ set_config_field(tmp, RD_HOLD, cfg->rd_hold);
	63	+ set_config_field(tmp, TURN_AROUND, cfg->turn_around);
	64	+ set_config_field(tmp, WIDTH, cfg->width);
	65	+
	66	+ __raw_writel(tmp, AEMIF_CONFIG(cs));
	67	+}
	68	+
	69	+void aemif_init(int num_cs, struct aemif_config *config)
	70	+{
	71	+ int cs;
	72	+
	73	+ if (num_cs > AEMIF_NUM_CS) {
	74	+ num_cs = AEMIF_NUM_CS;
	75	+ printf("AEMIF: csnum has to be <= 5");
	76	+ }
	77	+
	78	+ for (cs = 0; cs < num_cs; cs++)
	79	+ aemif_configure(cs, config + cs);
	80	+}
...	...	@@ -129,6 +129,10 @@
129	129	#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
130	130	#define CONFIG_SYS_SGMII_RATESCALE 2
131	131
	132	+/* AEMIF */
	133	+#define CONFIG_TI_AEMIF
	134	+#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
	135	+
132	136	/* NAND Configuration */
133	137	#define CONFIG_NAND_DAVINCI
134	138	#define CONFIG_CMD_NAND_ECCLAYOUT