Eric Lee / smarc-uboot

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Commit 91703d0672342145da32d4e1bc1f42436dbae6cf

Authored by Bai Ping
1 parent c5dc9e64ff
Exists in smarc-rel_imx_4.1.15_2.0.0_ga

MLK-12894 imx6ull: adjust the ldo 1.2v bandgap voltage on i.mx6ull 

Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage
is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop MISC0
bit[6:4]) setting to 2b'110.

Signed-off-by: Bai Ping <ping.bai@nxp.com>

Showing 2 changed files with 7 additions and 0 deletions Side-by-side Diff

arch/arm/cpu/armv7/mx6/soc.c
Diff comments   View file @ 91703d0
... ... @@ -324,6 +324,12 @@
324 324 * be set.
325 325 */
326 326 writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
  327 + /*
  328 + * On i.MX6ULL, the LDO 1.2V bandgap voltage is 30mV higher. so set
  329 + * VBGADJ bits to 2b'110 to adjust it.
  330 + */
  331 + if (is_cpu_type(MXC_CPU_MX6ULL))
  332 + writel(BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ, &anatop->ana_misc0_set);
327 333 }
328 334  
329 335  
arch/arm/include/asm/arch-mx6/crm_regs.h
Diff comments   View file @ 91703d0
... ... @@ -1272,6 +1272,7 @@
1272 1272 (((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
1273 1273  
1274 1274 #define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
  1275 +#define BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ 0x60
1275 1276  
1276 1277 #define BM_PMU_MISC2_AUDIO_DIV_MSB (1 << 23)
1277 1278 #define BP_PMU_MISC2_AUDIO_DIV_MSB 23