ARM: Introduce erratum workaround for 621766

621766: Under a specific set of conditions, executing a sequence of NEON or vfp load instructions can cause processor deadlock Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set L1NEON to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>

ARM: Introduce erratum workaround for 621766
621766: Under a specific set of conditions, executing a sequence of NEON or vfp load instructions can cause processor deadlock Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set L1NEON to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon · Tom Rini
1 parent 5902f4ce0f
Showing 2 changed files with 14 additions and 0 deletions Side-by-side Diff
README
arch/arm/cpu/armv7/start.S
@@ -695,6 +695,7 @@
 		specific checks, but expect no product checks.
 		CONFIG_ARM_ERRATA_430973
 		CONFIG_ARM_ERRATA_454179
+		CONFIG_ARM_ERRATA_621766
 		CONFIG_ARM_ERRATA_798870
  
 - Tegra SoC options:
@@ -215,6 +215,19 @@
 skip_errata_430973:
 #endif
  
+#ifdef CONFIG_ARM_ERRATA_621766
+	cmp	r2, #0x21		@ Only on < r2p1
+	bge	skip_errata_621766
+
+	mrc	p15, 0, r0, c1, c0, 1	@ Read ACR
+	orr	r0, r0, #(0x1 << 5)	@ Set L1NEON bit
+	push	{r1-r5}			@ Save the cpu info registers
+	bl	v7_arch_cp15_set_acr
+	pop	{r1-r5}			@ Restore the cpu info - fall through
+
+skip_errata_621766:
+#endif
+
 	mov	pc, r5			@ back to my caller
 ENDPROC(cpu_init_cp15)
...	...	@@ -695,6 +695,7 @@
695	695	specific checks, but expect no product checks.
696	696	CONFIG_ARM_ERRATA_430973
697	697	CONFIG_ARM_ERRATA_454179
	698	+ CONFIG_ARM_ERRATA_621766
698	699	CONFIG_ARM_ERRATA_798870
699	700
700	701	- Tegra SoC options:
...	...	@@ -215,6 +215,19 @@
215	215	skip_errata_430973:
216	216	#endif
217	217
	218	+#ifdef CONFIG_ARM_ERRATA_621766
	219	+ cmp r2, #0x21 @ Only on < r2p1
	220	+ bge skip_errata_621766
	221	+
	222	+ mrc p15, 0, r0, c1, c0, 1 @ Read ACR
	223	+ orr r0, r0, #(0x1 << 5) @ Set L1NEON bit
	224	+ push {r1-r5} @ Save the cpu info registers
	225	+ bl v7_arch_cp15_set_acr
	226	+ pop {r1-r5} @ Restore the cpu info - fall through
	227	+
	228	+skip_errata_621766:
	229	+#endif
	230	+
218	231	mov pc, r5 @ back to my caller
219	232	ENDPROC(cpu_init_cp15)
220	233