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Commit a174782d0eb932e5f00036c6c8052458768cc418

Authored by Ioana Ciornei
Committed by Priyanka Jain
1 parent 9af1a177e3
Exists in emb_lf_v2022.04

board: fsl: lx2160aqds: add support for SERDES #1 protocol 14 

Add support for the SERDES #1 protocol 14 which enables a 100G MAC
(dpmac.1). For this to work, a new DTS file which describes
how the M8 mezzanine card is connected on the LX2160AQDS board.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>

Showing 5 changed files with 50 additions and 1 deletions Side-by-side Diff

arch/arm/dts/Makefile
Diff comments   View file @ a174782
... ... @@ -465,6 +465,7 @@
465 465 fsl-lx2160a-qds-20-x-x.dtb \
466 466 fsl-lx2160a-qds-20-11-x.dtb \
467 467 fsl-lx2160a-qds-13-x-x.dtb \
  468 + fsl-lx2160a-qds-14-x-x.dtb \
468 469 fsl-lx2162a-qds.dtb\
469 470 fsl-lx2162a-qds-17-x.dtb\
470 471 fsl-lx2162a-qds-18-x.dtb\
arch/arm/dts/fsl-lx2160a-qds-14-x-x.dts
Diff comments   View file @ a174782
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * NXP LX2160AQDS device tree source for SERDES protocol 14.x.x
  4 + *
  5 + * Copyright 2021-2022 NXP
  6 + *
  7 + */
  8 +
  9 +/dts-v1/;
  10 +
  11 +#include "fsl-lx2160a-qds-sd1-14.dtsi"
  12 +
  13 +/ {
  14 + model = "NXP Layerscape LX2160AQDS Board (DTS 14.x.x)";
  15 + compatible = "fsl,lx2160aqds", "fsl,lx2160a";
  16 +
  17 +};
arch/arm/dts/fsl-lx2160a-qds-sd1-14.dtsi
Diff comments   View file @ a174782
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 14
  4 + *
  5 + * Some assumptions are made:
  6 + * * mezzanine card M8 (100G) is connected to IO SLOT 1 - DPMAC 1
  7 + *
  8 + * Copyright 2021-2022 NXP
  9 + *
  10 + */
  11 +
  12 +#include "fsl-lx2160a-qds.dtsi"
  13 +
  14 +&dpmac1 {
  15 + status = "okay";
  16 + phy-handle = <&inphi1_phy0 &inphi1_phy1>;
  17 + phy-connection-type = "caui4";
  18 +};
  19 +
  20 +&emdio1_slot1 {
  21 + inphi1_phy0: ethernet-phy@0 {
  22 + compatible = "ethernet-phy-id0210.7440";
  23 + reg = <0x0>;
  24 + };
  25 +
  26 + inphi1_phy1: ethernet-phy@1 {
  27 + compatible = "ethernet-phy-id0210.7440";
  28 + reg = <0x1>;
  29 + };
  30 +};
board/freescale/lx2160a/eth_lx2160aqds.c
Diff comments   View file @ a174782
... ... @@ -879,6 +879,7 @@
879 879 {1, 3, true},
880 880 {1, 7, true},
881 881 {1, 13, true},
  882 + {1, 14, true},
882 883 {1, 19, true},
883 884 {1, 20, true},
884 885  
configs/lx2160aqds_tfa_defconfig
Diff comments   View file @ a174782
... ... @@ -48,7 +48,7 @@
48 48 CONFIG_CMD_WDT=y
49 49 CONFIG_CMD_CACHE=y
50 50 CONFIG_OF_CONTROL=y
51   -CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x fsl-lx2160a-qds-13-x-x"
  51 +CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x fsl-lx2160a-qds-13-x-x fsl-lx2160a-qds-14-x-x"
52 52 CONFIG_MULTI_DTB_FIT=y
53 53 CONFIG_ENV_OVERWRITE=y
54 54 CONFIG_ENV_IS_IN_MMC=y