Commit a38a3c4af4ed72a2ed6192203f8fe17ccdd2389f

Authored by Alexandre Courbot
Committed by Tom Warren
1 parent 871d78ed1b

ARM: tegra: enable GPU DT node when appropriate

T124/210 requires some specific configuration (VPR setup) to
be performed by the bootloader before the GPU can be used.
For this reason, the GPU node in the device tree is disabled
by default. This patch enables the node if U-boot has performed
VPR configuration.

Boards enabled by this patch are T124's Jetson TK1 and Venice2
and T210's P2571.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 8 changed files with 62 additions and 0 deletions Side-by-side Diff

arch/arm/include/asm/arch-tegra/gpu.h
... ... @@ -25,4 +25,19 @@
25 25 }
26 26  
27 27 #endif /* CONFIG_TEGRA_GPU */
  28 +
  29 +#if defined(CONFIG_OF_LIBFDT)
  30 +
  31 +int gpu_enable_node(void *blob, const char *gpupath);
  32 +
  33 +#else /* CONFIG_OF_LIBFDT */
  34 +
  35 +static inline int gpu_enable_node(void *blob, const char *gpupath)
  36 +{
  37 + return 0;
  38 +}
  39 +
  40 +#endif /* CONFIG_OF_LIBFDT */
  41 +
  42 +#endif /* __ASM_ARCH_TEGRA_GPU_H */
arch/arm/mach-tegra/gpu.c
... ... @@ -45,4 +45,23 @@
45 45 {
46 46 return _configured;
47 47 }
  48 +
  49 +#if defined(CONFIG_OF_LIBFDT)
  50 +
  51 +int gpu_enable_node(void *blob, const char *gpupath)
  52 +{
  53 + int offset;
  54 +
  55 + if (vpr_configured()) {
  56 + offset = fdt_path_offset(blob, gpupath);
  57 + if (offset > 0) {
  58 + fdt_status_okay(blob, offset);
  59 + debug("enabled GPU node %s\n", gpupath);
  60 + }
  61 + }
  62 +
  63 + return 0;
  64 +}
  65 +
  66 +#endif
board/nvidia/jetson-tk1/jetson-tk1.c
... ... @@ -11,6 +11,7 @@
11 11  
12 12 #include <asm/arch/gpio.h>
13 13 #include <asm/arch/pinmux.h>
  14 +#include <asm/arch-tegra/gpu.h>
14 15  
15 16 #include "pinmux-config-jetson-tk1.h"
16 17  
... ... @@ -79,4 +80,11 @@
79 80 return pci_eth_init(bis);
80 81 }
81 82 #endif /* PCI */
  83 +
  84 +int ft_board_setup(void *blob, bd_t *bd)
  85 +{
  86 + gpu_enable_node(blob, "/gpu@0,57000000");
  87 +
  88 + return 0;
  89 +}
board/nvidia/p2571/p2571.c
... ... @@ -11,6 +11,7 @@
11 11 #include <asm/arch/pinmux.h>
12 12 #include <asm/gpio.h>
13 13 #include "max77620_init.h"
  14 +#include <asm/arch-tegra/gpu.h>
14 15 #include "pinmux-config-p2571.h"
15 16  
16 17 void pin_mux_mmc(void)
... ... @@ -60,5 +61,11 @@
60 61 /* GPIO_PE4 is PS_VDD_FAN_ENABLE */
61 62 gpio_request(GPIO_PE4, "FAN_VDD");
62 63 gpio_direction_output(GPIO_PE4, 1);
  64 +}
  65 +
  66 +int ft_board_setup(void *blob, bd_t *bd)
  67 +{
  68 + gpu_enable_node(blob, "/gpu@0,57000000");
  69 + return 0;
63 70 }
board/nvidia/venice2/venice2.c
... ... @@ -8,6 +8,7 @@
8 8 #include <common.h>
9 9 #include <asm/arch/gpio.h>
10 10 #include <asm/arch/pinmux.h>
  11 +#include <asm/arch-tegra/gpu.h>
11 12 #include "pinmux-config-venice2.h"
12 13  
13 14 /*
... ... @@ -26,5 +27,12 @@
26 27  
27 28 pinmux_config_drvgrp_table(venice2_drvgrps,
28 29 ARRAY_SIZE(venice2_drvgrps));
  30 +}
  31 +
  32 +int ft_board_setup(void *blob, bd_t *bd)
  33 +{
  34 + gpu_enable_node(blob, "/gpu@0,57000000");
  35 +
  36 + return 0;
29 37 }
include/configs/jetson-tk1.h
... ... @@ -79,5 +79,7 @@
79 79 #define CONFIG_ARMV7_SECURE_BASE 0xfff00000
80 80 #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
81 81  
  82 +#define CONFIG_OF_BOARD_SETUP
  83 +
82 84 #endif /* __CONFIG_H */
include/configs/p2571.h
... ... @@ -65,6 +65,7 @@
65 65 #include "tegra-common-post.h"
66 66  
67 67 #define COUNTER_FREQUENCY 38400000
  68 +#define CONFIG_OF_BOARD_SETUP
68 69  
69 70 #endif /* _P2571_H */
include/configs/venice2.h
... ... @@ -61,5 +61,7 @@
61 61 #include "tegra-common-usb-gadget.h"
62 62 #include "tegra-common-post.h"
63 63  
  64 +#define CONFIG_OF_BOARD_SETUP
  65 +
64 66 #endif /* __CONFIG_H */