Commit a430e91643384a944abf32e1079f79f66ef87d97
Committed by
Albert ARIBAUD
Albert ARIBAUD
1 parent
66bd1846ef
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mtd: nand: mxc_nand: Fix is_16bit_nand()
Currently is_16bit_nand() is a per SoC function and it decides the bus nand width by reading some boot related registers. This method works when NAND is the boot medium, but does not work if another boot medium is used. For example: booting from a SD card and then using NAND to store the environment variables, would lead to the following error: NAND bus width 16 instead 8 bit No NAND device found!!! 0 MiB Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width. If it is defined in the board file, then consider 16-bit NAND bus-width, otherwise assume 8-bit NAND is used. This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which states: nand-bus-width : 8 or 16 bus width if not present 8 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Showing 2 changed files with 5 additions and 35 deletions Side-by-side Diff
README
| ... | ... | @@ -3759,8 +3759,9 @@ |
| 3759 | 3759 | Defined to tell the NAND controller that the NAND chip is using |
| 3760 | 3760 | a 16 bit bus. |
| 3761 | 3761 | Not all NAND drivers use this symbol. |
| 3762 | - Example of driver that uses it: | |
| 3762 | + Example of drivers that use it: | |
| 3763 | 3763 | - drivers/mtd/nand/ndfc.c |
| 3764 | + - drivers/mtd/nand/mxc_nand.c | |
| 3764 | 3765 | |
| 3765 | 3766 | - CONFIG_SYS_NDFC_EBC0_CFG |
| 3766 | 3767 | Sets the EBC0_CFG register for the NDFC. If not defined |
drivers/mtd/nand/mxc_nand.c
| ... | ... | @@ -98,45 +98,14 @@ |
| 98 | 98 | #endif |
| 99 | 99 | #endif |
| 100 | 100 | |
| 101 | -#ifdef CONFIG_MX27 | |
| 102 | 101 | static int is_16bit_nand(void) |
| 103 | 102 | { |
| 104 | - struct system_control_regs *sc_regs = | |
| 105 | - (struct system_control_regs *)IMX_SYSTEM_CTL_BASE; | |
| 106 | - | |
| 107 | - if (readl(&sc_regs->fmcr) & NF_16BIT_SEL) | |
| 108 | - return 1; | |
| 109 | - else | |
| 110 | - return 0; | |
| 111 | -} | |
| 112 | -#elif defined(CONFIG_MX31) | |
| 113 | -static int is_16bit_nand(void) | |
| 114 | -{ | |
| 115 | - struct clock_control_regs *sc_regs = | |
| 116 | - (struct clock_control_regs *)CCM_BASE; | |
| 117 | - | |
| 118 | - if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B) | |
| 119 | - return 1; | |
| 120 | - else | |
| 121 | - return 0; | |
| 122 | -} | |
| 123 | -#elif defined(CONFIG_MX25) || defined(CONFIG_MX35) | |
| 124 | -static int is_16bit_nand(void) | |
| 125 | -{ | |
| 126 | - struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; | |
| 127 | - | |
| 128 | - if (readl(&ccm->rcsr) & CCM_RCSR_NF_16BIT_SEL) | |
| 129 | - return 1; | |
| 130 | - else | |
| 131 | - return 0; | |
| 132 | -} | |
| 103 | +#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT) | |
| 104 | + return 1; | |
| 133 | 105 | #else |
| 134 | -#warning "8/16 bit NAND autodetection not supported" | |
| 135 | -static int is_16bit_nand(void) | |
| 136 | -{ | |
| 137 | 106 | return 0; |
| 138 | -} | |
| 139 | 107 | #endif |
| 108 | +} | |
| 140 | 109 | |
| 141 | 110 | static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size) |
| 142 | 111 | { |