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Commit ad218a868b57a69f189a6dfb438c77f46563431d

Authored by Wolfgang Denk
Committed by Albert ARIBAUD
1 parent 1f7f0edd3c
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: remove broken "smdk2400" board 

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>

Showing 10 changed files with 1 additions and 1051 deletions Side-by-side Diff

... ... @@ -685,10 +685,6 @@
685 685  
686 686 omap3_pandora ARM ARMV7 (OMAP3xx SoC)
687 687  
688   -Gary Jennejohn <garyj@denx.de>
689   -
690   - smdk2400 ARM920T
691   -
692 688 Matthias Kaehlcke <matthias@kaehlcke.net>
693 689 edb9301 ARM920T (EP9301)
694 690 edb9302 ARM920T (EP9302)
... ... @@ -340,7 +340,6 @@
340 340 rd6281a \
341 341 scb9328 \
342 342 sheevaplug \
343   - smdk2400 \
344 343 smdk2410 \
345 344 spear300 \
346 345 spear310 \
board/samsung/smdk2400/Makefile
View file @ ad218a8
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# See file CREDITS for list of people who contributed to this
6   -# project.
7   -#
8   -# This program is free software; you can redistribute it and/or
9   -# modify it under the terms of the GNU General Public License as
10   -# published by the Free Software Foundation; either version 2 of
11   -# the License, or (at your option) any later version.
12   -#
13   -# This program is distributed in the hope that it will be useful,
14   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
15   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   -# GNU General Public License for more details.
17   -#
18   -# You should have received a copy of the GNU General Public License
19   -# along with this program; if not, write to the Free Software
20   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   -# MA 02111-1307 USA
22   -#
23   -
24   -include $(TOPDIR)/config.mk
25   -
26   -LIB = $(obj)lib$(BOARD).o
27   -
28   -COBJS := smdk2400.o flash.o
29   -SOBJS := lowlevel_init.o
30   -
31   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
32   -OBJS := $(addprefix $(obj),$(COBJS))
33   -SOBJS := $(addprefix $(obj),$(SOBJS))
34   -
35   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
36   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
37   -
38   -clean:
39   - rm -f $(SOBJS) $(OBJS)
40   -
41   -distclean: clean
42   - rm -f $(LIB) core *.bak $(obj).depend
43   -
44   -#########################################################################
45   -
46   -# defines $(obj).depend target
47   -include $(SRCTREE)/rules.mk
48   -
49   -sinclude $(obj).depend
50   -
51   -#########################################################################
board/samsung/smdk2400/config.mk
View file @ ad218a8
1   -#
2   -# (C) Copyright 2002
3   -# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4   -#
5   -# SAMSUNG board with S3C2400X (ARM920T) CPU
6   -#
7   -# see http://www.samsung.com/ for more information on SAMSUNG
8   -#
9   -
10   -#
11   -# SAMSUNG has 1 bank of 32 MB DRAM
12   -#
13   -# 0C00'0000 to 0E00'0000
14   -#
15   -# Linux-Kernel is expected to be at 0cf0'0000, entry 0cf0'0000
16   -# optionally with a ramdisk at 0c80'0000
17   -#
18   -# we load ourself to 0CF80000 (must be high enough not to be
19   -# overwritten by the uncompessing Linux kernel)
20   -#
21   -# download area is 0C80'0000
22   -#
23   -
24   -
25   -CONFIG_SYS_TEXT_BASE = 0x0CF80000
board/samsung/smdk2400/flash.c
View file @ ad218a8
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Marius Groeger <mgroeger@sysgo.de>
5   - *
6   - * (C) Copyright 2002
7   - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
8   - *
9   - * See file CREDITS for list of people who contributed to this
10   - * project.
11   - *
12   - * This program is free software; you can redistribute it and/or
13   - * modify it under the terms of the GNU General Public License as
14   - * published by the Free Software Foundation; either version 2 of
15   - * the License, or (at your option) any later version.
16   - *
17   - * This program is distributed in the hope that it will be useful,
18   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
19   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20   - * GNU General Public License for more details.
21   - *
22   - * You should have received a copy of the GNU General Public License
23   - * along with this program; if not, write to the Free Software
24   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25   - * MA 02111-1307 USA
26   - */
27   -
28   -/* #define DEBUG */
29   -
30   -#include <common.h>
31   -#include <environment.h>
32   -
33   -#define FLASH_BANK_SIZE 0x1000000 /* 2 x 8 MB */
34   -#define MAIN_SECT_SIZE 0x40000 /* 2 x 128 kB */
35   -
36   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
37   -
38   -
39   -#define CMD_READ_ARRAY 0x00FF00FF
40   -#define CMD_IDENTIFY 0x00900090
41   -#define CMD_ERASE_SETUP 0x00200020
42   -#define CMD_ERASE_CONFIRM 0x00D000D0
43   -#define CMD_PROGRAM 0x00400040
44   -#define CMD_RESUME 0x00D000D0
45   -#define CMD_SUSPEND 0x00B000B0
46   -#define CMD_STATUS_READ 0x00700070
47   -#define CMD_STATUS_RESET 0x00500050
48   -
49   -#define BIT_BUSY 0x00800080
50   -#define BIT_ERASE_SUSPEND 0x00400040
51   -#define BIT_ERASE_ERROR 0x00200020
52   -#define BIT_PROGRAM_ERROR 0x00100010
53   -#define BIT_VPP_RANGE_ERROR 0x00080008
54   -#define BIT_PROGRAM_SUSPEND 0x00040004
55   -#define BIT_PROTECT_ERROR 0x00020002
56   -#define BIT_UNDEFINED 0x00010001
57   -
58   -#define BIT_SEQUENCE_ERROR 0x00300030
59   -#define BIT_TIMEOUT 0x80000000
60   -
61   -/*-----------------------------------------------------------------------
62   - */
63   -
64   -ulong flash_init (void)
65   -{
66   - int i, j;
67   - ulong size = 0;
68   -
69   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
70   - ulong flashbase = 0;
71   -
72   - flash_info[i].flash_id =
73   - (INTEL_MANUFACT & FLASH_VENDMASK) |
74   - (INTEL_ID_28F640J3A & FLASH_TYPEMASK);
75   - flash_info[i].size = FLASH_BANK_SIZE;
76   - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
77   - memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
78   - if (i == 0)
79   - flashbase = CONFIG_SYS_FLASH_BASE;
80   - else
81   - panic ("configured too many flash banks!\n");
82   - for (j = 0; j < flash_info[i].sector_count; j++) {
83   - flash_info[i].start[j] = flashbase;
84   -
85   - /* uniform sector size */
86   - flashbase += MAIN_SECT_SIZE;
87   - }
88   - size += flash_info[i].size;
89   - }
90   -
91   - /*
92   - * Protect monitor and environment sectors
93   - */
94   - flash_protect ( FLAG_PROTECT_SET,
95   - CONFIG_SYS_FLASH_BASE,
96   - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
97   - &flash_info[0]);
98   -
99   - flash_protect ( FLAG_PROTECT_SET,
100   - CONFIG_ENV_ADDR,
101   - CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, &flash_info[0]);
102   -
103   -#ifdef CONFIG_ENV_ADDR_REDUND
104   - flash_protect ( FLAG_PROTECT_SET,
105   - CONFIG_ENV_ADDR_REDUND,
106   - CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
107   - &flash_info[0]);
108   -#endif
109   -
110   - return size;
111   -}
112   -
113   -/*-----------------------------------------------------------------------
114   - */
115   -void flash_print_info (flash_info_t * info)
116   -{
117   - int i;
118   -
119   - switch (info->flash_id & FLASH_VENDMASK) {
120   - case (INTEL_MANUFACT & FLASH_VENDMASK):
121   - printf ("Intel: ");
122   - break;
123   - default:
124   - printf ("Unknown Vendor ");
125   - break;
126   - }
127   -
128   - switch (info->flash_id & FLASH_TYPEMASK) {
129   - case (INTEL_ID_28F640J3A & FLASH_TYPEMASK):
130   - printf ("2x 28F640J3A (64Mbit)\n");
131   - break;
132   - default:
133   - printf ("Unknown Chip Type\n");
134   - goto Done;
135   - break;
136   - }
137   -
138   - printf (" Size: %ld MB in %d Sectors\n",
139   - info->size >> 20, info->sector_count);
140   -
141   - printf (" Sector Start Addresses:");
142   - for (i = 0; i < info->sector_count; i++) {
143   - if ((i % 5) == 0) {
144   - printf ("\n ");
145   - }
146   - printf (" %08lX%s",
147   - info->start[i],
148   - info->protect[i] ? " (RO)" : " ");
149   - }
150   - printf ("\n");
151   -
152   -Done: ;
153   -}
154   -
155   -/*-----------------------------------------------------------------------
156   - */
157   -
158   -int flash_error (ulong code)
159   -{
160   - /* Check bit patterns */
161   - /* SR.7=0 is busy, SR.7=1 is ready */
162   - /* all other flags indicate error on 1 */
163   - /* SR.0 is undefined */
164   - /* Timeout is our faked flag */
165   -
166   - /* sequence is described in Intel 290644-005 document */
167   -
168   - /* check Timeout */
169   - if (code & BIT_TIMEOUT) {
170   - puts ("Timeout\n");
171   - return ERR_TIMOUT;
172   - }
173   -
174   - /* check Busy, SR.7 */
175   - if (~code & BIT_BUSY) {
176   - puts ("Busy\n");
177   - return ERR_PROG_ERROR;
178   - }
179   -
180   - /* check Vpp low, SR.3 */
181   - if (code & BIT_VPP_RANGE_ERROR) {
182   - puts ("Vpp range error\n");
183   - return ERR_PROG_ERROR;
184   - }
185   -
186   - /* check Device Protect Error, SR.1 */
187   - if (code & BIT_PROTECT_ERROR) {
188   - puts ("Device protect error\n");
189   - return ERR_PROG_ERROR;
190   - }
191   -
192   - /* check Command Seq Error, SR.4 & SR.5 */
193   - if (code & BIT_SEQUENCE_ERROR) {
194   - puts ("Command seqence error\n");
195   - return ERR_PROG_ERROR;
196   - }
197   -
198   - /* check Block Erase Error, SR.5 */
199   - if (code & BIT_ERASE_ERROR) {
200   - puts ("Block erase error\n");
201   - return ERR_PROG_ERROR;
202   - }
203   -
204   - /* check Program Error, SR.4 */
205   - if (code & BIT_PROGRAM_ERROR) {
206   - puts ("Program error\n");
207   - return ERR_PROG_ERROR;
208   - }
209   -
210   - /* check Block Erase Suspended, SR.6 */
211   - if (code & BIT_ERASE_SUSPEND) {
212   - puts ("Block erase suspended\n");
213   - return ERR_PROG_ERROR;
214   - }
215   -
216   - /* check Program Suspended, SR.2 */
217   - if (code & BIT_PROGRAM_SUSPEND) {
218   - puts ("Program suspended\n");
219   - return ERR_PROG_ERROR;
220   - }
221   -
222   - /* OK, no error */
223   - return ERR_OK;
224   -}
225   -
226   -/*-----------------------------------------------------------------------
227   - */
228   -
229   -int flash_erase (flash_info_t * info, int s_first, int s_last)
230   -{
231   - ulong result, result1;
232   - int iflag, prot, sect;
233   - int rc = ERR_OK;
234   - ulong start;
235   -
236   -#ifdef USE_920T_MMU
237   - int cflag;
238   -#endif
239   -
240   - debug ("flash_erase: s_first %d s_last %d\n", s_first, s_last);
241   -
242   - /* first look for protection bits */
243   -
244   - if (info->flash_id == FLASH_UNKNOWN)
245   - return ERR_UNKNOWN_FLASH_TYPE;
246   -
247   - if ((s_first < 0) || (s_first > s_last)) {
248   - return ERR_INVAL;
249   - }
250   -
251   - if ((info->flash_id & FLASH_VENDMASK) !=
252   - (INTEL_MANUFACT & FLASH_VENDMASK)) {
253   - return ERR_UNKNOWN_FLASH_VENDOR;
254   - }
255   -
256   - prot = 0;
257   - for (sect = s_first; sect <= s_last; ++sect) {
258   - if (info->protect[sect]) {
259   - prot++;
260   - }
261   - }
262   -
263   - if (prot) {
264   - printf ("- Warning: %d protected sectors will not be erased!\n",
265   - prot);
266   - } else {
267   - printf ("\n");
268   - }
269   -
270   - /*
271   - * Disable interrupts which might cause a timeout
272   - * here. Remember that our exception vectors are
273   - * at address 0 in the flash, and we don't want a
274   - * (ticker) exception to happen while the flash
275   - * chip is in programming mode.
276   - */
277   -#ifdef USE_920T_MMU
278   - cflag = dcache_status ();
279   - dcache_disable ();
280   -#endif
281   - iflag = disable_interrupts ();
282   -
283   - /* Start erase on unprotected sectors */
284   - for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
285   -
286   - debug ("Erasing sector %2d @ %08lX... ",
287   - sect, info->start[sect]);
288   -
289   - /* arm simple, non interrupt dependent timer */
290   - start = get_timer(0);
291   -
292   - if (info->protect[sect] == 0) { /* not protected */
293   - vu_long *addr = (vu_long *) (info->start[sect]);
294   - ulong bsR7, bsR7_2, bsR5, bsR5_2;
295   -
296   - /* *addr = CMD_STATUS_RESET; */
297   - *addr = CMD_ERASE_SETUP;
298   - *addr = CMD_ERASE_CONFIRM;
299   -
300   - /* wait until flash is ready */
301   - do {
302   - /* check timeout */
303   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
304   - *addr = CMD_STATUS_RESET;
305   - result = BIT_TIMEOUT;
306   - break;
307   - }
308   -
309   - *addr = CMD_STATUS_READ;
310   - result = *addr;
311   - bsR7 = result & (1 << 7);
312   - bsR7_2 = result & (1 << 23);
313   - } while (!bsR7 | !bsR7_2);
314   -
315   - *addr = CMD_STATUS_READ;
316   - result1 = *addr;
317   - bsR5 = result1 & (1 << 5);
318   - bsR5_2 = result1 & (1 << 21);
319   -#ifdef SAMSUNG_FLASH_DEBUG
320   - printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
321   - if (bsR5 != 0 && bsR5_2 != 0)
322   - printf ("bsR5 %lx bsR5_2 %lx\n", bsR5, bsR5_2);
323   -#endif
324   -
325   - *addr = CMD_READ_ARRAY;
326   - *addr = CMD_RESUME;
327   -
328   - if ((rc = flash_error (result)) != ERR_OK)
329   - goto outahere;
330   -#if 0
331   - printf ("ok.\n");
332   - } else { /* it was protected */
333   -
334   - printf ("protected!\n");
335   -#endif
336   - }
337   - }
338   -
339   -outahere:
340   - /* allow flash to settle - wait 10 ms */
341   - udelay_masked (10000);
342   -
343   - if (iflag)
344   - enable_interrupts ();
345   -
346   -#ifdef USE_920T_MMU
347   - if (cflag)
348   - dcache_enable ();
349   -#endif
350   - return rc;
351   -}
352   -
353   -/*-----------------------------------------------------------------------
354   - * Copy memory to flash
355   - */
356   -
357   -static int write_word (flash_info_t * info, ulong dest, ulong data)
358   -{
359   - vu_long *addr = (vu_long *) dest;
360   - ulong result;
361   - int rc = ERR_OK;
362   - int iflag;
363   - ulong start;
364   -
365   -#ifdef USE_920T_MMU
366   - int cflag;
367   -#endif
368   -
369   - /*
370   - * Check if Flash is (sufficiently) erased
371   - */
372   - result = *addr;
373   - if ((result & data) != data)
374   - return ERR_NOT_ERASED;
375   -
376   - /*
377   - * Disable interrupts which might cause a timeout
378   - * here. Remember that our exception vectors are
379   - * at address 0 in the flash, and we don't want a
380   - * (ticker) exception to happen while the flash
381   - * chip is in programming mode.
382   - */
383   -#ifdef USE_920T_MMU
384   - cflag = dcache_status ();
385   - dcache_disable ();
386   -#endif
387   - iflag = disable_interrupts ();
388   -
389   - /* *addr = CMD_STATUS_RESET; */
390   - *addr = CMD_PROGRAM;
391   - *addr = data;
392   -
393   - /* arm simple, non interrupt dependent timer */
394   - start = get_timer(0);
395   -
396   - /* wait until flash is ready */
397   - do {
398   - /* check timeout */
399   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
400   - *addr = CMD_SUSPEND;
401   - result = BIT_TIMEOUT;
402   - break;
403   - }
404   -
405   - *addr = CMD_STATUS_READ;
406   - result = *addr;
407   - } while (~result & BIT_BUSY);
408   -
409   - /* *addr = CMD_READ_ARRAY; */
410   - *addr = CMD_STATUS_READ;
411   - result = *addr;
412   -
413   - rc = flash_error (result);
414   -
415   - if (iflag)
416   - enable_interrupts ();
417   -
418   -#ifdef USE_920T_MMU
419   - if (cflag)
420   - dcache_enable ();
421   -#endif
422   - *addr = CMD_READ_ARRAY;
423   - *addr = CMD_RESUME;
424   - return rc;
425   -}
426   -
427   -/*-----------------------------------------------------------------------
428   - * Copy memory to flash.
429   - */
430   -
431   -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
432   -{
433   - ulong cp, wp, data;
434   - int l;
435   - int i, rc;
436   -
437   - wp = (addr & ~3); /* get lower word aligned address */
438   -
439   - /*
440   - * handle unaligned start bytes
441   - */
442   - if ((l = addr - wp) != 0) {
443   - data = 0;
444   - for (i = 0, cp = wp; i < l; ++i, ++cp) {
445   - data = (data >> 8) | (*(uchar *) cp << 24);
446   - }
447   - for (; i < 4 && cnt > 0; ++i) {
448   - data = (data >> 8) | (*src++ << 24);
449   - --cnt;
450   - ++cp;
451   - }
452   - for (; cnt == 0 && i < 4; ++i, ++cp) {
453   - data = (data >> 8) | (*(uchar *) cp << 24);
454   - }
455   -
456   - if ((rc = write_word (info, wp, data)) != 0) {
457   - return (rc);
458   - }
459   - wp += 4;
460   - }
461   -
462   - /*
463   - * handle word aligned part
464   - */
465   - while (cnt >= 4) {
466   - data = *((vu_long *) src);
467   - if ((rc = write_word (info, wp, data)) != 0) {
468   - return (rc);
469   - }
470   - src += 4;
471   - wp += 4;
472   - cnt -= 4;
473   - }
474   -
475   - if (cnt == 0) {
476   - return ERR_OK;
477   - }
478   -
479   - /*
480   - * handle unaligned tail bytes
481   - */
482   - data = 0;
483   - for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
484   - data = (data >> 8) | (*src++ << 24);
485   - --cnt;
486   - }
487   - for (; i < 4; ++i, ++cp) {
488   - data = (data >> 8) | (*(uchar *) cp << 24);
489   - }
490   -
491   - return write_word (info, wp, data);
492   -}
board/samsung/smdk2400/lowlevel_init.S
View file @ ad218a8
1   -/*
2   - * Memory Setup stuff - taken from blob memsetup.S
3   - *
4   - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5   - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6   - *
7   - * Modified for the Samsung development board by
8   - * (C) Copyright 2002
9   - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
10   - *
11   - * See file CREDITS for list of people who contributed to this
12   - * project.
13   - *
14   - * This program is free software; you can redistribute it and/or
15   - * modify it under the terms of the GNU General Public License as
16   - * published by the Free Software Foundation; either version 2 of
17   - * the License, or (at your option) any later version.
18   - *
19   - * This program is distributed in the hope that it will be useful,
20   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
21   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22   - * GNU General Public License for more details.
23   - *
24   - * You should have received a copy of the GNU General Public License
25   - * along with this program; if not, write to the Free Software
26   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27   - * MA 02111-1307 USA
28   - */
29   -
30   -
31   -#include <config.h>
32   -#include <version.h>
33   -
34   -
35   -/* some parameters for the board */
36   -
37   -/*
38   - *
39   - * Taken from linux/arch/arm/boot/compressed/head-s3c2400.S
40   - *
41   - * Copyright (C) 2001 Samsung Electronics by chc, 010406
42   - *
43   - * S3C2400 specific tweaks.
44   - *
45   - */
46   -
47   -/* memory controller */
48   -#define BWSCON 0x14000000
49   -#define BANKCON3 0x14000010 /* for cs8900, ethernet */
50   -
51   -/* Bank0 */
52   -#define B0_Tacs 0x0 /* 0 clk */
53   -#define B0_Tcos 0x0 /* 0 clk */
54   -#define B0_Tacc 0x7 /* 14 clk */
55   -#define B0_Tcoh 0x0 /* 0 clk */
56   -#define B0_Tah 0x0 /* 0 clk */
57   -#define B0_Tacp 0x0
58   -#define B0_PMC 0x0 /* normal */
59   -
60   -/* Bank1 */
61   -#define B1_Tacs 0x0 /* 0 clk */
62   -#define B1_Tcos 0x0 /* 0 clk */
63   -#define B1_Tacc 0x7 /* 14 clk */
64   -#define B1_Tcoh 0x0 /* 0 clk */
65   -#define B1_Tah 0x0 /* 0 clk */
66   -#define B1_Tacp 0x0
67   -#define B1_PMC 0x0 /* normal */
68   -
69   -/* Bank2 */
70   -#define B2_Tacs 0x0 /* 0 clk */
71   -#define B2_Tcos 0x0 /* 0 clk */
72   -#define B2_Tacc 0x7 /* 14 clk */
73   -#define B2_Tcoh 0x0 /* 0 clk */
74   -#define B2_Tah 0x0 /* 0 clk */
75   -#define B2_Tacp 0x0
76   -#define B2_PMC 0x0 /* normal */
77   -
78   -/* Bank3 - setup for the cs8900 */
79   -#define B3_Tacs 0x0 /* 0 clk */
80   -#define B3_Tcos 0x3 /* 4 clk */
81   -#define B3_Tacc 0x7 /* 14 clk */
82   -#define B3_Tcoh 0x1 /* 1 clk */
83   -#define B3_Tah 0x0 /* 0 clk */
84   -#define B3_Tacp 0x3 /* 6 clk */
85   -#define B3_PMC 0x0 /* normal */
86   -
87   -/* Bank4 */
88   -#define B4_Tacs 0x0 /* 0 clk */
89   -#define B4_Tcos 0x0 /* 0 clk */
90   -#define B4_Tacc 0x7 /* 14 clk */
91   -#define B4_Tcoh 0x0 /* 0 clk */
92   -#define B4_Tah 0x0 /* 0 clk */
93   -#define B4_Tacp 0x0
94   -#define B4_PMC 0x0 /* normal */
95   -
96   -/* Bank5 */
97   -#define B5_Tacs 0x0 /* 0 clk */
98   -#define B5_Tcos 0x0 /* 0 clk */
99   -#define B5_Tacc 0x7 /* 14 clk */
100   -#define B5_Tcoh 0x0 /* 0 clk */
101   -#define B5_Tah 0x0 /* 0 clk */
102   -#define B5_Tacp 0x0
103   -#define B5_PMC 0x0 /* normal */
104   -
105   -/* Bank6 */
106   -#define B6_MT 0x3 /* SDRAM */
107   -#define B6_Trcd 0x1 /* 3clk */
108   -#define B6_SCAN 0x1 /* 9 bit */
109   -
110   -/* Bank7 */
111   -#define B7_MT 0x3 /* SDRAM */
112   -#define B7_Trcd 0x1 /* 3clk */
113   -#define B7_SCAN 0x1 /* 9 bit */
114   -
115   -/* refresh parameter */
116   -#define REFEN 0x1 /* enable refresh */
117   -#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */
118   -#define Trp 0x0 /* 2 clk */
119   -#define Trc 0x3 /* 7 clk */
120   -#define Tchr 0x2 /* 3 clk */
121   -
122   -#define REFCNT 1113 /* period=15.6 us, HCLK=60Mhz, (2048+1-15.6*66) */
123   -
124   -
125   -_TEXT_BASE:
126   - .word CONFIG_SYS_TEXT_BASE
127   -
128   -.globl lowlevel_init
129   -lowlevel_init:
130   - /* memory control configuration */
131   - /* make r0 relative the current location so that it */
132   - /* reads SMRDATA out of FLASH rather than memory ! */
133   - ldr r0, =SMRDATA
134   - ldr r1, _TEXT_BASE
135   - sub r0, r0, r1
136   - ldr r1, =BWSCON /* Bus Width Status Controller */
137   - add r2, r0, #52
138   -0:
139   - ldr r3, [r0], #4
140   - str r3, [r1], #4
141   - cmp r2, r0
142   - bne 0b
143   -
144   - /* everything is fine now */
145   - mov pc, lr
146   -
147   - .ltorg
148   -/* the literal pools origin */
149   -
150   -SMRDATA:
151   - .word 0x2211d114 /* d->Ethernet, BUSWIDTH=32 */
152   - .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /* GCS0 */
153   - .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /* GCS1 */
154   - .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /* GCS2 */
155   - .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /* GCS3 */
156   - .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /* GCS4 */
157   - .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /* GCS5 */
158   - .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */
159   - .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */
160   - .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
161   - .word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */
162   - .word 0x30 /* MRSR6, CL=3clk */
163   - .word 0x30 /* MRSR7 */
board/samsung/smdk2400/smdk2400.c
View file @ ad218a8
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Marius Groeger <mgroeger@sysgo.de>
5   - *
6   - * (C) Copyright 2002
7   - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
8   - *
9   - * See file CREDITS for list of people who contributed to this
10   - * project.
11   - *
12   - * This program is free software; you can redistribute it and/or
13   - * modify it under the terms of the GNU General Public License as
14   - * published by the Free Software Foundation; either version 2 of
15   - * the License, or (at your option) any later version.
16   - *
17   - * This program is distributed in the hope that it will be useful,
18   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
19   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20   - * GNU General Public License for more details.
21   - *
22   - * You should have received a copy of the GNU General Public License
23   - * along with this program; if not, write to the Free Software
24   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25   - * MA 02111-1307 USA
26   - */
27   -
28   -#include <common.h>
29   -#include <netdev.h>
30   -#include <asm/arch/s3c24x0_cpu.h>
31   -
32   -DECLARE_GLOBAL_DATA_PTR;
33   -
34   -#ifdef CONFIG_MODEM_SUPPORT
35   -static int key_pressed(void);
36   -int mdm_init (bd_t *);
37   -extern void disable_putc(void);
38   -extern void enable_putc(void);
39   -extern int hwflow_onoff(int);
40   -extern int do_mdm_init; /* defined in common/main.c */
41   -#endif /* CONFIG_MODEM_SUPPORT */
42   -
43   -/*
44   - * Miscellaneous platform dependent initialisations
45   - */
46   -
47   -int board_init (void)
48   -{
49   - struct s3c24x0_clock_power * const clk_power =
50   - s3c24x0_get_base_clock_power();
51   - struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
52   -
53   - /* memory and cpu-speed are setup before relocation */
54   - /* change the clock to be 50 MHz 1:1:1 */
55   - clk_power->mpllcon = 0x5c042;
56   - clk_power->clkdivn = 0;
57   - /* set up the I/O ports */
58   - gpio->pacon = 0x3ffff;
59   - gpio->pbcon = 0xaaaaaaaa;
60   - gpio->pbup = 0xffff;
61   - gpio->pecon = 0x0;
62   - gpio->peup = 0x0;
63   -#ifdef CONFIG_HWFLOW
64   - /*CTS[0] RTS[0] INPUT INPUT TXD[0] INPUT RXD[0] */
65   - /* 10, 10, 00, 00, 10, 00, 10 */
66   - gpio->pfcon = 0xa22;
67   - /* Disable pull-up on Rx, Tx, CTS and RTS pins */
68   - gpio->pfup = 0x35;
69   -#else
70   - /*INPUT INPUT INPUT INPUT TXD[0] INPUT RXD[0] */
71   - /* 00, 00, 00, 00, 10, 00, 10 */
72   - gpio->pfcon = 0x22;
73   - /* Disable pull-up on Rx and Tx pins */
74   - gpio->pfup = 0x5;
75   -#endif /* CONFIG_HWFLOW */
76   - gpio->pgcon = 0x0;
77   - gpio->pgup = 0x0;
78   - gpio->opencr = 0x0;
79   -
80   - /* arch number of SAMSUNG-Board to MACH_TYPE_SMDK2400 */
81   - gd->bd->bi_arch_number = MACH_TYPE_SMDK2400;
82   -
83   - /* adress of boot parameters */
84   - gd->bd->bi_boot_params = 0x0C000100;
85   -
86   -#ifdef CONFIG_MODEM_SUPPORT
87   - if (key_pressed()) {
88   - disable_putc(); /* modem doesn't understand banner etc */
89   - do_mdm_init = 1;
90   - }
91   -#endif /* CONFIG_MODEM_SUPPORT */
92   -
93   - return 0;
94   -}
95   -
96   -int dram_init (void)
97   -{
98   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
99   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
100   -
101   - return 0;
102   -}
103   -
104   -#ifdef CONFIG_MODEM_SUPPORT
105   -static int key_pressed(void)
106   -{
107   - int rc;
108   - if (1) { /* check for button push here, now just return 1 */
109   - rc = 1;
110   - }
111   -
112   - return rc;
113   -}
114   -#endif /* CONFIG_MODEM_SUPPORT */
115   -
116   -#ifdef CONFIG_CMD_NET
117   -int board_eth_init(bd_t *bis)
118   -{
119   - int rc = 0;
120   -#ifdef CONFIG_CS8900
121   - rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
122   -#endif
123   - return rc;
124   -}
125   -#endif
... ... @@ -67,7 +67,6 @@
67 67 cm4008 arm arm920t - - ks8695
68 68 cm41xx arm arm920t - - ks8695
69 69 VCMA9 arm arm920t vcma9 mpl s3c24x0
70   -smdk2400 arm arm920t - samsung s3c24x0
71 70 smdk2410 arm arm920t - samsung s3c24x0
72 71 voiceblue arm arm925t
73 72 omap1510inn arm arm925t - ti
doc/README.scrapyard
Diff comments   View file @ ad218a8
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
  14 +smdk2400 arm arm920t - 2011-07-17 Gary Jennejohn <garyj@denx.de>
14 15 sbc2410x arm arm920t - 2011-07-17
15 16 netstar arm arm925t - 2011-07-17
16 17 mx1fs2 arm arm920t - 2011-07-17
include/configs/smdk2400.h
View file @ ad218a8
1   -/*
2   - * (C) Copyright 2002-2005
3   - * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
4   - * (C) Copyright 2002
5   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6   - * Marius Groeger <mgroeger@sysgo.de>
7   - * Gary Jennejohn <garyj@denx.de>
8   - *
9   - * Configuation settings for the SAMSUNG board.
10   - *
11   - * See file CREDITS for list of people who contributed to this
12   - * project.
13   - *
14   - * This program is free software; you can redistribute it and/or
15   - * modify it under the terms of the GNU General Public License as
16   - * published by the Free Software Foundation; either version 2 of
17   - * the License, or (at your option) any later version.
18   - *
19   - * This program is distributed in the hope that it will be useful,
20   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
21   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22   - * GNU General Public License for more details.
23   - *
24   - * You should have received a copy of the GNU General Public License
25   - * along with this program; if not, write to the Free Software
26   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27   - * MA 02111-1307 USA
28   - */
29   -
30   -#ifndef __CONFIG_H
31   -#define __CONFIG_H
32   -
33   -/*
34   - * High Level Configuration Options
35   - * (easy to change)
36   - */
37   -#define CONFIG_ARM920T 1 /* This is an ARM920T core */
38   -#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
39   -#define CONFIG_S3C2400 1 /* specifically a SAMSUNG S3C2400 SoC */
40   -#define CONFIG_SMDK2400 1 /* on an SAMSUNG SMDK2400 Board */
41   -
42   -/* input clock of PLL */
43   -#define CONFIG_SYS_CLK_FREQ 12000000 /* SMDK2400 has 12 MHz input clock */
44   -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45   -
46   -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
47   -#define CONFIG_SETUP_MEMORY_TAGS 1
48   -#define CONFIG_INITRD_TAG 1
49   -
50   -
51   -/*
52   - * Size of malloc() pool
53   - */
54   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
55   -
56   -/*
57   - * Hardware drivers
58   - */
59   -#define CONFIG_NET_MULTI
60   -#define CONFIG_CS8900 /* we have a CS8900 on-board */
61   -#define CONFIG_CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
62   -#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
63   -
64   -/*
65   - * select serial console configuration
66   - */
67   -#define CONFIG_S3C24X0_SERIAL
68   -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */
69   -
70   -#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */
71   -
72   -#undef CONFIG_MODEM_SUPPORT /* enable modem initialization stuff */
73   -
74   -/*
75   - * The following enables modem debugging stuff. The dbg() and
76   - * 'char screen[1024]' are used for debug printfs. Unfortunately,
77   - * it is usable only from BDI
78   - */
79   -#undef CONFIG_MODEM_SUPPORT_DEBUG
80   -
81   -/* allow to overwrite serial and ethaddr */
82   -#define CONFIG_ENV_OVERWRITE
83   -
84   -#define CONFIG_BAUDRATE 115200
85   -
86   -#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
87   -
88   -/* Use s3c2400's RTC */
89   -#define CONFIG_RTC_S3C24X0 1
90   -
91   -
92   -/*
93   - * BOOTP options
94   - */
95   -#define CONFIG_BOOTP_BOOTFILESIZE
96   -#define CONFIG_BOOTP_BOOTPATH
97   -#define CONFIG_BOOTP_GATEWAY
98   -#define CONFIG_BOOTP_HOSTNAME
99   -
100   -
101   -/*
102   - * Command line configuration.
103   - */
104   -#include <config_cmd_default.h>
105   -
106   -#define CONFIG_CMD_DATE
107   -#define CONFIG_CMD_SNTP
108   -
109   -#if defined(CONFIG_HWFLOW)
110   - #define CONFIG_CONFIG_HWFLOW
111   -#endif
112   -
113   -#if !defined(USE_920T_MMU)
114   - #undef CONFIG_CMD_CACHE
115   -#endif
116   -
117   -
118   -#define CONFIG_BOOTDELAY 3
119   -#define CONFIG_NETMASK 255.255.255.0
120   -#define CONFIG_IPADDR 134.98.93.36
121   -#define CONFIG_SERVERIP 134.98.93.22
122   -
123   -#if defined(CONFIG_CMD_KGDB)
124   -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
125   -/* what's this ? it's not used anywhere */
126   -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
127   -#endif
128   -
129   -/*
130   - * Miscellaneous configurable options
131   - */
132   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
133   -#define CONFIG_SYS_PROMPT "SMDK2400 # " /* Monitor Command Prompt */
134   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
135   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
136   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
137   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
138   -
139   -#define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */
140   -#define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */
141   -
142   -#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */
143   -
144   -#define CONFIG_SYS_HZ 1000
145   -
146   -/* valid baudrates */
147   -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
148   -
149   -/*-----------------------------------------------------------------------
150   - * Stack sizes
151   - *
152   - * The stack sizes are set up in start.S using the settings below
153   - */
154   -#define CONFIG_STACKSIZE (128*1024) /* regular stack */
155   -#ifdef CONFIG_USE_IRQ
156   -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
157   -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
158   -#endif
159   -
160   -/*-----------------------------------------------------------------------
161   - * Physical Memory Map
162   - */
163   -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
164   -#define PHYS_SDRAM_1 0x0c000000 /* SDRAM Bank #1 */
165   -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
166   -
167   -#define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */
168   -
169   -/*-----------------------------------------------------------------------
170   - * FLASH and environment organization
171   - */
172   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
173   -#define CONFIG_SYS_MAX_FLASH_SECT (64) /* max number of sectors on one chip */
174   -
175   -/* timeout values are in ticks */
176   -#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
177   -#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
178   -
179   -#define CONFIG_ENV_IS_IN_FLASH 1
180   -
181   -/* Address and size of Primary Environment Sector */
182   -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
183   -#define CONFIG_ENV_SIZE 0x40000
184   -
185   -/* Address and size of Redundant Environment Sector */
186   -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
187   -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
188   -
189   -#endif /* __CONFIG_H */