Commit b736e4b929197b5141b883f4f3906c4bd38dd4f3
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01968b96a2
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ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it conform to start.S in armv7 architecture, to make it usable if the SPL framework is used. Signed-off-by: Stefano Babic <sbabic@denx.de>
Showing 3 changed files with 24 additions and 11 deletions Side-by-side Diff
arch/arm/cpu/arm1136/start.S
| ... | ... | @@ -100,6 +100,10 @@ |
| 100 | 100 | _bss_start_ofs: |
| 101 | 101 | .word __bss_start - _start |
| 102 | 102 | |
| 103 | +.global _image_copy_end_ofs | |
| 104 | +_image_copy_end_ofs: | |
| 105 | + .word __image_copy_end - _start | |
| 106 | + | |
| 103 | 107 | .globl _bss_end_ofs |
| 104 | 108 | _bss_end_ofs: |
| 105 | 109 | .word __bss_end__ - _start |
| ... | ... | @@ -193,7 +197,7 @@ |
| 193 | 197 | moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ |
| 194 | 198 | beq clear_bss /* skip relocation */ |
| 195 | 199 | mov r1, r6 /* r1 <- scratch for copy_loop */ |
| 196 | - ldr r3, _bss_start_ofs | |
| 200 | + ldr r3, _image_copy_end_ofs | |
| 197 | 201 | add r2, r0, r3 /* r2 <- source end address */ |
| 198 | 202 | |
| 199 | 203 | copy_loop: |
| 200 | 204 | |
| 201 | 205 | |
| ... | ... | @@ -241,15 +245,28 @@ |
| 241 | 245 | add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ |
| 242 | 246 | cmp r2, r3 |
| 243 | 247 | blo fixloop |
| 248 | + b clear_bss | |
| 249 | + | |
| 250 | +_rel_dyn_start_ofs: | |
| 251 | + .word __rel_dyn_start - _start | |
| 252 | +_rel_dyn_end_ofs: | |
| 253 | + .word __rel_dyn_end - _start | |
| 254 | +_dynsym_start_ofs: | |
| 255 | + .word __dynsym_start - _start | |
| 244 | 256 | #endif |
| 245 | 257 | |
| 246 | 258 | clear_bss: |
| 247 | -#ifndef CONFIG_SPL_BUILD | |
| 259 | +#ifdef CONFIG_SPL_BUILD | |
| 260 | + /* No relocation for SPL */ | |
| 261 | + ldr r0, =__bss_start | |
| 262 | + ldr r1, =__bss_end__ | |
| 263 | +#else | |
| 248 | 264 | ldr r0, _bss_start_ofs |
| 249 | 265 | ldr r1, _bss_end_ofs |
| 250 | 266 | mov r4, r6 /* reloc addr */ |
| 251 | 267 | add r0, r0, r4 |
| 252 | 268 | add r1, r1, r4 |
| 269 | +#endif | |
| 253 | 270 | mov r2, #0x00000000 /* clear */ |
| 254 | 271 | |
| 255 | 272 | clbss_l:cmp r0, r1 /* clear loop... */ |
| ... | ... | @@ -258,7 +275,6 @@ |
| 258 | 275 | add r0, r0, #4 |
| 259 | 276 | b clbss_l |
| 260 | 277 | clbss_e: |
| 261 | -#endif /* #ifndef CONFIG_SPL_BUILD */ | |
| 262 | 278 | |
| 263 | 279 | /* |
| 264 | 280 | * We are done. Do not return, instead branch to second part of board |
| ... | ... | @@ -273,7 +289,7 @@ |
| 273 | 289 | #else |
| 274 | 290 | jump_2_ram: |
| 275 | 291 | ldr r0, _board_init_r_ofs |
| 276 | - ldr r1, _TEXT_BASE | |
| 292 | + adr r1, _start | |
| 277 | 293 | add lr, r0, r1 |
| 278 | 294 | add lr, lr, r9 |
| 279 | 295 | /* setup parameters for board_init_r */ |
| ... | ... | @@ -285,13 +301,6 @@ |
| 285 | 301 | _board_init_r_ofs: |
| 286 | 302 | .word board_init_r - _start |
| 287 | 303 | #endif |
| 288 | - | |
| 289 | -_rel_dyn_start_ofs: | |
| 290 | - .word __rel_dyn_start - _start | |
| 291 | -_rel_dyn_end_ofs: | |
| 292 | - .word __rel_dyn_end - _start | |
| 293 | -_dynsym_start_ofs: | |
| 294 | - .word __dynsym_start - _start | |
| 295 | 304 | |
| 296 | 305 | /* |
| 297 | 306 | ************************************************************************* |
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