rockchip: Add basic support for phyCORE-RK3288 SoM based carrier board

The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC. The module can be connected to different carrier boards. It can be also equipped with different RAM, SPI flash and eMMC variants. The Rapid Development Kit option is using the following setup: - 1 GB DDR3 RAM (2 Banks) - 1x 4 KB EEPROM - DP83867 Gigabit Ethernet PHY - 16 MB SPI Flash - 4 GB eMMC Flash Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination with the phyCORE-RK3288 System on Module. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: Add basic support for phyCORE-RK3288 SoM based carrier board
The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC. The module can be connected to different carrier boards. It can be also equipped with different RAM, SPI flash and eMMC variants. The Rapid Development Kit option is using the following setup: - 1 GB DDR3 RAM (2 Banks) - 1x 4 KB EEPROM - DP83867 Gigabit Ethernet PHY - 16 MB SPI Flash - 4 GB eMMC Flash Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination with the phyCORE-RK3288 System on Module. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Wadim Egorov · Philipp Tomsich
1 parent ad98f882e8
Showing 11 changed files with 981 additions and 0 deletions Side-by-side Diff
arch/arm/dts/Makefile
arch/arm/dts/rk3288-phycore-rdk.dts
arch/arm/dts/rk3288-phycore-som.dtsi
arch/arm/mach-rockchip/rk3288-board-spl.c
arch/arm/mach-rockchip/rk3288/Kconfig
board/phytec/phycore_rk3288/Kconfig
board/phytec/phycore_rk3288/MAINTAINERS
board/phytec/phycore_rk3288/Makefile
board/phytec/phycore_rk3288/phycore-rk3288.c
configs/phycore-rk3288_defconfig
include/configs/phycore_rk3288.h
@@ -34,6 +34,7 @@
 	rk3288-fennec.dtb \
 	rk3288-firefly.dtb \
 	rk3288-miqi.dtb \
+	rk3288-phycore-rdk.dtb \
 	rk3288-popmetal.dtb \
 	rk3288-rock2-square.dtb \
 	rk3288-tinker.dtb \
+/*
+ * Device tree file for Phytec PCM-947 carrier board
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "rk3288-phycore-som.dtsi"
+
+/ {
+	model = "Phytec RK3288 PCM-947";
+	compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	config {
+		u-boot,dm-pre-reloc;
+		u-boot,boot0 = &emmc;
+	};
+
+	user_buttons: user-buttons {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&user_button_pins>;
+
+		button@0 {
+			label = "home";
+			linux,code = <KEY_HOME>;
+			gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>;
+			wakeup-source;
+		};
+
+		button@1 {
+			label = "menu";
+			linux,code = <KEY_MENU>;
+			gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
+			wakeup-source;
+		};
+	};
+
+	vcc_host0_5v: usb-host0-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host0_vbus_drv>;
+		regulator-name = "vcc_host0_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vdd_in_otg_out>;
+	};
+
+	vcc_host1_5v: usb-host1-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host1_vbus_drv>;
+		regulator-name = "vcc_host1_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vdd_in_otg_out>;
+	};
+
+	vcc_otg_5v: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vdd_in_otg_out>;
+	};
+};
+
+&dmc {
+	rockchip,num-channels = <2>;
+	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+		0x5 0x0>;
+	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+		0xa60 0x40 0x10 0x0>;
+	rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xe 0xe>;
+	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 5 1>;
+};
+
+&gmac {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+
+	touchscreen@44 {
+		compatible = "st,stmpe811";
+		reg = <0x44>;
+	};
+
+	adc@64 {
+		compatible = "maxim,max1037";
+		reg = <0x64>;
+	};
+
+	i2c_rtc: rtc@68 {
+		compatible = "rv4162";
+		reg = <0x68>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c_rtc_int>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <10 0>;
+	};
+};
+
+&i2c3 {
+	status = "okay";
+
+	i2c_eeprom_cb: eeprom@51 {
+		compatible = "atmel,24c32";
+		reg = <0x51>;
+		pagesize = <32>;
+	};
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+
+	pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
+		bias-pull-up;
+		drive-strength = <12>;
+	};
+
+	buttons {
+		user_button_pins: user-button-pins {
+			/* button 1 */
+			rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
+			/* button 2 */
+					<8 0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	rv4162 {
+		i2c_rtc_int: i2c-rtc-int {
+			rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		/*
+		 * Default drive strength isn't enough to achieve even
+		 * high-speed mode on pcm-947 board so bump up to 12 mA.
+		 */
+		sdmmc_bus4: sdmmc-bus4 {
+			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+		};
+
+		sdmmc_clk: sdmmc-clk {
+			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
+		};
+
+		sdmmc_cmd: sdmmc-cmd {
+			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+		};
+
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	touchscreen {
+		ts_irq_pin: ts-irq-pin {
+			rockchip,pins = <5 15 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host0_vbus_drv: host0-vbus-drv {
+			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		host1_vbus_drv: host1-vbus-drv {
+			rockchip,pins = <2 0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+	vmmc-supply = <&vdd_io_sd>;
+	vqmmc-supply = <&vdd_io_sd>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host1 {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+/*
+ * Device tree file for Phytec phyCORE-RK3288 SoM
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/net/ti-dp83867.h>
+#include "rk3288.dtsi"
+
+/ {
+	model = "Phytec RK3288 phyCORE";
+	compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
+
+	/*
+	 * Set the minimum memory size here and
+	 * let the bootloader set the real size.
+	 */
+	memory {
+		device_type = "memory";
+		reg = <0 0x8000000>;
+	};
+
+	aliases {
+		rtc0 = &i2c_rtc;
+		rtc1 = &rk818;
+	};
+
+	ext_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <125000000>;
+		clock-output-names = "ext_gmac";
+	};
+
+	io_domains: io_domains {
+		compatible = "rockchip,rk3288-io-voltage-domain";
+
+		status = "okay";
+		sdcard-supply = <&vdd_io_sd>;
+		flash0-supply = <&vdd_emmc_io>;
+		flash1-supply = <&vdd_misc_1v8>;
+		gpio1830-supply = <&vdd_3v3_io>;
+		gpio30-supply = <&vdd_3v3_io>;
+		bb-supply = <&vdd_3v3_io>;
+		dvp-supply = <&vdd_3v3_io>;
+		lcdc-supply = <&vdd_3v3_io>;
+		wifi-supply = <&vdd_3v3_io>;
+		audio-supply = <&vdd_3v3_io>;
+	};
+
+	leds: user-leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&user_led>;
+
+		user {
+			label = "green_led";
+			gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			default-state = "keep";
+		};
+	};
+
+	vdd_emmc_io: vdd-emmc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_emmc_io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vdd_3v3_io>;
+	};
+
+	vdd_in_otg_out: vdd-in-otg-out {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_in_otg_out";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vdd_misc_1v8: vdd-misc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_misc_1v8";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+	operating-points = <
+		/* KHz    uV */
+		1800000	1400000
+		1608000	1350000
+		1512000 1300000
+		1416000 1200000
+		1200000 1100000
+		1008000 1050000
+		 816000 1000000
+		 696000  950000
+		 600000  900000
+		 408000  900000
+		 312000  900000
+		 216000  900000
+		 126000  900000
+	>;
+};
+
+&emmc {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+	vmmc-supply = <&vdd_3v3_io>;
+	vqmmc-supply = <&vdd_emmc_io>;
+};
+
+&gmac {
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&ext_gmac>;
+	clock_in_out = "input";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
+	phy-handle = <&phy0>;
+	phy-supply = <&vdd_eth_2v5>;
+	phy-mode = "rgmii-id";
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 1000000>;
+	snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+	tx_delay = <0x0>;
+	rx_delay = <0x0>;
+
+	mdio0 {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			interrupt-parent = <&gpio4>;
+			interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+			enet-phy-lane-no-swap;
+		};
+	};
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c5>;
+};
+
+&i2c0 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+
+	clock-frequency = <400000>;
+
+	rk818: pmic@1c {
+		status = "okay";
+		compatible = "rockchip,rk818";
+		reg = <0x1c>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		vcc1-supply = <&vdd_sys>;
+		vcc2-supply = <&vdd_sys>;
+		vcc3-supply = <&vdd_sys>;
+		vcc4-supply = <&vdd_sys>;
+		boost-supply = <&vdd_in_otg_out>;
+		vcc6-supply = <&vdd_sys>;
+		vcc7-supply = <&vdd_misc_1v8>;
+		vcc8-supply = <&vdd_misc_1v8>;
+		vcc9-supply = <&vdd_3v3_io>;
+		vddio-supply = <&vdd_3v3_io>;
+
+		regulators {
+			u-boot,dm-pre-reloc;
+			vdd_log: DCDC_REG1 {
+				regulator-name = "vdd_log";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_gpu: DCDC_REG2 {
+				regulator-name = "vdd_gpu";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vdd_3v3_io: DCDC_REG4 {
+				regulator-name = "vdd_3v3_io";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vdd_sys: DCDC_BOOST {
+				regulator-name = "vdd_sys";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <5000000>;
+				};
+			};
+
+			/* vcc9 */
+			vdd_sd: SWITCH_REG {
+				regulator-name = "vdd_sd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			/* vcc6 */
+			vdd_eth_2v5: LDO_REG2 {
+				regulator-name = "vdd_eth_2v5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2500000>;
+				};
+			};
+
+			/* vcc7 */
+			vdd_1v0: LDO_REG3 {
+				regulator-name = "vdd_1v0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			/* vcc8 */
+			vdd_1v8_lcd_ldo: LDO_REG4 {
+				regulator-name = "vdd_1v8_lcd_ldo";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			/* vcc8 */
+			vdd_1v0_lcd: LDO_REG6 {
+				regulator-name = "vdd_1v0_lcd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			/* vcc7 */
+			vdd_1v8_ldo: LDO_REG7 {
+				regulator-name = "vdd_1v8_ldo";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			/* vcc9 */
+			vdd_io_sd: LDO_REG9 {
+				regulator-name = "vdd_io_sd";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+
+	/* M24C32-D */
+	i2c_eeprom: eeprom@50 {
+		compatible = "atmel,24c32";
+		reg = <0x50>;
+		pagesize = <32>;
+	};
+
+	vdd_cpu: regulator@60 {
+		compatible = "fcs,fan53555";
+		reg = <0x60>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-enable-ramp-delay = <300>;
+		regulator-name = "vdd_cpu";
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1430000>;
+		regulator-ramp-delay = <8000>;
+		vin-supply = <&vdd_sys>;
+	};
+};
+
+&pinctrl {
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	emmc {
+		/*
+		 * We run eMMC at max speed; bump up drive strength.
+		 * We also have external pulls, so disable the internal ones.
+		 */
+		emmc_clk: emmc-clk {
+			rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
+		};
+
+		emmc_cmd: emmc-cmd {
+			rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
+		};
+
+		emmc_bus8: emmc-bus8 {
+			rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
+		};
+	};
+
+	gmac {
+		phy_int: phy-int {
+			rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		phy_rst: phy-rst {
+			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+	};
+
+	leds {
+		user_led: user-led {
+			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+	};
+
+	pmic {
+		pmic_int: pmic-int {
+			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		/* Pin for switching state between sleep and non-sleep state */
+		pmic_sleep: pmic-sleep {
+			rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vdd_1v8_ldo>;
+};
+
+&spi2 {
+	status = "okay";
+
+	serial_flash: flash@0 {
+		compatible = "micron,n25q128a13", "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <50000000>;
+		m25p,fast-read;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "okay";
+	};
+};
+
+&tsadc {
+	status = "okay";
+	rockchip,hw-tshut-mode = <0>;
+	rockchip,hw-tshut-polarity = <0>;
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
@@ -8,6 +8,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <i2c.h>
 #include <led.h>
 #include <malloc.h>
 #include <ram.h>
@@ -25,6 +26,7 @@
 #include <dm/test.h>
 #include <dm/util.h>
 #include <power/regulator.h>
+#include <power/rk8xx_pmic.h>
  
 DECLARE_GLOBAL_DATA_PTR;
  
@@ -157,6 +159,32 @@
 }
 #endif
  
+#if !defined(CONFIG_SPL_OF_PLATDATA)
+static int phycore_init(void)
+{
+	struct udevice *pmic;
+	int ret;
+
+	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
+	if (ret)
+		return ret;
+
+#if defined(CONFIG_SPL_POWER_SUPPORT)
+	/* Increase USB input current to 2A */
+	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
+	if (ret)
+		return ret;
+
+	/* Close charger when USB lower then 3.26V */
+	ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+#endif
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl;
@@ -203,6 +231,18 @@
 		debug("Pinctrl init failed: %d\n", ret);
 		return;
 	}
+
+#if !defined(CONFIG_SPL_OF_PLATDATA)
+	if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
+		ret = phycore_init();
+		if (ret) {
+			debug("Failed to set up phycore power settings: %d\n",
+			      ret);
+			return;
+		}
+	}
+#endif
+
 	debug("\nspl:init dram\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
@@ -66,6 +66,14 @@
 	  has 1 or 2 GiB SDRAM. Expansion connectors provide access to
 	  I2C, SPI, UART, GPIOs and fan control.
  
+config TARGET_PHYCORE_RK3288
+	bool "phyCORE-RK3288"
+        select BOARD_LATE_INIT
+	help
+	  Add basic support for the PCM-947 carrier board, a RK3288 based
+	  development board made by PHYTEC. This board works in a combination
+	  with the phyCORE-RK3288 System on Module.
+
 config TARGET_POPMETAL_RK3288
 	bool "PopMetal-RK3288"
 	select BOARD_LATE_INIT
@@ -128,6 +136,8 @@
 source "board/google/veyron/Kconfig"
  
 source "board/mqmaker/miqi_rk3288/Kconfig"
+
+source "board/phytec/phycore_rk3288/Kconfig"
  
 source "board/radxa/rock2/Kconfig"
  
+if TARGET_PHYCORE_RK3288
+
+config SYS_BOARD
+	default "phycore_rk3288"
+
+config SYS_VENDOR
+	default "phytec"
+
+config SYS_CONFIG_NAME
+	default "phycore_rk3288"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
+phyCORE-RK3288
+M:	Wadim Egorov <w.egorov@phytec.de>
+S:	Maintained
+F:	board/phytec/phycore_rk3288
+F:	include/configs/phycore_rk3288.h
+F:	configs/phycore-rk3288_defconfig
+#
+# Copyright (C) 2017 PHYTEC Messtechnik GmbH
+# Author: Wadim Egorov <w.egorov@phytec.de>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += phycore-rk3288.o
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_TARGET_PHYCORE_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
+CONFIG_DEBUG_UART=y
+CONFIG_SILENT_CONSOLE=y
+CONFIG_CONSOLE_MUX=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+/*
+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#undef BOOT_TARGET_DEVICES
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0) \
+	func(MMC, mmc, 1)
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1
+
+#endif
...	...	@@ -34,6 +34,7 @@
34	34	rk3288-fennec.dtb \
35	35	rk3288-firefly.dtb \
36	36	rk3288-miqi.dtb \
	37	+ rk3288-phycore-rdk.dtb \
37	38	rk3288-popmetal.dtb \
38	39	rk3288-rock2-square.dtb \
39	40	rk3288-tinker.dtb \
	1	+/*
	2	+ * Device tree file for Phytec PCM-947 carrier board
	3	+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
	4	+ * Author: Wadim Egorov <w.egorov@phytec.de>
	5	+ *
	6	+ * This file is dual-licensed: you can use it either under the terms
	7	+ * of the GPL or the X11 license, at your option. Note that this dual
	8	+ * licensing only applies to this file, and not this project as a
	9	+ * whole.
	10	+ *
	11	+ * a) This file is free software; you can redistribute it and/or
	12	+ * modify it under the terms of the GNU General Public License as
	13	+ * published by the Free Software Foundation; either version 2 of the
	14	+ * License, or (at your option) any later version.
	15	+ *
	16	+ * This file is distributed in the hope that it will be useful,
	17	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+ * GNU General Public License for more details.
	20	+ *
	21	+ * Or, alternatively,
	22	+ *
	23	+ * b) Permission is hereby granted, free of charge, to any person
	24	+ * obtaining a copy of this software and associated documentation
	25	+ * files (the "Software"), to deal in the Software without
	26	+ * restriction, including without limitation the rights to use,
	27	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	28	+ * sell copies of the Software, and to permit persons to whom the
	29	+ * Software is furnished to do so, subject to the following
	30	+ * conditions:
	31	+ *
	32	+ * The above copyright notice and this permission notice shall be
	33	+ * included in all copies or substantial portions of the Software.
	34	+ *
	35	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	36	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	40	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	+ * OTHER DEALINGS IN THE SOFTWARE.
	43	+ */
	44	+
	45	+/dts-v1/;
	46	+
	47	+#include <dt-bindings/input/input.h>
	48	+#include "rk3288-phycore-som.dtsi"
	49	+
	50	+/ {
	51	+ model = "Phytec RK3288 PCM-947";
	52	+ compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
	53	+
	54	+ chosen {
	55	+ stdout-path = &uart2;
	56	+ };
	57	+
	58	+ config {
	59	+ u-boot,dm-pre-reloc;
	60	+ u-boot,boot0 = &emmc;
	61	+ };
	62	+
	63	+ user_buttons: user-buttons {
	64	+ compatible = "gpio-keys";
	65	+ pinctrl-names = "default";
	66	+ pinctrl-0 = <&user_button_pins>;
	67	+
	68	+ button@0 {
	69	+ label = "home";
	70	+ linux,code = <KEY_HOME>;
	71	+ gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>;
	72	+ wakeup-source;
	73	+ };
	74	+
	75	+ button@1 {
	76	+ label = "menu";
	77	+ linux,code = <KEY_MENU>;
	78	+ gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
	79	+ wakeup-source;
	80	+ };
	81	+ };
	82	+
	83	+ vcc_host0_5v: usb-host0-regulator {
	84	+ compatible = "regulator-fixed";
	85	+ gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
	86	+ pinctrl-names = "default";
	87	+ pinctrl-0 = <&host0_vbus_drv>;
	88	+ regulator-name = "vcc_host0_5v";
	89	+ regulator-min-microvolt = <5000000>;
	90	+ regulator-max-microvolt = <5000000>;
	91	+ regulator-always-on;
	92	+ vin-supply = <&vdd_in_otg_out>;
	93	+ };
	94	+
	95	+ vcc_host1_5v: usb-host1-regulator {
	96	+ compatible = "regulator-fixed";
	97	+ gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
	98	+ pinctrl-names = "default";
	99	+ pinctrl-0 = <&host1_vbus_drv>;
	100	+ regulator-name = "vcc_host1_5v";
	101	+ regulator-min-microvolt = <5000000>;
	102	+ regulator-max-microvolt = <5000000>;
	103	+ regulator-always-on;
	104	+ vin-supply = <&vdd_in_otg_out>;
	105	+ };
	106	+
	107	+ vcc_otg_5v: usb-otg-regulator {
	108	+ compatible = "regulator-fixed";
	109	+ gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
	110	+ pinctrl-names = "default";
	111	+ pinctrl-0 = <&otg_vbus_drv>;
	112	+ regulator-name = "vcc_otg_5v";
	113	+ regulator-min-microvolt = <5000000>;
	114	+ regulator-max-microvolt = <5000000>;
	115	+ regulator-always-on;
	116	+ vin-supply = <&vdd_in_otg_out>;
	117	+ };
	118	+};
	119	+
	120	+&dmc {
	121	+ rockchip,num-channels = <2>;
	122	+ rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
	123	+ 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
	124	+ 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
	125	+ 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
	126	+ 0x5 0x0>;
	127	+ rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
	128	+ 0xa60 0x40 0x10 0x0>;
	129	+ rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xe 0xe>;
	130	+ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 5 1>;
	131	+};
	132	+
	133	+&gmac {
	134	+ status = "okay";
	135	+};
	136	+
	137	+&hdmi {
	138	+ status = "okay";
	139	+};
	140	+
	141	+&i2c1 {
	142	+ status = "okay";
	143	+
	144	+ touchscreen@44 {
	145	+ compatible = "st,stmpe811";
	146	+ reg = <0x44>;
	147	+ };
	148	+
	149	+ adc@64 {
	150	+ compatible = "maxim,max1037";
	151	+ reg = <0x64>;
	152	+ };
	153	+
	154	+ i2c_rtc: rtc@68 {
	155	+ compatible = "rv4162";
	156	+ reg = <0x68>;
	157	+ pinctrl-names = "default";
	158	+ pinctrl-0 = <&i2c_rtc_int>;
	159	+ interrupt-parent = <&gpio5>;
	160	+ interrupts = <10 0>;
	161	+ };
	162	+};
	163	+
	164	+&i2c3 {
	165	+ status = "okay";
	166	+
	167	+ i2c_eeprom_cb: eeprom@51 {
	168	+ compatible = "atmel,24c32";
	169	+ reg = <0x51>;
	170	+ pagesize = <32>;
	171	+ };
	172	+};
	173	+
	174	+&i2c4 {
	175	+ status = "okay";
	176	+};
	177	+
	178	+&i2c5 {
	179	+ status = "okay";
	180	+};
	181	+
	182	+&pinctrl {
	183	+ u-boot,dm-pre-reloc;
	184	+
	185	+ pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
	186	+ bias-pull-up;
	187	+ drive-strength = <12>;
	188	+ };
	189	+
	190	+ buttons {
	191	+ user_button_pins: user-button-pins {
	192	+ /* button 1 */
	193	+ rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
	194	+ /* button 2 */
	195	+ <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
	196	+ };
	197	+ };
	198	+
	199	+ rv4162 {
	200	+ i2c_rtc_int: i2c-rtc-int {
	201	+ rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
	202	+ };
	203	+ };
	204	+
	205	+ sdmmc {
	206	+ /*
	207	+ * Default drive strength isn't enough to achieve even
	208	+ * high-speed mode on pcm-947 board so bump up to 12 mA.
	209	+ */
	210	+ sdmmc_bus4: sdmmc-bus4 {
	211	+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
	212	+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
	213	+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
	214	+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
	215	+ };
	216	+
	217	+ sdmmc_clk: sdmmc-clk {
	218	+ rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
	219	+ };
	220	+
	221	+ sdmmc_cmd: sdmmc-cmd {
	222	+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
	223	+ };
	224	+
	225	+ sdmmc_pwr: sdmmc-pwr {
	226	+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
	227	+ };
	228	+ };
	229	+
	230	+ touchscreen {
	231	+ ts_irq_pin: ts-irq-pin {
	232	+ rockchip,pins = <5 15 RK_FUNC_GPIO &pcfg_pull_none>;
	233	+ };
	234	+ };
	235	+
	236	+ usb_host {
	237	+ host0_vbus_drv: host0-vbus-drv {
	238	+ rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
	239	+ };
	240	+
	241	+ host1_vbus_drv: host1-vbus-drv {
	242	+ rockchip,pins = <2 0 RK_FUNC_GPIO &pcfg_pull_none>;
	243	+ };
	244	+ };
	245	+
	246	+ usb_otg {
	247	+ otg_vbus_drv: otg-vbus-drv {
	248	+ rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
	249	+ };
	250	+ };
	251	+};
	252	+
	253	+&sdmmc {
	254	+ u-boot,dm-pre-reloc;
	255	+
	256	+ bus-width = <4>;
	257	+ cap-mmc-highspeed;
	258	+ cap-sd-highspeed;
	259	+ card-detect-delay = <200>;
	260	+ disable-wp;
	261	+ num-slots = <1>;
	262	+ pinctrl-names = "default";
	263	+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
	264	+ vmmc-supply = <&vdd_io_sd>;
	265	+ vqmmc-supply = <&vdd_io_sd>;
	266	+ status = "okay";
	267	+};
	268	+
	269	+&uart0 {
	270	+ pinctrl-names = "default";
	271	+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
	272	+ status = "okay";
	273	+};
	274	+
	275	+&uart2 {
	276	+ u-boot,dm-pre-reloc;
	277	+ status = "okay";
	278	+};
	279	+
	280	+&usbphy {
	281	+ status = "okay";
	282	+};
	283	+
	284	+&usb_host0_ehci {
	285	+ status = "okay";
	286	+};
	287	+
	288	+&usb_host1 {
	289	+ status = "okay";
	290	+};
	291	+
	292	+&usb_otg {
	293	+ status = "okay";
	294	+};
	1	+/*
	2	+ * Device tree file for Phytec phyCORE-RK3288 SoM
	3	+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
	4	+ * Author: Wadim Egorov <w.egorov@phytec.de>
	5	+ *
	6	+ * This file is dual-licensed: you can use it either under the terms
	7	+ * of the GPL or the X11 license, at your option. Note that this dual
	8	+ * licensing only applies to this file, and not this project as a
	9	+ * whole.
	10	+ *
	11	+ * a) This file is free software; you can redistribute it and/or
	12	+ * modify it under the terms of the GNU General Public License as
	13	+ * published by the Free Software Foundation; either version 2 of the
	14	+ * License, or (at your option) any later version.
	15	+ *
	16	+ * This file is distributed in the hope that it will be useful,
	17	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+ * GNU General Public License for more details.
	20	+ *
	21	+ * Or, alternatively,
	22	+ *
	23	+ * b) Permission is hereby granted, free of charge, to any person
	24	+ * obtaining a copy of this software and associated documentation
	25	+ * files (the "Software"), to deal in the Software without
	26	+ * restriction, including without limitation the rights to use,
	27	+ * copy, modify, merge, publish, distribute, sublicense, and/or
	28	+ * sell copies of the Software, and to permit persons to whom the
	29	+ * Software is furnished to do so, subject to the following
	30	+ * conditions:
	31	+ *
	32	+ * The above copyright notice and this permission notice shall be
	33	+ * included in all copies or substantial portions of the Software.
	34	+ *
	35	+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	36	+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	40	+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	+ * OTHER DEALINGS IN THE SOFTWARE.
	43	+ */
	44	+
	45	+#include <dt-bindings/net/ti-dp83867.h>
	46	+#include "rk3288.dtsi"
	47	+
	48	+/ {
	49	+ model = "Phytec RK3288 phyCORE";
	50	+ compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
	51	+
	52	+ /*
	53	+ * Set the minimum memory size here and
	54	+ * let the bootloader set the real size.
	55	+ */
	56	+ memory {
	57	+ device_type = "memory";
	58	+ reg = <0 0x8000000>;
	59	+ };
	60	+
	61	+ aliases {
	62	+ rtc0 = &i2c_rtc;
	63	+ rtc1 = &rk818;
	64	+ };
	65	+
	66	+ ext_gmac: external-gmac-clock {
	67	+ compatible = "fixed-clock";
	68	+ #clock-cells = <0>;
	69	+ clock-frequency = <125000000>;
	70	+ clock-output-names = "ext_gmac";
	71	+ };
	72	+
	73	+ io_domains: io_domains {
	74	+ compatible = "rockchip,rk3288-io-voltage-domain";
	75	+
	76	+ status = "okay";
	77	+ sdcard-supply = <&vdd_io_sd>;
	78	+ flash0-supply = <&vdd_emmc_io>;
	79	+ flash1-supply = <&vdd_misc_1v8>;
	80	+ gpio1830-supply = <&vdd_3v3_io>;
	81	+ gpio30-supply = <&vdd_3v3_io>;
	82	+ bb-supply = <&vdd_3v3_io>;
	83	+ dvp-supply = <&vdd_3v3_io>;
	84	+ lcdc-supply = <&vdd_3v3_io>;
	85	+ wifi-supply = <&vdd_3v3_io>;
	86	+ audio-supply = <&vdd_3v3_io>;
	87	+ };
	88	+
	89	+ leds: user-leds {
	90	+ compatible = "gpio-leds";
	91	+ pinctrl-names = "default";
	92	+ pinctrl-0 = <&user_led>;
	93	+
	94	+ user {
	95	+ label = "green_led";
	96	+ gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
	97	+ linux,default-trigger = "heartbeat";
	98	+ default-state = "keep";
	99	+ };
	100	+ };
	101	+
	102	+ vdd_emmc_io: vdd-emmc-io {
	103	+ compatible = "regulator-fixed";
	104	+ regulator-name = "vdd_emmc_io";
	105	+ regulator-min-microvolt = <1800000>;
	106	+ regulator-max-microvolt = <1800000>;
	107	+ vin-supply = <&vdd_3v3_io>;
	108	+ };
	109	+
	110	+ vdd_in_otg_out: vdd-in-otg-out {
	111	+ compatible = "regulator-fixed";
	112	+ regulator-name = "vdd_in_otg_out";
	113	+ regulator-always-on;
	114	+ regulator-boot-on;
	115	+ regulator-min-microvolt = <5000000>;
	116	+ regulator-max-microvolt = <5000000>;
	117	+ };
	118	+
	119	+ vdd_misc_1v8: vdd-misc-1v8 {
	120	+ compatible = "regulator-fixed";
	121	+ regulator-name = "vdd_misc_1v8";
	122	+ regulator-always-on;
	123	+ regulator-boot-on;
	124	+ regulator-min-microvolt = <1800000>;
	125	+ regulator-max-microvolt = <1800000>;
	126	+ };
	127	+};
	128	+
	129	+&cpu0 {
	130	+ cpu0-supply = <&vdd_cpu>;
	131	+ operating-points = <
	132	+ /* KHz uV */
	133	+ 1800000 1400000
	134	+ 1608000 1350000
	135	+ 1512000 1300000
	136	+ 1416000 1200000
	137	+ 1200000 1100000
	138	+ 1008000 1050000
	139	+ 816000 1000000
	140	+ 696000 950000
	141	+ 600000 900000
	142	+ 408000 900000
	143	+ 312000 900000
	144	+ 216000 900000
	145	+ 126000 900000
	146	+ >;
	147	+};
	148	+
	149	+&emmc {
	150	+ status = "okay";
	151	+ u-boot,dm-pre-reloc;
	152	+
	153	+ bus-width = <8>;
	154	+ cap-mmc-highspeed;
	155	+ disable-wp;
	156	+ non-removable;
	157	+ num-slots = <1>;
	158	+ pinctrl-names = "default";
	159	+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
	160	+ vmmc-supply = <&vdd_3v3_io>;
	161	+ vqmmc-supply = <&vdd_emmc_io>;
	162	+};
	163	+
	164	+&gmac {
	165	+ assigned-clocks = <&cru SCLK_MAC>;
	166	+ assigned-clock-parents = <&ext_gmac>;
	167	+ clock_in_out = "input";
	168	+ pinctrl-names = "default";
	169	+ pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
	170	+ phy-handle = <&phy0>;
	171	+ phy-supply = <&vdd_eth_2v5>;
	172	+ phy-mode = "rgmii-id";
	173	+ snps,reset-active-low;
	174	+ snps,reset-delays-us = <0 10000 1000000>;
	175	+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
	176	+ tx_delay = <0x0>;
	177	+ rx_delay = <0x0>;
	178	+
	179	+ mdio0 {
	180	+ compatible = "snps,dwmac-mdio";
	181	+ #address-cells = <1>;
	182	+ #size-cells = <0>;
	183	+
	184	+ phy0: ethernet-phy@0 {
	185	+ compatible = "ethernet-phy-ieee802.3-c22";
	186	+ reg = <0>;
	187	+ interrupt-parent = <&gpio4>;
	188	+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
	189	+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
	190	+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
	191	+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	192	+ enet-phy-lane-no-swap;
	193	+ };
	194	+ };
	195	+};
	196	+
	197	+&hdmi {
	198	+ ddc-i2c-bus = <&i2c5>;
	199	+};
	200	+
	201	+&i2c0 {
	202	+ status = "okay";
	203	+ u-boot,dm-pre-reloc;
	204	+
	205	+ clock-frequency = <400000>;
	206	+
	207	+ rk818: pmic@1c {
	208	+ status = "okay";
	209	+ compatible = "rockchip,rk818";
	210	+ reg = <0x1c>;
	211	+ interrupt-parent = <&gpio0>;
	212	+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
	213	+ pinctrl-names = "default";
	214	+ pinctrl-0 = <&pmic_int>;
	215	+ rockchip,system-power-controller;
	216	+ wakeup-source;
	217	+ #clock-cells = <1>;
	218	+ u-boot,dm-pre-reloc;
	219	+
	220	+ vcc1-supply = <&vdd_sys>;
	221	+ vcc2-supply = <&vdd_sys>;
	222	+ vcc3-supply = <&vdd_sys>;
	223	+ vcc4-supply = <&vdd_sys>;
	224	+ boost-supply = <&vdd_in_otg_out>;
	225	+ vcc6-supply = <&vdd_sys>;
	226	+ vcc7-supply = <&vdd_misc_1v8>;
	227	+ vcc8-supply = <&vdd_misc_1v8>;
	228	+ vcc9-supply = <&vdd_3v3_io>;
	229	+ vddio-supply = <&vdd_3v3_io>;
	230	+
	231	+ regulators {
	232	+ u-boot,dm-pre-reloc;
	233	+ vdd_log: DCDC_REG1 {
	234	+ regulator-name = "vdd_log";
	235	+ regulator-always-on;
	236	+ regulator-boot-on;
	237	+ regulator-min-microvolt = <1100000>;
	238	+ regulator-max-microvolt = <1100000>;
	239	+ regulator-state-mem {
	240	+ regulator-off-in-suspend;
	241	+ };
	242	+ };
	243	+
	244	+ vdd_gpu: DCDC_REG2 {
	245	+ regulator-name = "vdd_gpu";
	246	+ regulator-always-on;
	247	+ regulator-boot-on;
	248	+ regulator-min-microvolt = <800000>;
	249	+ regulator-max-microvolt = <1250000>;
	250	+ regulator-state-mem {
	251	+ regulator-on-in-suspend;
	252	+ regulator-suspend-microvolt = <1000000>;
	253	+ };
	254	+ };
	255	+
	256	+ vcc_ddr: DCDC_REG3 {
	257	+ regulator-name = "vcc_ddr";
	258	+ regulator-always-on;
	259	+ regulator-boot-on;
	260	+ regulator-state-mem {
	261	+ regulator-on-in-suspend;
	262	+ };
	263	+ };
	264	+
	265	+ vdd_3v3_io: DCDC_REG4 {
	266	+ regulator-name = "vdd_3v3_io";
	267	+ regulator-always-on;
	268	+ regulator-boot-on;
	269	+ regulator-min-microvolt = <3300000>;
	270	+ regulator-max-microvolt = <3300000>;
	271	+ regulator-state-mem {
	272	+ regulator-on-in-suspend;
	273	+ regulator-suspend-microvolt = <3300000>;
	274	+ };
	275	+ };
	276	+
	277	+ vdd_sys: DCDC_BOOST {
	278	+ regulator-name = "vdd_sys";
	279	+ regulator-always-on;
	280	+ regulator-boot-on;
	281	+ regulator-min-microvolt = <5000000>;
	282	+ regulator-max-microvolt = <5000000>;
	283	+ regulator-state-mem {
	284	+ regulator-on-in-suspend;
	285	+ regulator-suspend-microvolt = <5000000>;
	286	+ };
	287	+ };
	288	+
	289	+ /* vcc9 */
	290	+ vdd_sd: SWITCH_REG {
	291	+ regulator-name = "vdd_sd";
	292	+ regulator-always-on;
	293	+ regulator-boot-on;
	294	+ regulator-state-mem {
	295	+ regulator-off-in-suspend;
	296	+ };
	297	+ };
	298	+
	299	+ /* vcc6 */
	300	+ vdd_eth_2v5: LDO_REG2 {
	301	+ regulator-name = "vdd_eth_2v5";
	302	+ regulator-always-on;
	303	+ regulator-boot-on;
	304	+ regulator-min-microvolt = <2500000>;
	305	+ regulator-max-microvolt = <2500000>;
	306	+ regulator-state-mem {
	307	+ regulator-on-in-suspend;
	308	+ regulator-suspend-microvolt = <2500000>;
	309	+ };
	310	+ };
	311	+
	312	+ /* vcc7 */
	313	+ vdd_1v0: LDO_REG3 {
	314	+ regulator-name = "vdd_1v0";
	315	+ regulator-always-on;
	316	+ regulator-boot-on;
	317	+ regulator-min-microvolt = <1000000>;
	318	+ regulator-max-microvolt = <1000000>;
	319	+ regulator-state-mem {
	320	+ regulator-on-in-suspend;
	321	+ regulator-suspend-microvolt = <1000000>;
	322	+ };
	323	+ };
	324	+
	325	+ /* vcc8 */
	326	+ vdd_1v8_lcd_ldo: LDO_REG4 {
	327	+ regulator-name = "vdd_1v8_lcd_ldo";
	328	+ regulator-always-on;
	329	+ regulator-boot-on;
	330	+ regulator-min-microvolt = <1800000>;
	331	+ regulator-max-microvolt = <1800000>;
	332	+ regulator-state-mem {
	333	+ regulator-on-in-suspend;
	334	+ regulator-suspend-microvolt = <1800000>;
	335	+ };
	336	+ };
	337	+
	338	+ /* vcc8 */
	339	+ vdd_1v0_lcd: LDO_REG6 {
	340	+ regulator-name = "vdd_1v0_lcd";
	341	+ regulator-always-on;
	342	+ regulator-boot-on;
	343	+ regulator-min-microvolt = <1000000>;
	344	+ regulator-max-microvolt = <1000000>;
	345	+ regulator-state-mem {
	346	+ regulator-on-in-suspend;
	347	+ regulator-suspend-microvolt = <1000000>;
	348	+ };
	349	+ };
	350	+
	351	+ /* vcc7 */
	352	+ vdd_1v8_ldo: LDO_REG7 {
	353	+ regulator-name = "vdd_1v8_ldo";
	354	+ regulator-always-on;
	355	+ regulator-boot-on;
	356	+ regulator-min-microvolt = <1800000>;
	357	+ regulator-max-microvolt = <1800000>;
	358	+ regulator-state-mem {
	359	+ regulator-off-in-suspend;
	360	+ regulator-suspend-microvolt = <1800000>;
	361	+ };
	362	+ };
	363	+
	364	+ /* vcc9 */
	365	+ vdd_io_sd: LDO_REG9 {
	366	+ regulator-name = "vdd_io_sd";
	367	+ regulator-always-on;
	368	+ regulator-boot-on;
	369	+ regulator-min-microvolt = <3300000>;
	370	+ regulator-max-microvolt = <3300000>;
	371	+ regulator-state-mem {
	372	+ regulator-on-in-suspend;
	373	+ regulator-suspend-microvolt = <3300000>;
	374	+ };
	375	+ };
	376	+ };
	377	+ };
	378	+
	379	+ /* M24C32-D */
	380	+ i2c_eeprom: eeprom@50 {
	381	+ compatible = "atmel,24c32";
	382	+ reg = <0x50>;
	383	+ pagesize = <32>;
	384	+ };
	385	+
	386	+ vdd_cpu: regulator@60 {
	387	+ compatible = "fcs,fan53555";
	388	+ reg = <0x60>;
	389	+ fcs,suspend-voltage-selector = <1>;
	390	+ regulator-always-on;
	391	+ regulator-boot-on;
	392	+ regulator-enable-ramp-delay = <300>;
	393	+ regulator-name = "vdd_cpu";
	394	+ regulator-min-microvolt = <800000>;
	395	+ regulator-max-microvolt = <1430000>;
	396	+ regulator-ramp-delay = <8000>;
	397	+ vin-supply = <&vdd_sys>;
	398	+ };
	399	+};
	400	+
	401	+&pinctrl {
	402	+ pcfg_output_high: pcfg-output-high {
	403	+ output-high;
	404	+ };
	405	+
	406	+ emmc {
	407	+ /*
	408	+ * We run eMMC at max speed; bump up drive strength.
	409	+ * We also have external pulls, so disable the internal ones.
	410	+ */
	411	+ emmc_clk: emmc-clk {
	412	+ rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
	413	+ };
	414	+
	415	+ emmc_cmd: emmc-cmd {
	416	+ rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
	417	+ };
	418	+
	419	+ emmc_bus8: emmc-bus8 {
	420	+ rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
	421	+ <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
	422	+ <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
	423	+ <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
	424	+ <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
	425	+ <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
	426	+ <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
	427	+ <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
	428	+ };
	429	+ };
	430	+
	431	+ gmac {
	432	+ phy_int: phy-int {
	433	+ rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
	434	+ };
	435	+
	436	+ phy_rst: phy-rst {
	437	+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
	438	+ };
	439	+ };
	440	+
	441	+ leds {
	442	+ user_led: user-led {
	443	+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
	444	+ };
	445	+ };
	446	+
	447	+ pmic {
	448	+ pmic_int: pmic-int {
	449	+ rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
	450	+ };
	451	+
	452	+ /* Pin for switching state between sleep and non-sleep state */
	453	+ pmic_sleep: pmic-sleep {
	454	+ rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
	455	+ };
	456	+ };
	457	+};
	458	+
	459	+&pwm1 {
	460	+ status = "okay";
	461	+};
	462	+
	463	+&saradc {
	464	+ status = "okay";
	465	+ vref-supply = <&vdd_1v8_ldo>;
	466	+};
	467	+
	468	+&spi2 {
	469	+ status = "okay";
	470	+
	471	+ serial_flash: flash@0 {
	472	+ compatible = "micron,n25q128a13", "jedec,spi-nor";
	473	+ reg = <0x0>;
	474	+ spi-max-frequency = <50000000>;
	475	+ m25p,fast-read;
	476	+ #address-cells = <1>;
	477	+ #size-cells = <1>;
	478	+ status = "okay";
	479	+ };
	480	+};
	481	+
	482	+&tsadc {
	483	+ status = "okay";
	484	+ rockchip,hw-tshut-mode = <0>;
	485	+ rockchip,hw-tshut-polarity = <0>;
	486	+};
	487	+
	488	+&vopb {
	489	+ status = "okay";
	490	+};
	491	+
	492	+&vopb_mmu {
	493	+ status = "okay";
	494	+};
	495	+
	496	+&vopl {
	497	+ status = "okay";
	498	+};
	499	+
	500	+&vopl_mmu {
	501	+ status = "okay";
	502	+};
	503	+
	504	+&wdt {
	505	+ status = "okay";
	506	+};
...	...	@@ -8,6 +8,7 @@
8	8	#include <debug_uart.h>
9	9	#include <dm.h>
10	10	#include <fdtdec.h>
	11	+#include <i2c.h>
11	12	#include <led.h>
12	13	#include <malloc.h>
13	14	#include <ram.h>
...	...	@@ -25,6 +26,7 @@
25	26	#include <dm/test.h>
26	27	#include <dm/util.h>
27	28	#include <power/regulator.h>
	29	+#include <power/rk8xx_pmic.h>
28	30
29	31	DECLARE_GLOBAL_DATA_PTR;
30	32
...	...	@@ -157,6 +159,32 @@
157	159	}
158	160	#endif
159	161
	162	+#if !defined(CONFIG_SPL_OF_PLATDATA)
	163	+static int phycore_init(void)
	164	+{
	165	+ struct udevice *pmic;
	166	+ int ret;
	167	+
	168	+ ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
	169	+ if (ret)
	170	+ return ret;
	171	+
	172	+#if defined(CONFIG_SPL_POWER_SUPPORT)
	173	+ /* Increase USB input current to 2A */
	174	+ ret = rk818_spl_configure_usb_input_current(pmic, 2000);
	175	+ if (ret)
	176	+ return ret;
	177	+
	178	+ /* Close charger when USB lower then 3.26V */
	179	+ ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
	180	+ if (ret)
	181	+ return ret;
	182	+#endif
	183	+
	184	+ return 0;
	185	+}
	186	+#endif
	187	+
160	188	void board_init_f(ulong dummy)
161	189	{
162	190	struct udevice *pinctrl;
...	...	@@ -203,6 +231,18 @@
203	231	debug("Pinctrl init failed: %d\n", ret);
204	232	return;
205	233	}
	234	+
	235	+#if !defined(CONFIG_SPL_OF_PLATDATA)
	236	+ if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
	237	+ ret = phycore_init();
	238	+ if (ret) {
	239	+ debug("Failed to set up phycore power settings: %d\n",
	240	+ ret);
	241	+ return;
	242	+ }
	243	+ }
	244	+#endif
	245	+
206	246	debug("\nspl:init dram\n");
207	247	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
208	248	if (ret) {
...	...	@@ -66,6 +66,14 @@
66	66	has 1 or 2 GiB SDRAM. Expansion connectors provide access to
67	67	I2C, SPI, UART, GPIOs and fan control.
68	68
	69	+config TARGET_PHYCORE_RK3288
	70	+ bool "phyCORE-RK3288"
	71	+ select BOARD_LATE_INIT
	72	+ help
	73	+ Add basic support for the PCM-947 carrier board, a RK3288 based
	74	+ development board made by PHYTEC. This board works in a combination
	75	+ with the phyCORE-RK3288 System on Module.
	76	+
69	77	config TARGET_POPMETAL_RK3288
70	78	bool "PopMetal-RK3288"
71	79	select BOARD_LATE_INIT
...	...	@@ -128,6 +136,8 @@
128	136	source "board/google/veyron/Kconfig"
129	137
130	138	source "board/mqmaker/miqi_rk3288/Kconfig"
	139	+
	140	+source "board/phytec/phycore_rk3288/Kconfig"
131	141
132	142	source "board/radxa/rock2/Kconfig"
133	143
	1	+if TARGET_PHYCORE_RK3288
	2	+
	3	+config SYS_BOARD
	4	+ default "phycore_rk3288"
	5	+
	6	+config SYS_VENDOR
	7	+ default "phytec"
	8	+
	9	+config SYS_CONFIG_NAME
	10	+ default "phycore_rk3288"
	11	+
	12	+config BOARD_SPECIFIC_OPTIONS # dummy
	13	+ def_bool y
	14	+
	15	+endif
	1	+phyCORE-RK3288
	2	+M: Wadim Egorov <w.egorov@phytec.de>
	3	+S: Maintained
	4	+F: board/phytec/phycore_rk3288
	5	+F: include/configs/phycore_rk3288.h
	6	+F: configs/phycore-rk3288_defconfig
	1	+#
	2	+# Copyright (C) 2017 PHYTEC Messtechnik GmbH
	3	+# Author: Wadim Egorov <w.egorov@phytec.de>
	4	+#
	5	+# SPDX-License-Identifier: GPL-2.0+
	6	+#
	7	+
	8	+obj-y += phycore-rk3288.o
	1	+/*
	2	+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
	3	+ * Author: Wadim Egorov <w.egorov@phytec.de>
	4	+ *
	5	+ * SPDX-License-Identifier: GPL-2.0+
	6	+ */
	7	+
	8	+#include <common.h>
	1	+CONFIG_ARM=y
	2	+CONFIG_ARCH_ROCKCHIP=y
	3	+CONFIG_SYS_MALLOC_F_LEN=0x2000
	4	+CONFIG_ROCKCHIP_RK3288=y
	5	+CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
	6	+CONFIG_TARGET_PHYCORE_RK3288=y
	7	+CONFIG_SPL_STACK_R_ADDR=0x80000
	8	+CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
	9	+CONFIG_DEBUG_UART=y
	10	+CONFIG_SILENT_CONSOLE=y
	11	+CONFIG_CONSOLE_MUX=y
	12	+# CONFIG_DISPLAY_CPUINFO is not set
	13	+CONFIG_SPL_STACK_R=y
	14	+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
	15	+CONFIG_SPL_I2C_SUPPORT=y
	16	+CONFIG_SPL_POWER_SUPPORT=y
	17	+# CONFIG_CMD_IMLS is not set
	18	+CONFIG_CMD_GPT=y
	19	+CONFIG_CMD_MMC=y
	20	+CONFIG_CMD_SF=y
	21	+CONFIG_CMD_SPI=y
	22	+CONFIG_CMD_I2C=y
	23	+CONFIG_CMD_USB=y
	24	+CONFIG_CMD_GPIO=y
	25	+# CONFIG_CMD_SETEXPR is not set
	26	+CONFIG_CMD_CACHE=y
	27	+CONFIG_CMD_TIME=y
	28	+CONFIG_CMD_PMIC=y
	29	+CONFIG_CMD_REGULATOR=y
	30	+# CONFIG_SPL_DOS_PARTITION is not set
	31	+# CONFIG_SPL_ISO_PARTITION is not set
	32	+# CONFIG_SPL_EFI_PARTITION is not set
	33	+CONFIG_SPL_PARTITION_UUIDS=y
	34	+CONFIG_SPL_OF_CONTROL=y
	35	+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
	36	+CONFIG_REGMAP=y
	37	+CONFIG_SPL_REGMAP=y
	38	+CONFIG_SYSCON=y
	39	+CONFIG_SPL_SYSCON=y
	40	+# CONFIG_SPL_SIMPLE_BUS is not set
	41	+CONFIG_CLK=y
	42	+CONFIG_SPL_CLK=y
	43	+CONFIG_ROCKCHIP_GPIO=y
	44	+CONFIG_SYS_I2C_ROCKCHIP=y
	45	+CONFIG_MMC_DW=y
	46	+CONFIG_MMC_DW_ROCKCHIP=y
	47	+CONFIG_DM_ETH=y
	48	+CONFIG_ETH_DESIGNWARE=y
	49	+CONFIG_GMAC_ROCKCHIP=y
	50	+CONFIG_PINCTRL=y
	51	+CONFIG_SPL_PINCTRL=y
	52	+# CONFIG_SPL_PINCTRL_FULL is not set
	53	+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
	54	+CONFIG_DM_PMIC=y
	55	+CONFIG_PMIC_RK8XX=y
	56	+CONFIG_DM_REGULATOR_FIXED=y
	57	+CONFIG_REGULATOR_RK8XX=y
	58	+CONFIG_PWM_ROCKCHIP=y
	59	+CONFIG_RAM=y
	60	+CONFIG_SPL_RAM=y
	61	+CONFIG_DEBUG_UART_BASE=0xff690000
	62	+CONFIG_DEBUG_UART_CLOCK=24000000
	63	+CONFIG_DEBUG_UART_SHIFT=2
	64	+CONFIG_SYS_NS16550=y
	65	+CONFIG_SYSRESET=y
	66	+CONFIG_USB=y
	67	+CONFIG_USB_STORAGE=y
	68	+CONFIG_USE_TINY_PRINTF=y
	69	+CONFIG_CMD_DHRYSTONE=y
	70	+CONFIG_ERRNO_STR=y