Eric Lee / smarc-uboot

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Commit c28d4ea22ba6a6895eb189a4d7ceed4e63346715

Authored by Mugunthan V N
Committed by Lokesh Vutla
1 parent 529d767f62
Exists in v2016.05-smarct4x and in 3 other branches v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc

drivers: net: phy: atheros: add separate config for AR8031 

In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.

Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>

Showing 1 changed file with 36 additions and 1 deletions Side-by-side Diff

drivers/net/phy/atheros.c
Diff comments   View file @ c28d4ea
... ... @@ -8,6 +8,15 @@
8 8 */
9 9 #include <phy.h>
10 10  
  11 +#define AR803x_PHY_DEBUG_ADDR_REG 0x1d
  12 +#define AR803x_PHY_DEBUG_DATA_REG 0x1e
  13 +
  14 +#define AR803x_DEBUG_REG_5 0x5
  15 +#define AR803x_RGMII_TX_CLK_DLY 0x100
  16 +
  17 +#define AR803x_DEBUG_REG_0 0x0
  18 +#define AR803x_RGMII_RX_CLK_DLY 0x8000
  19 +
11 20 static int ar8021_config(struct phy_device *phydev)
12 21 {
13 22 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
... ... @@ -17,6 +26,32 @@
17 26 return 0;
18 27 }
19 28  
  29 +static int ar8031_config(struct phy_device *phydev)
  30 +{
  31 + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
  32 + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  33 + phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
  34 + AR803x_DEBUG_REG_5);
  35 + phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
  36 + AR803x_RGMII_TX_CLK_DLY);
  37 + }
  38 +
  39 + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
  40 + phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  41 + phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
  42 + AR803x_DEBUG_REG_0);
  43 + phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
  44 + AR803x_RGMII_RX_CLK_DLY);
  45 + }
  46 +
  47 + phydev->supported = phydev->drv->features;
  48 +
  49 + genphy_config_aneg(phydev);
  50 + genphy_restart_aneg(phydev);
  51 +
  52 + return 0;
  53 +}
  54 +
20 55 static int ar8035_config(struct phy_device *phydev)
21 56 {
22 57 int regval;
... ... @@ -54,7 +89,7 @@
54 89 .uid = 0x4dd074,
55 90 .mask = 0xffffffef,
56 91 .features = PHY_GBIT_FEATURES,
57   - .config = ar8035_config,
  92 + .config = ar8031_config,
58 93 .startup = genphy_startup,
59 94 .shutdown = genphy_shutdown,
60 95 };