Commit c6d07bf440bcfd39c1c61c1cd7c8ef3b059c5669

Authored by Ramon Fried
Committed by Joe Hershberger
1 parent 9c29580720

net/macb: increase RX buffer size for GEM

Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

Showing 1 changed file with 23 additions and 8 deletions Side-by-side Diff

... ... @@ -45,10 +45,17 @@
45 45  
46 46 DECLARE_GLOBAL_DATA_PTR;
47 47  
48   -#define MACB_RX_BUFFER_SIZE 4096
49   -#define MACB_RX_RING_SIZE (MACB_RX_BUFFER_SIZE / 128)
  48 +/*
  49 + * These buffer sizes must be power of 2 and divisible
  50 + * by RX_BUFFER_MULTIPLE
  51 + */
  52 +#define MACB_RX_BUFFER_SIZE 128
  53 +#define GEM_RX_BUFFER_SIZE 2048
50 54 #define RX_BUFFER_MULTIPLE 64
  55 +
  56 +#define MACB_RX_RING_SIZE 32
51 57 #define MACB_TX_RING_SIZE 16
  58 +
52 59 #define MACB_TX_TIMEOUT 1000
53 60 #define MACB_AUTONEG_TIMEOUT 5000000
54 61  
... ... @@ -95,6 +102,7 @@
95 102 void *tx_buffer;
96 103 struct macb_dma_desc *rx_ring;
97 104 struct macb_dma_desc *tx_ring;
  105 + size_t rx_buffer_size;
98 106  
99 107 unsigned long rx_buffer_dma;
100 108 unsigned long rx_ring_dma;
101 109  
... ... @@ -395,15 +403,16 @@
395 403 }
396 404  
397 405 if (status & MACB_BIT(RX_EOF)) {
398   - buffer = macb->rx_buffer + 128 * macb->rx_tail;
  406 + buffer = macb->rx_buffer +
  407 + macb->rx_buffer_size * macb->rx_tail;
399 408 length = status & RXBUF_FRMLEN_MASK;
400 409  
401 410 macb_invalidate_rx_buffer(macb);
402 411 if (macb->wrapped) {
403 412 unsigned int headlen, taillen;
404 413  
405   - headlen = 128 * (MACB_RX_RING_SIZE
406   - - macb->rx_tail);
  414 + headlen = macb->rx_buffer_size *
  415 + (MACB_RX_RING_SIZE - macb->rx_tail);
407 416 taillen = length - headlen;
408 417 memcpy((void *)net_rx_packets[0],
409 418 buffer, headlen);
... ... @@ -703,7 +712,7 @@
703 712 u32 buffer_size;
704 713 u32 dmacfg;
705 714  
706   - buffer_size = 128 / RX_BUFFER_MULTIPLE;
  715 + buffer_size = macb->rx_buffer_size / RX_BUFFER_MULTIPLE;
707 716 dmacfg = gem_readl(macb, DMACFG) & ~GEM_BF(RXBS, -1L);
708 717 dmacfg |= GEM_BF(RXBS, buffer_size);
709 718  
... ... @@ -748,7 +757,7 @@
748 757 paddr |= MACB_BIT(RX_WRAP);
749 758 macb->rx_ring[i].addr = paddr;
750 759 macb->rx_ring[i].ctrl = 0;
751   - paddr += 128;
  760 + paddr += macb->rx_buffer_size;
752 761 }
753 762 macb_flush_ring_desc(macb, RX);
754 763 macb_flush_rx_buffer(macb);
755 764  
... ... @@ -959,8 +968,14 @@
959 968 int id = 0; /* This is not used by functions we call */
960 969 u32 ncfgr;
961 970  
  971 + if (macb_is_gem(macb))
  972 + macb->rx_buffer_size = GEM_RX_BUFFER_SIZE;
  973 + else
  974 + macb->rx_buffer_size = MACB_RX_BUFFER_SIZE;
  975 +
962 976 /* TODO: we need check the rx/tx_ring_dma is dcache line aligned */
963   - macb->rx_buffer = dma_alloc_coherent(MACB_RX_BUFFER_SIZE,
  977 + macb->rx_buffer = dma_alloc_coherent(macb->rx_buffer_size *
  978 + MACB_RX_RING_SIZE,
964 979 &macb->rx_buffer_dma);
965 980 macb->rx_ring = dma_alloc_coherent(MACB_RX_DMA_DESC_SIZE,
966 981 &macb->rx_ring_dma);