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Commit c6dd3fa74f1a8a39eb4c4ca97f2352be1b737a5a

Authored by Hou Zhiqiang
Committed by Prabhakar Kushwaha
1 parent 23975db5e9
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

powerpc: Enable device tree support for P5040DS 

Add device tree for P5040DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

Showing 7 changed files with 93 additions and 4 deletions Side-by-side Diff

arch/powerpc/dts/Makefile
Diff comments   View file @ c6dd3fa
... ... @@ -6,6 +6,7 @@
6 6 dtb-$(CONFIG_TARGET_P2041RDB) += p2041rdb.dtb
7 7 dtb-$(CONFIG_TARGET_P3041DS) += p3041ds.dtb
8 8 dtb-$(CONFIG_TARGET_P4080DS) += p4080ds.dtb
  9 +dtb-$(CONFIG_TARGET_P5040DS) += p5040ds.dtb
9 10 dtb-$(CONFIG_TARGET_T1024RDB) += t1024rdb.dtb
10 11 dtb-$(CONFIG_TARGET_T1042D4RDB) += t1042d4rdb.dtb
11 12 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
arch/powerpc/dts/p5040.dtsi
Diff comments   View file @ c6dd3fa
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * P5040 Silicon/SoC Device Tree Source (pre include)
  4 + *
  5 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  6 + * Copyright 2019 NXP
  7 + */
  8 +
  9 +/dts-v1/;
  10 +
  11 +/include/ "e5500_power_isa.dtsi"
  12 +
  13 +/ {
  14 + #address-cells = <2>;
  15 + #size-cells = <2>;
  16 + interrupt-parent = <&mpic>;
  17 +
  18 + cpus {
  19 + #address-cells = <1>;
  20 + #size-cells = <0>;
  21 +
  22 + cpu0: PowerPC,e5500@0 {
  23 + device_type = "cpu";
  24 + reg = <0>;
  25 + fsl,portid-mapping = <0x80000000>;
  26 + };
  27 + cpu1: PowerPC,e5500@1 {
  28 + device_type = "cpu";
  29 + reg = <1>;
  30 + fsl,portid-mapping = <0x40000000>;
  31 + };
  32 + cpu2: PowerPC,e5500@2 {
  33 + device_type = "cpu";
  34 + reg = <2>;
  35 + fsl,portid-mapping = <0x20000000>;
  36 + };
  37 + cpu3: PowerPC,e5500@3 {
  38 + device_type = "cpu";
  39 + reg = <3>;
  40 + fsl,portid-mapping = <0x10000000>;
  41 + };
  42 + };
  43 +
  44 + soc: soc@ffe000000 {
  45 + ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  46 + reg = <0xf 0xfe000000 0 0x00001000>;
  47 + #address-cells = <1>;
  48 + #size-cells = <1>;
  49 + device_type = "soc";
  50 + compatible = "simple-bus";
  51 +
  52 + mpic: pic@40000 {
  53 + interrupt-controller;
  54 + #address-cells = <0>;
  55 + #interrupt-cells = <4>;
  56 + reg = <0x40000 0x40000>;
  57 + compatible = "fsl,mpic", "chrp,open-pic";
  58 + device_type = "open-pic";
  59 + clock-frequency = <0x0>;
  60 + };
  61 + };
  62 +};
arch/powerpc/dts/p5040ds.dts
Diff comments   View file @ c6dd3fa
  1 +// SPDX-License-Identifier: GPL-2.0+ OR X11
  2 +/*
  3 + * P5040DS Device Tree Source
  4 + *
  5 + * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  6 + * Copyright 2019 NXP
  7 + */
  8 +
  9 +/include/ "p5040.dtsi"
  10 +
  11 +/ {
  12 + model = "fsl,P5040DS";
  13 + compatible = "fsl,P5040DS";
  14 + #address-cells = <2>;
  15 + #size-cells = <2>;
  16 + interrupt-parent = <&mpic>;
  17 +
  18 +};
configs/P5040DS_NAND_defconfig
Diff comments   View file @ c6dd3fa
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xFFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P5040DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -24,6 +25,8 @@
24 25 CONFIG_MP=y
25 26 CONFIG_CMD_EXT2=y
26 27 CONFIG_CMD_FAT=y
  28 +CONFIG_OF_CONTROL=y
  29 +CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
27 30 CONFIG_ENV_IS_IN_NAND=y
28 31 CONFIG_FSL_CAAM=y
29 32 CONFIG_FSL_ESDHC=y
... ... @@ -47,5 +50,4 @@
47 50 CONFIG_FSL_ESPI=y
48 51 CONFIG_USB=y
49 52 CONFIG_USB_STORAGE=y
50   -CONFIG_OF_LIBFDT=y
configs/P5040DS_SDCARD_defconfig
Diff comments   View file @ c6dd3fa
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xFFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P5040DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -24,6 +25,8 @@
24 25 CONFIG_MP=y
25 26 CONFIG_CMD_EXT2=y
26 27 CONFIG_CMD_FAT=y
  28 +CONFIG_OF_CONTROL=y
  29 +CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
27 30 CONFIG_ENV_IS_IN_MMC=y
28 31 CONFIG_FSL_CAAM=y
29 32 CONFIG_FSL_ESDHC=y
... ... @@ -46,5 +49,4 @@
46 49 CONFIG_FSL_ESPI=y
47 50 CONFIG_USB=y
48 51 CONFIG_USB_STORAGE=y
49   -CONFIG_OF_LIBFDT=y
configs/P5040DS_SPIFLASH_defconfig
Diff comments   View file @ c6dd3fa
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xFFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P5040DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -24,6 +25,8 @@
24 25 CONFIG_MP=y
25 26 CONFIG_CMD_EXT2=y
26 27 CONFIG_CMD_FAT=y
  28 +CONFIG_OF_CONTROL=y
  29 +CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
27 30 CONFIG_ENV_IS_IN_SPI_FLASH=y
28 31 CONFIG_FSL_CAAM=y
29 32 CONFIG_FSL_ESDHC=y
... ... @@ -46,5 +49,4 @@
46 49 CONFIG_FSL_ESPI=y
47 50 CONFIG_USB=y
48 51 CONFIG_USB_STORAGE=y
49   -CONFIG_OF_LIBFDT=y
configs/P5040DS_defconfig
Diff comments   View file @ c6dd3fa
... ... @@ -2,6 +2,7 @@
2 2 CONFIG_SYS_TEXT_BASE=0xEFF40000
3 3 CONFIG_MPC85xx=y
4 4 CONFIG_TARGET_P5040DS=y
  5 +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
5 6 CONFIG_FIT=y
6 7 CONFIG_FIT_VERBOSE=y
7 8 CONFIG_OF_BOARD_SETUP=y
... ... @@ -23,6 +24,8 @@
23 24 CONFIG_MP=y
24 25 CONFIG_CMD_EXT2=y
25 26 CONFIG_CMD_FAT=y
  27 +CONFIG_OF_CONTROL=y
  28 +CONFIG_DEFAULT_DEVICE_TREE="p5040ds"
26 29 CONFIG_ENV_IS_IN_FLASH=y
27 30 CONFIG_FSL_CAAM=y
28 31 CONFIG_FSL_ESDHC=y
... ... @@ -45,5 +48,4 @@
45 48 CONFIG_FSL_ESPI=y
46 49 CONFIG_USB=y
47 50 CONFIG_USB_STORAGE=y
48   -CONFIG_OF_LIBFDT=y