Commit c83a35f65250a8bdb519cb26680437e5c93d133d
Committed by
Michal Simek
Michal Simek
1 parent
e141652b9c
Exists in
master
and in
49 other branches
fpga: zynq: Correct fpga load when buf is not aligned
When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is not aligned, new_buf address became greater then buf_start address and the load_word loop corrupts bit file data. A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data before buf but permits to load correctly. Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Showing 1 changed file with 10 additions and 0 deletions Side-by-side Diff
drivers/fpga/zynqpl.c
| ... | ... | @@ -187,6 +187,16 @@ |
| 187 | 187 | if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) { |
| 188 | 188 | u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN); |
| 189 | 189 | |
| 190 | + /* | |
| 191 | + * This might be dangerous but permits to flash if | |
| 192 | + * ARCH_DMA_MINALIGN is greater than header size | |
| 193 | + */ | |
| 194 | + if (new_buf > buf_start) { | |
| 195 | + debug("%s: Aligned buffer is after buffer start\n", | |
| 196 | + __func__); | |
| 197 | + new_buf -= ARCH_DMA_MINALIGN; | |
| 198 | + } | |
| 199 | + | |
| 190 | 200 | printf("%s: Align buffer at %x to %x(swap %d)\n", __func__, |
| 191 | 201 | (u32)buf_start, (u32)new_buf, swap); |
| 192 | 202 |