i2c: rcar_i2c: Fix order of restart and clear status

In case of repeated START condition, the restart has to be kicked before clear status (MSR register). If it is kicked after clear status, R-Car I2C may transfer data (TXD register) or receive data (RXD register) instead of transferring slave address (MAR register). Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

i2c: rcar_i2c: Fix order of restart and clear status
In case of repeated START condition, the restart has to be kicked before clear status (MSR register). If it is kicked after clear status, R-Car I2C may transfer data (TXD register) or receive data (RXD register) instead of transferring slave address (MAR register). Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu · Heiko Schocher
1 parent 6dd38cc352
Showing 1 changed file with 2 additions and 2 deletions Side-by-side Diff
drivers/i2c/rcar_i2c.c
@@ -119,10 +119,10 @@
  
 	/* set slave address, receive */
 	writel((chip << 1) | 1, &dev->icmar);
-	/* clear status */
-	writel(0, &dev->icmsr);
 	/* start master receive */
 	writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
+	/* clear status */
+	writel(0, &dev->icmsr);
  
 	while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR))
 		!= (MSR_MAT | MSR_MDR))
...	...	@@ -119,10 +119,10 @@
119	119
120	120	/* set slave address, receive */
121	121	writel((chip << 1) \| 1, &dev->icmar);
122		- /* clear status */
123		- writel(0, &dev->icmsr);
124	122	/* start master receive */
125	123	writel(MCR_MDBS \| MCR_MIE \| MCR_ESG, &dev->icmcr);
	124	+ /* clear status */
	125	+ writel(0, &dev->icmsr);
126	126
127	127	while ((readl(&dev->icmsr) & (MSR_MAT \| MSR_MDR))
128	128	!= (MSR_MAT \| MSR_MDR))