Commit e548321af00e869af7194896576beb9b68457ff7
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Blackfin: cm-bf561: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Showing 9 changed files with 374 additions and 2 deletions Side-by-side Diff
MAINTAINERS
MAKEALL
Makefile
... | ... | @@ -3391,7 +3391,7 @@ |
3391 | 3391 | bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit |
3392 | 3392 | |
3393 | 3393 | # Bluetechnix tinyboards |
3394 | -BFIN_BOARDS += cm-bf533 cm-bf537e | |
3394 | +BFIN_BOARDS += cm-bf533 cm-bf537e cm-bf561 | |
3395 | 3395 | |
3396 | 3396 | $(BFIN_BOARDS:%=%_config) : unconfig |
3397 | 3397 | @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=) |
... | ... | @@ -3567,7 +3567,7 @@ |
3567 | 3567 | $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ |
3568 | 3568 | $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \ |
3569 | 3569 | $(obj)board/bf5{33,37}-stamp/u-boot.lds \ |
3570 | - $(obj)board/cm-bf5{33,37e}/u-boot.lds \ | |
3570 | + $(obj)board/cm-bf5{33,37e,61}/u-boot.lds \ | |
3571 | 3571 | $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] |
3572 | 3572 | @rm -f $(obj)include/bmp_logo.h |
3573 | 3573 | @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map} |
board/cm-bf561/.gitignore
1 | +/u-boot.lds |
board/cm-bf561/Makefile
1 | +# | |
2 | +# U-boot - Makefile | |
3 | +# | |
4 | +# Copyright (c) 2005-2008 Analog Device Inc. | |
5 | +# | |
6 | +# (C) Copyright 2000-2006 | |
7 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
8 | +# | |
9 | +# See file CREDITS for list of people who contributed to this | |
10 | +# project. | |
11 | +# | |
12 | +# This program is free software; you can redistribute it and/or | |
13 | +# modify it under the terms of the GNU General Public License as | |
14 | +# published by the Free Software Foundation; either version 2 of | |
15 | +# the License, or (at your option) any later version. | |
16 | +# | |
17 | +# This program is distributed in the hope that it will be useful, | |
18 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | +# GNU General Public License for more details. | |
21 | +# | |
22 | +# You should have received a copy of the GNU General Public License | |
23 | +# along with this program; if not, write to the Free Software | |
24 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
25 | +# MA 02111-1307 USA | |
26 | +# | |
27 | + | |
28 | +include $(TOPDIR)/config.mk | |
29 | + | |
30 | +LIB = $(obj)lib$(BOARD).a | |
31 | + | |
32 | +COBJS-y := $(BOARD).o | |
33 | + | |
34 | +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) | |
35 | +OBJS := $(addprefix $(obj),$(COBJS-y)) | |
36 | +SOBJS := $(addprefix $(obj),$(SOBJS-y)) | |
37 | + | |
38 | +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds | |
39 | + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) | |
40 | + | |
41 | +$(obj)u-boot.lds: u-boot.lds.S | |
42 | + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ | |
43 | + | |
44 | +clean: | |
45 | + rm -f $(SOBJS) $(OBJS) | |
46 | + | |
47 | +distclean: clean | |
48 | + rm -f $(LIB) core *.bak $(obj).depend | |
49 | + | |
50 | +######################################################################### | |
51 | + | |
52 | +# defines $(obj).depend target | |
53 | +include $(SRCTREE)/rules.mk | |
54 | + | |
55 | +sinclude $(obj).depend | |
56 | + | |
57 | +######################################################################### |
board/cm-bf561/cm-bf561.c
1 | +/* | |
2 | + * U-boot - main board file | |
3 | + * | |
4 | + * Copyright (c) 2005-2008 Analog Devices Inc. | |
5 | + * | |
6 | + * Licensed under the GPL-2 or later. | |
7 | + */ | |
8 | + | |
9 | +#include <common.h> | |
10 | + | |
11 | +DECLARE_GLOBAL_DATA_PTR; | |
12 | + | |
13 | +int checkboard(void) | |
14 | +{ | |
15 | + printf("Board: Bluetechnix CM-BF561 core module\n"); | |
16 | + printf(" Support: http://www.bluetechnix.at/\n"); | |
17 | + return 0; | |
18 | +} | |
19 | + | |
20 | +phys_size_t initdram(int board_type) | |
21 | +{ | |
22 | + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; | |
23 | + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; | |
24 | + return gd->bd->bi_memsize; | |
25 | +} |
board/cm-bf561/config.mk
1 | +# | |
2 | +# Copyright (c) 2005-2008 Analog Device Inc. | |
3 | +# | |
4 | +# (C) Copyright 2001 | |
5 | +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
6 | +# | |
7 | +# See file CREDITS for list of people who contributed to this | |
8 | +# project. | |
9 | +# | |
10 | +# This program is free software; you can redistribute it and/or | |
11 | +# modify it under the terms of the GNU General Public License as | |
12 | +# published by the Free Software Foundation; either version 2 of | |
13 | +# the License, or (at your option) any later version. | |
14 | +# | |
15 | +# This program is distributed in the hope that it will be useful, | |
16 | +# but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | +# GNU General Public License for more details. | |
19 | +# | |
20 | +# You should have received a copy of the GNU General Public License | |
21 | +# along with this program; if not, write to the Free Software | |
22 | +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | +# MA 02111-1307 USA | |
24 | +# | |
25 | + | |
26 | +# This is not actually used for Blackfin boards so do not change it | |
27 | +#TEXT_BASE = do-not-use-me | |
28 | + | |
29 | +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds | |
30 | + | |
31 | +# Set some default LDR flags based on boot mode. | |
32 | +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 | |
33 | +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) |
board/cm-bf561/u-boot.lds.S
1 | +/* | |
2 | + * U-boot - u-boot.lds.S | |
3 | + * | |
4 | + * Copyright (c) 2005-2008 Analog Device Inc. | |
5 | + * | |
6 | + * (C) Copyright 2000-2004 | |
7 | + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
8 | + * | |
9 | + * See file CREDITS for list of people who contributed to this | |
10 | + * project. | |
11 | + * | |
12 | + * This program is free software; you can redistribute it and/or | |
13 | + * modify it under the terms of the GNU General Public License as | |
14 | + * published by the Free Software Foundation; either version 2 of | |
15 | + * the License, or (at your option) any later version. | |
16 | + * | |
17 | + * This program is distributed in the hope that it will be useful, | |
18 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | + * GNU General Public License for more details. | |
21 | + * | |
22 | + * You should have received a copy of the GNU General Public License | |
23 | + * along with this program; if not, write to the Free Software | |
24 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
25 | + * MA 02111-1307 USA | |
26 | + */ | |
27 | + | |
28 | +#include <config.h> | |
29 | +#include <asm/blackfin.h> | |
30 | +#undef ALIGN | |
31 | +#undef ENTRY | |
32 | +#undef bfin | |
33 | + | |
34 | +/* If we don't actually load anything into L1 data, this will avoid | |
35 | + * a syntax error. If we do actually load something into L1 data, | |
36 | + * we'll get a linker memory load error (which is what we'd want). | |
37 | + * This is here in the first place so we can quickly test building | |
38 | + * for different CPU's which may lack non-cache L1 data. | |
39 | + */ | |
40 | +#ifndef L1_DATA_B_SRAM | |
41 | +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE | |
42 | +# define L1_DATA_B_SRAM_SIZE 0 | |
43 | +#endif | |
44 | + | |
45 | +/* The 0xC offset is so we don't clobber the tiny LDR jump block. */ | |
46 | +#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 | |
47 | +# define L1_CODE_ORIGIN L1_INST_SRAM | |
48 | +#else | |
49 | +# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC | |
50 | +#endif | |
51 | + | |
52 | +OUTPUT_ARCH(bfin) | |
53 | + | |
54 | +MEMORY | |
55 | +{ | |
56 | + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN | |
57 | + l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE | |
58 | + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE | |
59 | +} | |
60 | + | |
61 | +ENTRY(_start) | |
62 | +SECTIONS | |
63 | +{ | |
64 | + .text : | |
65 | + { | |
66 | + cpu/blackfin/start.o (.text .text.*) | |
67 | + | |
68 | +#ifdef ENV_IS_EMBEDDED | |
69 | + /* WARNING - the following is hand-optimized to fit within | |
70 | + * the sector before the environment sector. If it throws | |
71 | + * an error during compilation remove an object here to get | |
72 | + * it linked after the configuration sector. | |
73 | + */ | |
74 | + | |
75 | + cpu/blackfin/traps.o (.text .text.*) | |
76 | + cpu/blackfin/interrupt.o (.text .text.*) | |
77 | + cpu/blackfin/serial.o (.text .text.*) | |
78 | + common/dlmalloc.o (.text .text.*) | |
79 | + lib_generic/crc32.o (.text .text.*) | |
80 | + | |
81 | + . = DEFINED(env_offset) ? env_offset : .; | |
82 | + common/env_embedded.o (.text .text.*) | |
83 | +#endif | |
84 | + | |
85 | + __initcode_start = .; | |
86 | + cpu/blackfin/initcode.o (.text .text.*) | |
87 | + __initcode_end = .; | |
88 | + | |
89 | + *(.text .text.*) | |
90 | + } >ram | |
91 | + | |
92 | + .rodata : | |
93 | + { | |
94 | + . = ALIGN(4); | |
95 | + *(.rodata .rodata.*) | |
96 | + *(.rodata1) | |
97 | + *(.eh_frame) | |
98 | + . = ALIGN(4); | |
99 | + } >ram | |
100 | + | |
101 | + .data : | |
102 | + { | |
103 | + . = ALIGN(256); | |
104 | + *(.data .data.*) | |
105 | + *(.data1) | |
106 | + *(.sdata) | |
107 | + *(.sdata2) | |
108 | + *(.dynamic) | |
109 | + CONSTRUCTORS | |
110 | + } >ram | |
111 | + | |
112 | + .u_boot_cmd : | |
113 | + { | |
114 | + ___u_boot_cmd_start = .; | |
115 | + *(.u_boot_cmd) | |
116 | + ___u_boot_cmd_end = .; | |
117 | + } >ram | |
118 | + | |
119 | + .text_l1 : | |
120 | + { | |
121 | + . = ALIGN(4); | |
122 | + __stext_l1 = .; | |
123 | + *(.l1.text) | |
124 | + . = ALIGN(4); | |
125 | + __etext_l1 = .; | |
126 | + } >l1_code AT>ram | |
127 | + __stext_l1_lma = LOADADDR(.text_l1); | |
128 | + | |
129 | + .data_l1 : | |
130 | + { | |
131 | + . = ALIGN(4); | |
132 | + __sdata_l1 = .; | |
133 | + *(.l1.data) | |
134 | + *(.l1.bss) | |
135 | + . = ALIGN(4); | |
136 | + __edata_l1 = .; | |
137 | + } >l1_data AT>ram | |
138 | + __sdata_l1_lma = LOADADDR(.data_l1); | |
139 | + | |
140 | + .bss : | |
141 | + { | |
142 | + . = ALIGN(4); | |
143 | + __bss_start = .; | |
144 | + *(.sbss) *(.scommon) | |
145 | + *(.dynbss) | |
146 | + *(.bss .bss.*) | |
147 | + *(COMMON) | |
148 | + __bss_end = .; | |
149 | + } >ram | |
150 | +} |
include/configs/cm-bf561.h
1 | +/* | |
2 | + * U-boot - Configuration file for CM-BF561 board | |
3 | + */ | |
4 | + | |
5 | +#ifndef __CONFIG_CM_BF561_H__ | |
6 | +#define __CONFIG_CM_BF561_H__ | |
7 | + | |
8 | +#include <asm/blackfin-config-pre.h> | |
9 | + | |
10 | + | |
11 | +/* | |
12 | + * Processor Settings | |
13 | + */ | |
14 | +#define CONFIG_BFIN_CPU bf561-0.3 | |
15 | +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA | |
16 | + | |
17 | + | |
18 | +/* | |
19 | + * Clock Settings | |
20 | + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
21 | + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
22 | + */ | |
23 | +/* CONFIG_CLKIN_HZ is any value in Hz */ | |
24 | +#define CONFIG_CLKIN_HZ 25000000 | |
25 | +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
26 | +/* 1 = CLKIN / 2 */ | |
27 | +#define CONFIG_CLKIN_HALF 0 | |
28 | +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
29 | +/* 1 = bypass PLL */ | |
30 | +#define CONFIG_PLL_BYPASS 0 | |
31 | +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
32 | +/* Values can range from 0-63 (where 0 means 64) */ | |
33 | +#define CONFIG_VCO_MULT 22 | |
34 | +/* CCLK_DIV controls the core clock divider */ | |
35 | +/* Values can be 1, 2, 4, or 8 ONLY */ | |
36 | +#define CONFIG_CCLK_DIV 1 | |
37 | +/* SCLK_DIV controls the system clock divider */ | |
38 | +/* Values can range from 1-15 */ | |
39 | +#define CONFIG_SCLK_DIV 5 | |
40 | + | |
41 | + | |
42 | +/* | |
43 | + * Memory Settings | |
44 | + */ | |
45 | +#define CONFIG_MEM_ADD_WDTH 9 | |
46 | +#define CONFIG_MEM_SIZE 64 | |
47 | + | |
48 | +#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 4096) - (7 + 2)) | |
49 | +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) | |
50 | + | |
51 | +#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | B3_PEN | B2_PEN | B1_PEN | B0_PEN | AMBEN_ALL | AMCKEN) | |
52 | +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) | |
53 | +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) | |
54 | + | |
55 | +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
56 | +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) | |
57 | + | |
58 | + | |
59 | +/* | |
60 | + * Network Settings | |
61 | + */ | |
62 | +#define ADI_CMDS_NETWORK 1 | |
63 | +#define CONFIG_DRIVER_SMC91111 1 | |
64 | +#define CONFIG_SMC91111_BASE 0x28000300 | |
65 | +#define CONFIG_HOSTNAME cm-bf561 | |
66 | +/* Uncomment next line to use fixed MAC address */ | |
67 | +/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */ | |
68 | + | |
69 | + | |
70 | +/* | |
71 | + * Flash Settings | |
72 | + */ | |
73 | +#define CONFIG_FLASH_CFI_DRIVER | |
74 | +#define CONFIG_SYS_FLASH_BASE 0x20000000 | |
75 | +#define CONFIG_SYS_FLASH_CFI | |
76 | +#define CONFIG_SYS_FLASH_PROTECTION | |
77 | +#define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
78 | +#define CONFIG_SYS_MAX_FLASH_SECT 67 | |
79 | + | |
80 | + | |
81 | +/* | |
82 | + * Env Storage Settings | |
83 | + */ | |
84 | +#define CONFIG_ENV_IS_IN_FLASH 1 | |
85 | +#define CONFIG_ENV_OFFSET 0x20000 | |
86 | +#define CONFIG_ENV_SECT_SIZE 0x20000 | |
87 | +#define CONFIG_ENV_SIZE 0x10000 | |
88 | + | |
89 | + | |
90 | +/* | |
91 | + * Misc Settings | |
92 | + */ | |
93 | +#define CONFIG_BAUDRATE 115200 | |
94 | +#define CONFIG_UART_CONSOLE 0 | |
95 | + | |
96 | + | |
97 | +/* | |
98 | + * Pull in common ADI header for remaining command/environment setup | |
99 | + */ | |
100 | +#include <configs/bfin_adi_common.h> | |
101 | + | |
102 | +#include <asm/blackfin-config-post.h> | |
103 | + | |
104 | +#endif |