Commit f0fabb7945cb25ce646abc73b5e71e7834ca5130
Committed by
Stefano Babic
Stefano Babic
1 parent
5051ff5fb0
Exists in
v2017.01-smarct4x
and in
37 other branches
imx: mx6sabresd: Use the pfuze common init function
Modify the pfuze init for mx6sabresd to use the shared "pfuze_common_init" function. And move this initialization to power_init_board. Signed-off-by: Ye.Li <B37916@freescale.com>
Showing 1 changed file with 9 additions and 43 deletions Side-by-side Diff
board/freescale/mx6sabresd/mx6sabresd.c
| ... | ... | @@ -27,6 +27,7 @@ |
| 27 | 27 | #include <i2c.h> |
| 28 | 28 | #include <power/pmic.h> |
| 29 | 29 | #include <power/pfuze100_pmic.h> |
| 30 | +#include "../common/pfuze.h" | |
| 30 | 31 | #include <asm/arch/mx6-ddr.h> |
| 31 | 32 | |
| 32 | 33 | DECLARE_GLOBAL_DATA_PTR; |
| 33 | 34 | |
| 34 | 35 | |
| 35 | 36 | |
| 36 | 37 | |
| 37 | 38 | |
| 38 | 39 | |
| ... | ... | @@ -559,60 +560,27 @@ |
| 559 | 560 | return 0; |
| 560 | 561 | } |
| 561 | 562 | |
| 562 | -static int pfuze_init(void) | |
| 563 | +int power_init_board(void) | |
| 563 | 564 | { |
| 564 | 565 | struct pmic *p; |
| 565 | - int ret; | |
| 566 | 566 | unsigned int reg; |
| 567 | 567 | |
| 568 | - ret = power_pfuze100_init(I2C_PMIC); | |
| 569 | - if (ret) | |
| 570 | - return ret; | |
| 568 | + p = pfuze_common_init(I2C_PMIC); | |
| 569 | + if (!p) | |
| 570 | + return -ENODEV; | |
| 571 | 571 | |
| 572 | - p = pmic_get("PFUZE100"); | |
| 573 | - ret = pmic_probe(p); | |
| 574 | - if (ret) | |
| 575 | - return ret; | |
| 576 | - | |
| 577 | - pmic_reg_read(p, PFUZE100_DEVICEID, ®); | |
| 578 | - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); | |
| 579 | - | |
| 580 | 572 | /* Increase VGEN3 from 2.5 to 2.8V */ |
| 581 | 573 | pmic_reg_read(p, PFUZE100_VGEN3VOL, ®); |
| 582 | - reg &= ~0xf; | |
| 583 | - reg |= 0xa; | |
| 574 | + reg &= ~LDO_VOL_MASK; | |
| 575 | + reg |= LDOB_2_80V; | |
| 584 | 576 | pmic_reg_write(p, PFUZE100_VGEN3VOL, reg); |
| 585 | 577 | |
| 586 | 578 | /* Increase VGEN5 from 2.8 to 3V */ |
| 587 | 579 | pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); |
| 588 | - reg &= ~0xf; | |
| 589 | - reg |= 0xc; | |
| 580 | + reg &= ~LDO_VOL_MASK; | |
| 581 | + reg |= LDOB_3_00V; | |
| 590 | 582 | pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); |
| 591 | 583 | |
| 592 | - /* Set SW1AB stanby volage to 0.975V */ | |
| 593 | - pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®); | |
| 594 | - reg &= ~0x3f; | |
| 595 | - reg |= 0x1b; | |
| 596 | - pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg); | |
| 597 | - | |
| 598 | - /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ | |
| 599 | - pmic_reg_read(p, PUZE_100_SW1ABCONF, ®); | |
| 600 | - reg &= ~0xc0; | |
| 601 | - reg |= 0x40; | |
| 602 | - pmic_reg_write(p, PUZE_100_SW1ABCONF, reg); | |
| 603 | - | |
| 604 | - /* Set SW1C standby voltage to 0.975V */ | |
| 605 | - pmic_reg_read(p, PFUZE100_SW1CSTBY, ®); | |
| 606 | - reg &= ~0x3f; | |
| 607 | - reg |= 0x1b; | |
| 608 | - pmic_reg_write(p, PFUZE100_SW1CSTBY, reg); | |
| 609 | - | |
| 610 | - /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ | |
| 611 | - pmic_reg_read(p, PFUZE100_SW1CCONF, ®); | |
| 612 | - reg &= ~0xc0; | |
| 613 | - reg |= 0x40; | |
| 614 | - pmic_reg_write(p, PFUZE100_SW1CCONF, reg); | |
| 615 | - | |
| 616 | 584 | return 0; |
| 617 | 585 | } |
| 618 | 586 | |
| ... | ... | @@ -639,8 +607,6 @@ |
| 639 | 607 | #ifdef CONFIG_CMD_BMODE |
| 640 | 608 | add_board_boot_modes(board_boot_modes); |
| 641 | 609 | #endif |
| 642 | - pfuze_init(); | |
| 643 | - | |
| 644 | 610 | return 0; |
| 645 | 611 | } |
| 646 | 612 |