ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration

Update to existing recommendation for L2ACTLR configuration to prevent system instability and optimize performance. These apply to both OMAP5 and DRA7. Reported-by: Vivek Chengalvala <vchengalvala@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>

ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration
Update to existing recommendation for L2ACTLR configuration to prevent system instability and optimize performance. These apply to both OMAP5 and DRA7. Reported-by: Vivek Chengalvala <vchengalvala@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon · Tom Rini
1 parent 5f603761c3
Showing 1 changed file with 16 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/omap5/hwinit.c
@@ -304,6 +304,21 @@
 		       (*ctrl)->control_emif2_sdram_config_ext);
 }
  
+void init_cpu_configuration(void)
+{
+	u32 l2actlr;
+
+	asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r"(l2actlr));
+	/*
+	 * L2ACTLR: Ensure to enable the following:
+	 * 3: Disable clean/evict push to external
+	 * 4: Disable WriteUnique and WriteLineUnique transactions from master
+	 * 8: Disable DVM/CMO message broadcast
+	 */
+	l2actlr |= 0x118;
+	omap_smc1(OMAP5_SERVICE_L2ACTLR_SET, l2actlr);
+}
+
 void init_omap_revision(void)
 {
 	/*
@@ -342,6 +357,7 @@
 	default:
 		*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
 	}
+	init_cpu_configuration();
 }
  
 void reset_cpu(ulong ignored)
...	...	@@ -304,6 +304,21 @@
304	304	(*ctrl)->control_emif2_sdram_config_ext);
305	305	}
306	306
	307	+void init_cpu_configuration(void)
	308	+{
	309	+ u32 l2actlr;
	310	+
	311	+ asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r"(l2actlr));
	312	+ /*
	313	+ * L2ACTLR: Ensure to enable the following:
	314	+ * 3: Disable clean/evict push to external
	315	+ * 4: Disable WriteUnique and WriteLineUnique transactions from master
	316	+ * 8: Disable DVM/CMO message broadcast
	317	+ */
	318	+ l2actlr \|= 0x118;
	319	+ omap_smc1(OMAP5_SERVICE_L2ACTLR_SET, l2actlr);
	320	+}
	321	+
307	322	void init_omap_revision(void)
308	323	{
309	324	/*
...	...	@@ -342,6 +357,7 @@
342	357	default:
343	358	*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
344	359	}
	360	+ init_cpu_configuration();
345	361	}
346	362
347	363	void reset_cpu(ulong ignored)