Eric Lee / smarc-uboot

07 May, 2018

1 commit

  • 83d290c56   SPDX: Convert all of our single license tags to Linux Kernel style ... Browse Code »
    56

    When U-Boot started using SPDX tags we were among the early adopters and
    there weren't a lot of other examples to borrow from. So we picked the
    area of the file that usually had a full license text and replaced it
    with an appropriate SPDX-License-Identifier: entry. Since then, the
    Linux Kernel has adopted SPDX tags and they place it as the very first
    line in a file (except where shebangs are used, then it's second line)
    and with slightly different comment styles than us.

    In part due to community overlap, in part due to better tag visibility
    and in part for other minor reasons, switch over to that style.

    This commit changes all instances where we have a single declared
    license in the tag as both the before and after are identical in tag
    contents. There's also a few places where I found we did not have a tag
    and have introduced one.

    Signed-off-by: Tom Rini

    Tom Rini
     

24 Jul, 2013

1 commit

06 May, 2013

1 commit

05 Mar, 2012

1 commit

05 Sep, 2011

1 commit

  • fb2d6efbf   FPGA: constify Lattice FPGA code ... Browse Code »

    The Lattice code was missed by commit e6a857d "fpga: constify to fix
    build warning" resulting in such warnings:

    fpga.c: In function 'fpga_load':
    fpga.c:238: warning: passing argument 2 of 'lattice_load' discards qualifiers from pointer target type
    fpga.c: In function 'fpga_dump':
    fpga.c:278: warning: passing argument 2 of 'lattice_dump' discards qualifiers from pointer target type

    Signed-off-by: Wolfgang Denk
    cc: Stefano Babic

    Wolfgang Denk
     

28 Oct, 2010

1 commit

20 Oct, 2010

1 commit

14 Oct, 2010

1 commit

  • 3b8ac464f   FPGA: add support for downloading Lattice bitstream ... Browse Code »

    The patch adds support to load a Lattice's bitstream
    image (called VME file) into a Lattice FPGA. The code
    containing the state machine delivered as part of
    Lattice's ispVMtools is integrated.

    The FPGA is programmed using the JTAG interface. The
    board maintainer must provide accessors to drive the
    JTAG signals TCK, TMS, TDI and to get the value of the
    input signal TDO.

    Signed-off-by: Stefano Babic

    Stefano Babic