01 Dec, 2017

1 commit

  • The reset circuitry in the RK3399 only resets 'almost all logic' when
    a software reset is performed. To make our software maintenance
    easier in the future, we want to have the option (controlled by a DTS
    property) to force all reset causes other than a power-on reset to
    trigger a power-on reset via a GPIO trigger.

    This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7)
    board-support and the documentation for the new property
    (sysreset-gpio) within the /config-node.

    Signed-off-by: Philipp Tomsich
    Tested-by: Klaus Goger
    Reviewed-by: Simon Glass

    Philipp Tomsich
     

30 Nov, 2017

2 commits


28 Nov, 2017

1 commit


26 Nov, 2017

2 commits


22 Nov, 2017

1 commit

  • For the RK3188, the BROM will attempt to load up the first stage
    image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
    in the SRAM and then the remainder to offset 0xc00 in the SRAM.
    It always enters at 0x804, though.

    With this changeset, the RK3188 boot removes the TPL (stub) stage and
    builds a single SPL binary that utilizes the early back-to-bootrom via
    the boot0-hook.

    Consequently, the passing of the saved boot params via pmu->os_reg[2]
    is also removed.

    Signed-off-by: Philipp Tomsich

    Philipp Tomsich
     

21 Nov, 2017

2 commits

  • The dra7xx series of SOCs contain a temperature sensor and an
    associated analog-to-digital converter (ADC) which produces
    an output which is proportional to the SOC temperature.
    Add support for this temperature sensor.

    Signed-off-by: Faiz Abbas
    Reviewed-by: Simon Glass

    Faiz Abbas
     
  • Coccinelle is a program for static code analysis.
    For details on Coccinelle see

    http://coccinelle.lip6.fr/

    Add scripts/coccicheck copied from Linux kernel v4.14.

    The coccicheck script executes the tests *.cocci in
    directory scripts/coccinelle by calling spatch.

    In Makefile add a coccicheck target. You can use it with

    make coccicheck MODE=

    where mode in patch, report, context, org.

    Add a copy of Linux v4.14 file Documentation/dev-tools/coccinelle.rst
    as doc/README.coccinelle.

    Cc: Simon Glass
    Signed-off-by: Heinrich Schuchardt

    Heinrich Schuchardt
     

17 Nov, 2017

1 commit


10 Nov, 2017

2 commits


07 Nov, 2017

1 commit


06 Nov, 2017

1 commit


24 Oct, 2017

1 commit


23 Oct, 2017

1 commit


19 Oct, 2017

2 commits

  • Up to now we depended on an exported variable to build u-boot.rom.
    We should be able to specify it in the configuration file, too.

    With this patch this becomes possible using the new Kconfig option
    CONFIG_BUILD_ROM.

    This option depends on CONFIG_X86 and is selected in
    qemu-x86_defconfig and qemu-x86_64_defconfig.

    Cc: Simon Glass
    Cc: Bin Meng
    Signed-off-by: Heinrich Schuchardt
    Reviewed-by: Bin Meng

    Heinrich Schuchardt
     
  • Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
    can be built again.

    Signed-off-by: Bin Meng
    Reviewed-by: Stefan Roese

    Bin Meng
     

16 Oct, 2017

1 commit


12 Oct, 2017

2 commits


11 Oct, 2017

1 commit


06 Oct, 2017

3 commits

  • The regulator bindings state that regulator prefixes are allowd to be
    in upper or lower case. However pmic_bind_children from pmic_uclass uses
    strncmp to compare DT node name against prefix. This comparison is case
    sensitive hence the regulator driver prefix case matters.

    Signed-off-by: Felix Brack

    Felix Brack
     
  • u-boot can be embedded within a FIT image with multiple DTBs. It then
    selects at run-time which one is best suited for the platform.
    Use the same principle here for the SPL: put the DTBs in a FIT image,
    compress it (LZO, GZIP, or no compression) and append it at the end of the
    SPL.

    Signed-off-by: Jean-Jacques Hiblot
    [trini: Move default y of SPL_MULTI_DTB_FIT_DYN_ALLOC to it being the
    default choice if SYS_MALLOC_F, drop spl.h include from lib/fdtdec.c
    it's unused.]
    Signed-off-by Tom Rini

    Jean-Jacques Hiblot
     
  • CONFIG_FIT_EMBED might be confused with CONFIG_OF_EMBED, rename it
    MULTI_DTB_FIT as it is able to get a DTB from a FIT image containing
    multiple DTBs. Also move the option to the Kconfig dedicated to the DTS
    options and create a README for this feature.

    Signed-off-by: Jean-Jacques Hiblot
    Reviewed-by: Tom Rini
    Reviewed-by: Simon Glass

    Jean-Jacques Hiblot
     

04 Oct, 2017

2 commits


01 Oct, 2017

2 commits

  • It is often desirable to configure the spl-boot-order (i.e. the order
    that SPL probes devices to find the FIT image containing a full U-Boot)
    such that it contains 'the same device the SPL stage was booted from'
    early on. To support this, we introduce the 'same-as-spl' specifier
    for the spl-boot-order property.

    This commit adds:
    - documentation for the new board_spl_was_booted_from() function that
    individual SoCs/boards should provide, if they can determine where
    the SPL was booted from
    - implements the new board_spl_was_booted_from() stub function
    - adds support for handling the 'same-as-spl' specifier and calling
    into the per-SoC/per-board support code.

    This also updates the documentation for the 'u-boot,spl-boot-order'
    property.

    Signed-off-by: Philipp Tomsich
    Reviewed-by: Simon Glass

    Philipp Tomsich
     
  • Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
    it is not possible add new SPL features like Falcon mode or etc.

    So add TPL stage so-that adding new features to SPL is possible.
    - TPL: DRAM init, clocks
    - SPL: MMC, falcon, etc

    Signed-off-by: Jagan Teki
    Reviewed-by: Philipp Tomsich
    Acked-by: Philipp Tomsich

    Jagan Teki
     

22 Sep, 2017

4 commits

  • This driver is adapted from linux drivers/reset/reset-stm32.c
    It's compatible with STM32 F4/F7/H7 SoCs.

    This driver doesn't implement .of_match as it's binded
    by MFD RCC driver.

    To add support for each SoC family, a SoC's specific
    include/dt-binfings/mfd/stm32xx-rcc.h file must be added.

    This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
    Other SoCs support will be added in the future.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     
  • This driver implements basic clock setup, only clock gating
    is implemented.

    This driver doesn't implement .of_match as it's binded
    by MFD RCC driver.

    Files include/dt-bindings/clock/stm32h7-clks.h and
    doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
    will be available soon in a kernel tag, as all the
    bindings have been acked by Rob Herring [1].

    [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     
  • This patch adds the ST glue logic to manage the DWC3 HC
    on STiH407 SoC family. It configures the internal glue
    logic and syscfg registers.

    Part of this code been extracted from kernel.org driver
    (drivers/usb/dwc3/dwc3-st.c)

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     
  • This is the generic phy driver for the picoPHY ports
    used by USB2/1.1 controllers. It is found on STiH407 SoC
    family from STMicroelectronics.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     

18 Sep, 2017

2 commits


17 Sep, 2017

1 commit


16 Sep, 2017

1 commit

  • This adds support to Intel Cherry Hill board, a board based on
    Intel Braswell SoC. The following devices are validated:

    - serial port as the serial console
    - on-board Realtek 8169 ethernet controller
    - SATA AHCI controller
    - EMMC/SDHC controller
    - USB 3.0 xHCI controller
    - PCIe x1 slot with a graphics card
    - ICH SPI controller with an 8MB Macronix SPI flash
    - Integrated graphics device as the video console

    Signed-off-by: Bin Meng
    Reviewed-by: Simon Glass

    Bin Meng
     

15 Sep, 2017

3 commits