12 Feb, 2012

1 commit

  • This patch moves hawkboard to the new spl infrastructure from the
    older nand_spl one.

    Removed the hawkboard_nand_config build option -- The spl code now
    gets compiled with hawkboard_config, after building the main u-boot
    image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
    to reflect the same.

    Signed-off-by: Sughosh Ganu
    Signed-off-by: Heiko Schocher
    Cc: Heiko Schocher
    Cc: Christian Riesch
    Cc: Sudhakar Rajashekhara
    Cc: Tom Rini
    Acked-by: Christian Riesch

    Sughosh Ganu
     

27 Jan, 2012

1 commit

  • Adapt the following patch from spl to nand_spl:

    Author: Stefano Babic
    Date: Thu Dec 15 10:55:37 2011 +0100

    nand_spl_simple: store ecc data on the stack

    Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM
    which is likely to contain already loaded data.
    The patch saves the oob data and the ecc on the stack replacing
    the fixed address in RAM.

    Signed-off-by: Stefano Babic
    CC: Ilya Yanok
    CC: Scott Wood
    CC: Tom Rini
    CC: Simon Schwarz
    CC: Wolfgang Denk
    Signed-off-by: Scott Wood

    While nand_spl is on its way out, in favor of spl, there are still
    many boards using it, and conversions are gradual. This allows us
    to get rid of CONFIG_SYS_NAND_ECCSTEPS and CONFIG_SYS_NAND_ECCTOTAL now,
    which would otherwise be likely to linger unreferenced after a conversion.

    It also eliminates a temporary error in the hawkboard_nand build, since
    the spl version of the patch removed ECCSTEPS/TOTAL from hawkboard.h, but
    the spl conversion is pending (and may be merged via a different tree).

    Signed-off-by: Scott Wood

    Scott Wood
     

08 Dec, 2011

1 commit


07 Dec, 2011

5 commits

  • dram_init function in board/davinci/common/misc.c does not get
    compiled for spl builds, thus rendering inclusion of memsize.c
    useless.

    Signed-off-by: Sughosh Ganu

    Sughosh Ganu
     
  • move the board/davinci/common/misc.c file to
    arch/arm/cpu/arm926ejs/davinci/misc.c, so all
    davinci boards can use this functions.

    Signed-off-by: Heiko Schocher
    Cc: Sandeep Paulraj
    Cc: Tom Rini
    Cc: Albert ARIBAUD
    Cc: Christian Riesch

    Heiko Schocher
     
  • The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
    that contain pinmux configurations for emac, uarts, memory controllers...
    In an earlier patch such pinmux configurations were added to the arch
    tree. This patch makes the hawkboard use these definitions instead of
    defining its own.

    Signed-off-by: Christian Riesch
    Cc: Sandeep Paulraj
    Cc: Heiko Schocher
    Cc: Syed Mohammed Khasim
    Cc: Sughosh Ganu
    Cc: Mike Frysinger
    Acked-by: Heiko Schocher

    Christian Riesch
     
  • Signed-off-by: Christian Riesch
    Cc: Sandeep Paulraj
    Cc: Heiko Schocher
    Cc: Sudhakar Rajashekhara
    Cc: Syed Mohammed Khasim
    Cc: Sughosh Ganu
    Cc: Nick Thompson
    Cc: Stefano Babic
    Acked-by: Heiko Schocher
    Acked-by: Nick Thompson

    Christian Riesch
     
  • s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
    nand_read_buf functions. This provoked a regression when these functions
    were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.

    This deletes these duplicated functions from s3c64xx.c and adds the generic
    implementations in nand_base.c to the spl Makefile. It also adds
    -ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
    avoid errors originating from unused functions in nand_base.c.

    Description of the regression:
    http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873

    Signed-off-by: Simon Schwarz
    Cc: scottwood@freescale.com
    Cc: s-paulraj@ti.com
    Cc: albert.u.boot@aribaud.net

    Simon Schwarz
     

17 Nov, 2011

1 commit

  • Fix:
    nand_boot.c: In function 'nand_read_page':
    nand_boot.c:190:6: warning: variable 'stat' set but not used [-Wunused-but-set-variable]
    nand_boot.c: In function 'nand_boot':
    nand_boot.c:271:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable]

    Signed-off-by: Stefan Roese

    Stefan Roese
     

05 Oct, 2011

2 commits

  • * 'master' of git://git.denx.de/u-boot-nand-flash:
    PPC: Fix socrates NAND problem
    PPC: Fix fsl_upm.c by renaming nand handling functions
    NAND: Make page, erase, oob size available via cmd_nand
    mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi
    NAND: Add -y option to nand scrub command
    NAND: Add nand read.raw and write.raw commands
    NAND: Really ignore bad blocks when scrubbing
    spl, nand: add 4bit HW ecc oob first nand_read_page function
    mxc_nand: fix a problem writing more than 32MB
    mxc_nand: fixed some typos (cosmetic)
    nand: increase chip_delay in mv kirkwood nand driver

    Wolfgang Denk
     
  • * 'master' of git://git.denx.de/u-boot-mpc85xx:
    powerpc/p3060: Add SoC related support for P3060 platform
    powerpc/85xx: Add support for setting up RAID engine liodns on P5020
    powerpc/85xx: Refactor some defines out of corenet_ds.h
    fm-eth: Add ability for board code to disable a port
    powerpc/mpc8548: Add workaround for erratum NMG_LBC103
    powerpc/mpc8548: Add workaround for erratum NMG_DDR120
    powerpc/mpc85xxcds: Fix PCI speed
    powerpc/mpc8548cds: Fix booting message
    powerpc/p4080: Add support for secure boot flow
    powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
    powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
    powerpc/p2041rdb: remove watch dog related codes
    powerpc/p2041rdb: updated description of cpld command
    powerpc/p2041rdb: add more ddr frequencies support
    powerpc/p2041rdb: set sysclk according to status of physical switch SW1
    powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
    powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
    powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
    powerpc/mpc8xxx: Add DDR2 to unified DDR driver
    powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
    powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
    powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
    powerpc/85xx: Refactor P2041RDB to use common p_corenet files
    powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
    powerpc/85xx: Enable CMD_REGINFO on corenet boards
    powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
    powerpc/85xx: Fix USB protocol definitions for P1020RDB
    powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
    powerpc/mpc8xxx: Move DDR RCW overriding to common code
    powerpc/mpc8xxx: Extend CWL table
    powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
    powerpc/85xx: Cleanup extern in corenet_ds board code
    powerpc/p2041rdb: Add ethernet support on P2041RDB board
    powerpc/85xx: Add networking support to P1023RDS
    powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
    powerpc/85xx: Add FMan ethernet support to P4080DS
    powerpc/85xx: Add support for FMan ethernet in Independent mode
    powerpc/mpc8548cds: Cleanup mpc8548cds.c
    powerpc/mp: add support for discontiguous cores
    powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
    fdt: Add new fdt_create_phandle helper
    fdt: Rename fdt_create_phandle to fdt_set_phandle
    powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
    fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
    powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
    fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
    powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
    powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
    nand: Freescale Integrated Flash Controller NAND support
    powerpc/85xx: Add basic support for P1010RDB
    powerpc/85xx: Add support for new P102x/P2020 RDB style boards
    powerpc/85xx: relocate CCSR before creating the initial RAM area
    powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
    powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
    powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014

    Wolfgang Denk
     

04 Oct, 2011

1 commit


01 Oct, 2011

1 commit


30 Sep, 2011

3 commits

  • And various defines to enable NAND support and NAND spl code for the
    P1010RDB platform.

    Signed-off-by: Dipen Dudhat
    Signed-off-by: Scott Wood
    Signed-off-by: Kumar Gala

    Dipen Dudhat
     
  • Add NAND support (including spl) on IFC, such as is found on the p1010.

    Note that using hardware ECC on IFC with small-page NAND (which is what
    comes on the p1010rdb reference board) means there will be insufficient
    OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should
    work, as it does not use OOB for anything but ECC.

    When hardware ECC is not enabled in CSOR, software ECC is now used.

    Signed-off-by: Dipen Dudhat
    [scottwood@freescale.com: ECC rework and misc fixes]
    Signed-off-by: Scott Wood

    Dipen Dudhat
     
  • The following boards share a common design but with minor variations
    between them:

    P1020MSBG-PC
    P1020RDB-PC
    P1020UTM-PC
    P1021RDB-PC
    P1024RDB
    P1025RDB
    P2020RDB-PC

    The P1020RDB-PC shares its roots in the existing P1020RDB board design,
    however uses DDR3 instead of DDR2.
    P2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK.

    Key features on these boards include:
    * DDR3
    * NOR flash
    * NAND flash (on RDB's only)
    * SPI flash (on RDB's only)
    * SDHC/MMC card slot
    * VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
    * PCIE slot and mini-PCIE slots

    As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
    is used to store SPD data. In case of absent or corrupted SPD, falling back
    to timing data embedded in the source code will be used. Raw timing data is
    extracted from DDR chip datasheet. Different speeds of DDR are supported
    with this approach. ODT option is forced to fit this set of boards, again
    because they don't have regular DIMMs.

    CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet
    specification for writing timing.

    VSC firmware Address is defined by default in config file for eTSEC1.

    SD width is based off DIP switch. DIP switch is detected on the
    board by reading i2c bus and setting the appropriate mux values.

    Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC
    have pins multiplexing. QE function needs to be disabled to access Nor Flash
    and CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
    in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
    enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below

    'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
    'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.

    Signed-off-by: York Sun
    Signed-off-by: Li Yang
    Signed-off-by: Zhao Chenhui
    Signed-off-by: Matthew McClintock
    Signed-off-by: Poonam Aggrwal
    Signed-off-by: Priyanka Jain
    Signed-off-by: Tang Yuantian
    Signed-off-by: ramneek.mehresh
    Signed-off-by: Prabhakar Kushwaha
    Signed-off-by: Matthew McClintock
    Signed-off-by: Xie Xiaobo
    Signed-off-by: Kumar Gala
    Signed-off-by: Jerry Huang
    Signed-off-by: Akhil Goyal

    Li Yang
     

10 Sep, 2011

1 commit


05 Aug, 2011

1 commit


26 Jul, 2011

1 commit


12 Jul, 2011

1 commit

  • The P1023RDS board is the reference board for the P1023 SoC.

    Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
    UART, I2C, etc.

    Signed-off-by: Roy Zang
    Signed-off-by: Haiying Wang
    Signed-off-by: Chunhe Lan
    Signed-off-by: Lei Xu
    Signed-off-by: York Sun
    Signed-off-by: Kumar Gala

    Roy Zang
     

02 Jul, 2011

1 commit

  • This patch adds support for 16 bit NAND devices attached to the
    NDFC on ppc4xx processors. Two config entries were added:

    CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a
    16 bit device is attached.
    CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus
    Controller configuration register.

    Also, a new ndfc_read_byte() function was added which does not
    first convert the data to little endian.

    The NAND SPL was also modified to do 16bit bad block testing
    when a 16 bit chip is being used.

    Signed-off-by: Alex Waterman
    Signed-off-by: Scott Wood

    Alex Waterman
     

26 May, 2011

1 commit


17 May, 2011

1 commit


14 May, 2011

3 commits

  • There are multiple reasons why this define should be removed:

    First it saves some space and therefore fixes a problem we have on
    the canyonlands_nand and glacier_nand targets right now.

    Second, the define was hackish and would most likely not work on all
    board using nand_boot.c. Boards not providing a real dev_ready()
    function should implement a board specific function instead.

    I checked and it seems, that all boards using nand_boot.c right now
    already implement a board specific dev_ready() function. So this
    patch should not break any boards and will result in smaller
    NAND_SPL images.

    Signed-off-by: Stefan Roese
    Cc: Scott Wood
    Cc: Stefano Babic
    Cc: Sughosh Ganu
    Cc: Sudhakar Rajashekhara
    Tested-by: Sughosh Ganu
    Signed-off-by: Scott Wood

    Stefan Roese
     
  • Patch 65a9db7b [nand_spl: Fix large page nand_command()] broke
    nand booting on canyonlands. "options" has to be initialized to
    0. If not, boards might have the NAND_BUSWIDTH_16 bit set,
    resulting in wrong offset calculation.

    Signed-off-by: Stefan Roese
    Cc: Scott Wood
    Cc: Alex Waterman
    Signed-off-by: Scott Wood

    Stefan Roese
     
  • The canyonland boards nand_spl size is just under the maximum 4KByte size. This
    patch decreases the size of the nand_spl to make a previous commit - commit
    65a9db7be0868be91ba81b9b5bf821de82e6d9b0 - fit in the nand_spl.

    Signed-off-by: Alex Waterman
    Acked-by: Stefan Roese
    Signed-off-by: Scott Wood

    Alex Waterman
     

28 Apr, 2011

4 commits


16 Apr, 2011

3 commits


01 Apr, 2011

1 commit


28 Mar, 2011

2 commits


23 Mar, 2011

1 commit

  • commit 8aba9dceebb14144e07d19593111ee3a999c37fc
    Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS

    breaks the usage of --gc-section to build nand_spl. We still need linker option
    --gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes
    the --gc-sections to each uboot image.

    To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace
    PLATFORM_LDFLAGS in the Makefile of each nand_spl board.

    Signed-off-by: Scott Wood
    Signed-off-by: Haiying Wang

    Haiying Wang
     

21 Feb, 2011

1 commit


14 Jan, 2011

1 commit


18 Dec, 2010

1 commit