30 Nov, 2020
1 commit
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Fix below build warning when enabling BEE config on iMX6UL EVK board.
arch/arm/mach-imx/mx6/bee.c: In function ‘bee_test’:
arch/arm/mach-imx/mx6/bee.c:201:2: warning: implicit declaration of
function ‘flush_dcache_range’; did yomean ‘check_cache_range’?
[-Wimplicit-function-declaration]
201 | flush_dcache_range(address, address + range);
| ^~~~~~~~~~~~~~~~~~
| check_cache_rangeSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 134d22e59af3931d283c123c1aa3fc44cb86761d)
27 Nov, 2020
1 commit
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blk_dwrite() will write data in blocks, padding the keyslot_package
struct to one block to avoid redundant data write.Test: RPMB key set.
Change-Id: I326d7f4394d15e6e22b12c3abd6a5e2de18920cc
Signed-off-by: Ji Luo
20 Nov, 2020
2 commits
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evk_7ulp images has normal ramdisk in boot.img and recovery ramdisk in
recovery.img.Normal ramdisk in boot.img is used to boot up Android, ramdisk addr need
to be passed to kernel any way.Recovery ramdisk in recovery.img is not used to boot up Android, there
is no need to pass "androidboot.force_normal_boot=1".Change-Id: Id1e9c31035cbf65cd325c70a0aa9df05ea1d90b2
Signed-off-by: faqiang.zhu -
Use the struct lpspi when it is not a NULL ptr.
Reviewed-by: Fugang Duan
Signed-off-by: Clark Wang
(cherry picked from commit 697198f65dba420534e8df1d5443f0b0869cc31f)
19 Nov, 2020
6 commits
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TEE memory region are moved to 0x56000000 ~ 0x58000000 to
support i.MX 8MN DDR3L board:TEE-619 imx: 8mn: add support for i.MX 8MN DDR3L EVK
DD3L EVK board only has 512MB of DDR.
move OP-TEE mapping for all the 8MN boards.Signed-off-by: Silvano di Ninno
Adjust the fastboot buffer region to avoid conflicts.
Test: Super partition flash on imx8mn.
Change-Id: I56bd0194f24f9f267f436b4b6d762948d96bf815
Signed-off-by: Ji Luo -
To avoid u-boot MMU table overlap M4 RPMSG vring buffer, reserve
the top 1MB DDR.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit e00224b10c9ce10c76fa9ba452d88565bee7024a) -
To avoid u-boot MMU table overlap M4 RPMSG vring buffer. Reserve
the top 1MB DDR when bootaux is enabled.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 44cf26781117c484e5f7e46fe6008c0b31c297e4) -
When booting with M4 RPMSG demo in u-boot, the M4 will use top 1MB
DDR for RPMSG vring buffer. This overlaps with u-boot MMU table and
modifies some MMU entries.
On mx7dsabresd, this cause u-boot failed to access LCDIF registers
due to the wrong MMU entries.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 8a03d17c92cc04765c6b93f716ea081486fd15f0) -
Low drive mode needs to update GPU freq in kernel DTB. But 5.4 and 5.10
kernel are using different GPU node pathes. Update low_drive_gpu_freq
to support both two paths.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit cb1c6e4279030b859133b9e4e4a0fb2c3e3cd45c) -
Virtual A/B is not supported for Android 10 release, disable
the configs here. And as the dual bootloader feature is enabled
for car2 on Android 10, enable CONFIG_DUAL_BOOTLOADER for car2.Test: Boots on imx8qm_mek.
Change-Id: If50ccbb33bc23d56e169e48e0a0b8ecd5259005c
Signed-off-by: Ji Luo
16 Nov, 2020
4 commits
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For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/SoloComparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact
cmd6 behavior, after cmd6 get transfer complete interrupt, the data0
line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL.
For other platforms, do not has this issue.To fix this issue, fix the DTOCV to 0xE, the max setting, this also align
with Linux configuration.Signed-off-by: Haibo Chen
Reviewed-by: Ye Li -
Since optee has moved to 0x56000000 on iMX8MN EVK. So mtest address
will conflict with optee and u-boot relocation. Set the mtest space
after the optee reserved region and adjust size for 1GB DDR3L EVK.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
09 Nov, 2020
4 commits
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Two LCD data pins (D16 and D17) are missed in DTS to cause color issue,
also update pad setting to align with kernel.Signed-off-by: Ye Li
Acked-by: Peng Fan -
The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444AThe reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.Reviewed-by: Ye Li
Signed-off-by: Alice Guo -
Since iMX8MP LPDDR4 EVK uses OD for VDD_SOC, so we can set GIC clock
to 500Mhz to align with kernel. For DDR4 EVK, uses default 400Mhz for
ND VDD_SOC.
Move the codes from SOC codes to board level to match with voltage
setting.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
Because DDR4 runs at 3200MTS, this speed does not require to use overdrive
voltage for VDD_SOC, so set VDD_SOC to nominal 0.85v on DDR4 EVK.
The VDD_ARM was set to 0.95v to avoid timing risk from SOC to ARM when
VDD_SOC is 0.95v, set it back to 0.85v as well.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
06 Nov, 2020
5 commits
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imx8mp has serial number as all zeros, hard code the BT mac
address for such case instead of setting it by property.Test: BT on imx8mp.
Change-Id: I99f5b49164e1fa40c7fc6ecb639c71fa89158852
Signed-off-by: Ji Luo -
GCC for arm32 doesn't support division between signed
and unsigned integer. Clean up the code to use 'long'
for both arm32 and arm64 platforms.Test: build on 7ulp and 8mm.
Change-Id: I21c23b1948994558237b27bfe7452e78e3d45172
Signed-off-by: Ji Luo -
Update fuse path to disable modules correctly.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan -
Update node path for 5.10 Kernel.
- aips-bus renamed to bus
- gpmi-nand renamed to nand-controllerReviewed-by: Ye Li
Signed-off-by: Peng Fan -
Following Linux, set GIC clk to 500M. If U-Boot has different settings
compared with kernel required, kernel will dump. However we could not
let kernel runtime change GIC clk parents, because it is CLK_IS_CRITICAL
and CLK_SET_PARENT_GATE, it will always fail. There is no otherway
to address the issue unless let U-Boot configure it ready.Reviewed-by: Ye Li
Signed-off-by: Peng Fan
03 Nov, 2020
5 commits
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Use a dedicated defconfig for LCDIF splash screen to resolve conflict.
Update board codes to add relevant configs and control mux for LCDIF pins.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
Because LCDIF has lots of pinmux conflict with modules like eQOS, SPI,
ADC, LPUART1, etc. We can't support it by default.
Introduce a new DTS for LCDIF enablement and disable conflicted nodes.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
Support iMX8DXL in mxsfb driver by below changes:
1. Enable iMX8 in lcdif registers file
2. Add u-boot clock driver support for iMX8
3. Change the FB buffer alignment to align it at allocation. So
it won't overlay with other memory at mmu_set_region_dcache_behaviourSigned-off-by: Ye Li
Reviewed-by: Peng Fan -
Update the LCDIF clocks to align with u-boot clock driver.
Since u-boot imx8 clock driver can gate and divide on slice clock,
so it does not create two clocks on slice clock.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
Add relevant clocks tree for LCDIF. According to design, LCDIF has
a slice and a dedicated eLCDIF PLL for pixel clock.
On iMX8QXP, there is pixel link mux which is muxed with LCDIF IOs.
It uses slice bypass reference clock for pix clock input.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
30 Oct, 2020
2 commits
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AVB verify should fail for GKI boot image but we should allow it
continue to boot in UNLOCKED state. In such case, we should not
update the stored rollback index.This commit will update the rollback index only when the AVB
verify is OK to prevent rollback index check error.Test: boots.
Signed-off-by: Ji Luo
Change-Id: I82678d288edd4df6de40a1ca863ed36d3b3658a8 -
This is a workaround.
Always open the regulator of the sensor to ensure that the
pull-up of i2c3 is 3.3v. Otherwise, there will be a 1.8v high level
pull-up before enable sensor regulator in kernel boot stage.Reviewed-by: Fugang Duan
Signed-off-by: Clark Wang
28 Oct, 2020
2 commits
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The 'offset' can be negative number passed from fsl_read_from_partition_multi(),
don't covert 'blksz' to 'uint64_t' as it will cause overflow when the 'offset'
is negative number.Test: mmc blk read with 'offset < 0'.
Signed-off-by: Ji Luo
Change-Id: Id1ce8e0c748dd280d70c1722cc7d17cc9646a4bb -
add a configuration of "CONFIG_VIRTUAL_AB_SUPPORT" for evk_8mm and
evk_8mn ddr4 board, so the "CONFIG_ANDROID_DYNAMIC_PARTITION" can be
selected, and bootargs can be passed to kernel correctly.Signed-off-by: faqiang.zhu
Change-Id: I42a0356940d8e76b560f79ccf440c7ec6df09b90
23 Oct, 2020
4 commits
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Add support for 'fastboot snapshot-update cancel', it cancels
the snapshot update process so erase/update partitions can
proceed.Test: run 'fastboot snapshot-update cancel'.
Signed-off-by: Ji Luo
Change-Id: Ic1dfaf09a27fecf6e14b7149aeb5e0a9a1d220c9 -
Add support for 'fastboot getvar snapshot-update-status', it
returns the snapshot update states.Test: run 'fastboot getvar snapshot-update-status'
Signed-off-by: Ji Luo
Change-Id: Ifd46410994b11c327373a35eb86d121f321e39ae -
Set the initial 'source_slot' in 'misc_virtual_ab_message' as
the current slot. At the same time, add slot checks before
erase data if virtual A/B is enabled.Test: virtual A/B update and erase.
Signed-off-by: Ji Luo
Change-Id: I84896335a95d9188b85e114037b470b3f4e7a209 -
To use dynamic partition feature in Android, recovery ramdisk is used to
mount the logical partitions and boot up Android.Define a configuration item "CONFIG_ANDROID_DYNAMIC_PARTITION", use it
to control the bootargs and whether ramdisk should be loaded instead of
"CONFIG_ANDROID_AUTO" because now Android auto also use dynamic
partition feature now.Move the definition of function "fastboot_setup_system_boot_args" under
the macro "CONFIG_CMD_BOOTA" to avoid build warnings.Signed-off-by: faqiang.zhu
Change-Id: I0b1cfe6120fc939e7f1a1eb600d8176c81edf129
20 Oct, 2020
2 commits
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Use more safer refresh time value for 6GB LPDDR4 on this EVK board.
Update the parameters for every frequency point.Signed-off-by: Ye Li
Reviewed-by: Jacky Bai -
1. align ddr4 Q0S settings to lpddr4
2. adjust PERFHPR1, PERFLPR1, PERFWR1 to reduce HPR,LPR, W
starving time to avoid display underrunSigned-off-by: Jian Li
Reviewed-by: Ye Li
19 Oct, 2020
1 commit
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If a partition is not less than 4GB, to avoid the overflow issue when
calculate the partition size in bytes, change the value of partition
length in block size to the type of "unsigned long".Change-Id: Ifa4ddb5169fcb02822ef152a6c70d01b5d3cf50d
Signed-off-by: faqiang.zhu
14 Oct, 2020
1 commit
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Rename old LPDDR4 EVK to EVK-QCA board which uses QCA wifi and BD71847
pmic, assign dedicated u-boot DTS and defconfig for this board, So we
can drop it easily in future.Set default EVK configuration for new LPDDR4 EVK which uses NXP PCA9540A
PMIC and NXP AW-CM358SM WIFI module.Signed-off-by: Ye Li
Reviewed-by: Peng Fan