04 Feb, 2014
1 commit
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IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.So update acessor functions with common IFC acessor functions to take care
both type of endianness.Signed-off-by: Prabhakar Kushwaha
Acked-by: York Sun
22 Jan, 2014
1 commit
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Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.- For ifc, elbc, esdhc, espi, all need the SPL without
section .resetvec.
- Use a clear function name for nand spl boot.
- Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c
in spl/Makefile;Signed-off-by: Po Liu
Acked-by: Scott Wood
Reviewed-by: York Sun
02 Dec, 2013
1 commit
26 Nov, 2013
1 commit
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Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/misc
and fix the header file includes.Signed-off-by: York Sun
22 Nov, 2013
1 commit
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Current IFC driver supports till 4K page size NAND flash.
Add support of 8K NAND flash
- Program Spare region size in csor_ext
- Add nand_ecclayout for 4 bit & 8 bit ecc
- Defines constants
- Add support of 8K NAND boot.Signed-off-by: Prabhakar Kushwaha
CC: Liu Po
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
21 Jun, 2013
1 commit
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Linker script is not able find start.o binary. So add its absolute path in
u-boot-spl.lds. This change is similar to u-boot-nand.ldscommon/Makefile: Avoid compiling unnecssary files
fsl_ifc_spl.c : It is is responsible for reading u-boot binary from
NAND flash and copying into DDR. It also transfer control from NAND SPL
to u-boot image present in DDR.Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Andy Fleming