02 Aug, 2017

1 commit

• 926870478   arm64: zynqmp: Fix SVD mask for getting chip ID ... Browse Code »

  Mask should start from the first bit - using 0xe is just wrong.
  3bits are used that's why 0x7 mask is correct.
  This patch is fixing silicon ID code detection. Previous behavior was
  that bit0 was completely ignored.
  Issue was found on 2eg chip detection.

  Signed-off-by: Michal Simek

  Michal Simek

  2017-08-02 15:11:52 +0800  

15 Nov, 2016

1 commit

• 0cba6abbb   ARM64: zynqmp: Adjust to new SMC interface to get silicon version ... Browse Code »

  The new FW interface returns the IDCODE and version register, leaving
  extracting bitfields to the caller.

  Cc: Michal Simek
  Cc: Siva Durga Prasad Paladugu
  Signed-off-by: Soren Brinkmann
  Signed-off-by: Michal Simek

  Soren Brinkmann

  2016-11-15 22:28:05 +0800  

22 Sep, 2016

2 commits

• 47e60cbdf   ARM64: zynqmp: Add support for chip ID detection ... Browse Code »

  Chip ID needs to be known for loading bitstream because
  U-Boot checks ID from bitstream header in BIT format.
  BIN format is completely unchecked.

  The chipid is get from ATF via SMC.

  Signed-off-by: Siva Durga Prasad Paladugu
  Signed-off-by: Michal Simek

  Michal Simek

  2016-09-22 13:33:21 +0800  
• 6b2450143   fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP ... Browse Code »

  Add PL bitstream dowload support for ZynqMP
  Bitstream will be validated by uboot and loaded
  to PL by invoking an smc instruction to ATF which route this request to
  PMU FW which will take care of loading it to PL

  Signed-off-by: Siva Durga Prasad Paladugu
  Signed-off-by: Michal Simek

  Siva Durga Prasad Paladugu

  2016-09-22 13:33:21 +0800