05 Feb, 2021

1 commit


06 May, 2020

3 commits

  • Enable the SPL SDP driver and SPL gadget drivers on iMX8MQ EVK board.

    Signed-off-by: Ye Li
    (cherry picked from commit 957fd8c849142802c4f0b9479be607c8c5ed1f7a)

    Ye Li
     
  • Since rng_init is used arch_cpu_init, we have to clean up BSS section
    before it.
    Also remove the unnecessary memset to global data, because
    board_init_f_init_reserve already memset it. If we memset it in board_init_f,
    the gd->malloc_base is reset to 0 and will cause early malloc problem
    when CONFIG_MALLOC_F_ADDR is not set.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan
    (cherry picked from commit c36ae6a623b075192b20d93f9e3fe966961d86f4)
    (cherry picked from commit f7e11efcb4689cd7e1068677454b2bd4480708f3)

    Ye Li
     
  • 1. Fix wrong USDHC clock
    2. Increase malloc f size to 0x2000
    3. Change to use DM GPIO interfaces to avoid wrong GPIO device selected
    4. Enlarge SPL max size to 148KB
    5. Add do_reset command

    Signed-off-by: Ye Li

    Ye Li
     

18 Jan, 2020

1 commit


23 Jun, 2019

1 commit


11 Jun, 2019

1 commit

  • Staticize 'spl_dram_init' and 'i2c_pad_info1' to fix the
    following sparse warnings:

    board/freescale/imx8mq_evk/spl.c:30:6: warning: symbol 'spl_dram_init' was not declared. Should it be static?
    board/freescale/imx8mq_evk/spl.c:41:22: warning: symbol 'i2c_pad_info1' was not declared. Should it be static?

    Signed-off-by: Fabio Estevam
    Reviewed-by: Peng Fan

    Fabio Estevam
     

01 Jan, 2019

1 commit

  • Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy
    firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to
    DRAM.

    The boot log with Arm trusted firmware console enabled:
    "
    U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)
    PMIC: PFUZE100 ID=0x10
    Normal Boot
    Trying to boot from MMC2
    NOTICE: Configureing TZASC380
    NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty
    NOTICE: BL31: Built : 09:28:54, Nov 8 2018
    lpddr4 swffc start
    NOTICE: sip svc init

    U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800)

    CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz
    Reset cause: POR
    Model: Freescale i.MX8MQ EVK
    DRAM: 3 GiB
    MMC: FSL_SDHC: 0, FSL_SDHC: 1
    In: serial
    Out: serial
    Err: serial
    Net:
    Warning: ethernet@30be0000 using MAC address from ROM
    eth0: ethernet@30be0000
    Hit any key to stop autoboot: 0
    "

    Signed-off-by: Peng Fan
    Cc: Fabio Estevam
    Cc: Stefano Babic

    Peng Fan